Low Resistivity Nitrogen-Doped Zinc Telluride and Methods for Forming the Same
    3.
    发明申请
    Low Resistivity Nitrogen-Doped Zinc Telluride and Methods for Forming the Same 审中-公开
    低电阻率氮掺杂锌碲化物及其形成方法

    公开(公告)号:US20150171260A1

    公开(公告)日:2015-06-18

    申请号:US14108697

    申请日:2013-12-17

    CPC classification number: H01L31/1828 H01L31/02963 H01L31/073 Y02E10/543

    Abstract: Embodiments provided herein describe methods for forming nitrogen-doped zinc telluride, such as for use in photovoltaic devices. The zinc telluride layer is formed using physical vapor deposition (PVD) at a processing temperature of between about 100° C. and about 450° C. in a gaseous environment that includes between about 3% and about 10% by volume of nitrogen gas.

    Abstract translation: 本文提供的实施方案描述了形成氮掺杂的碲化锌的方法,例如用于光伏器件中的方法。 在包括约3体积%至约10体积%的氮气的气体环境中,使用物理气相沉积(PVD)在约100℃至约450℃的加工温度下形成碲化锌层。

    Methods for forming resistive switching memory elements
    5.
    发明申请
    Methods for forming resistive switching memory elements 审中-公开
    形成电阻式开关存储元件的方法

    公开(公告)号:US20140231744A1

    公开(公告)日:2014-08-21

    申请号:US14264475

    申请日:2014-04-29

    Abstract: Resistive switching memory elements are provided that may contain electroless metal electrodes and metal oxides formed from electroless metal. The resistive switching memory elements may exhibit bistability and may be used in high-density multi-layer memory integrated circuits. Electroless conductive materials such as nickel-based materials may be selectively deposited on a conductor on a silicon wafer or other suitable substrate. The electroless conductive materials can be oxidized to form a metal oxide for a resistive switching memory element. Multiple layers of conductive materials can be deposited each of which has a different oxidation rate. The differential oxidization rates of the conductive layers can be exploited to ensure that metal oxide layers of desired thicknesses are formed during fabrication.

    Abstract translation: 提供电阻式开关存储器元件,其可以包含由无电金属形成的化学金属电极和金属氧化物。 电阻式开关存储器元件可以表现出双稳态,并且可以用于高密度多层存储器集成电路中。 诸如镍基材料的无电导电材料可以选择性地沉积在硅晶片或其它合适的衬底上的导体上。 无电导电材料可以被氧化以形成用于电阻式开关存储元件的金属氧化物。 可以沉积多层导电材料,每层具有不同的氧化速率。 可以利用导电层的差异氧化速率来确保在制造期间形成所需厚度的金属氧化物层。

    Methods for forming resistive switching memory elements
    7.
    发明授权
    Methods for forming resistive switching memory elements 有权
    形成电阻式开关存储元件的方法

    公开(公告)号:US09178145B2

    公开(公告)日:2015-11-03

    申请号:US14264475

    申请日:2014-04-29

    Abstract: Resistive switching memory elements are provided that may contain electroless metal electrodes and metal oxides formed from electroless metal. The resistive switching memory elements may exhibit bistability and may be used in high-density multi-layer memory integrated circuits. Electroless conductive materials such as nickel-based materials may be selectively deposited on a conductor on a silicon wafer or other suitable substrate. The electroless conductive materials can be oxidized to form a metal oxide for a resistive switching memory element. Multiple layers of conductive materials can be deposited each of which has a different oxidation rate. The differential oxidization rates of the conductive layers can be exploited to ensure that metal oxide layers of desired thicknesses are formed during fabrication.

    Abstract translation: 提供电阻式开关存储器元件,其可以包含由无电金属形成的化学金属电极和金属氧化物。 电阻式开关存储器元件可以表现出双稳态,并且可以用于高密度多层存储器集成电路中。 诸如镍基材料的无电导电材料可以选择性地沉积在硅晶片或其它合适的衬底上的导体上。 无电导电材料可以被氧化以形成用于电阻式开关存储元件的金属氧化物。 可以沉积多层导电材料,每层具有不同的氧化速率。 可以利用导电层的差异氧化速率来确保在制造期间形成所需厚度的金属氧化物层。

    Silver based conductive layer for flexible electronics
    8.
    发明授权
    Silver based conductive layer for flexible electronics 有权
    用于柔性电子元件的银基导电层

    公开(公告)号:US09121100B2

    公开(公告)日:2015-09-01

    申请号:US13715477

    申请日:2012-12-14

    Abstract: Methods for making conducting stacks includes forming a doped or alloyed silver layer sandwiched between two layers of transparent conductive oxide such as indium tin oxide (ITO). The doped silver or silver alloy layer can be thin, such as between 1.5 to 20 nm and thus can be transparent. The doped silver or silver alloy can provide improved ductility property, allowing the conductive stack to be bendable. The transparent conductive oxide layers can also be thin, allowing the conductive stack to have an improved ductility property.

    Abstract translation: 制造导电叠层的方法包括形成夹在两层透明导电氧化物(例如氧化铟锡(ITO))之间的掺杂或合金化的银层。 掺杂的银或银合金层可以是薄的,例如在1.5至20nm之间,因此可以是透明的。 掺杂的银或银合金可以提供改善的延展性,允许导电叠层可弯曲。 透明导电氧化物层也可以是薄的,允许导电叠层具有改善的延展性。

Patent Agency Ranking