公开(公告)号：US07863600B2

公开(公告)日：2011-01-04

申请号：US11186129

申请日：2005-07-20

申请人： Kazumasa Nomoto

发明人： Kazumasa Nomoto

IPC分类号： H01L35/24 ,  H01L51/00

CPC分类号： H01L51/0541 ,  H01L51/0021 ,  H01L51/0052 ,  H01L51/0545

摘要： A field-effect transistor is provided. The field-effect transistor includes a gate electrode, a gate-insulating layer, source/drain electrodes, and an organic semiconductor layer constituting a channel region. The source/drain electrodes each include a conductive portion composed of a metal and an organic conductive material layer which at least partially covers the conductive portion and which is doped with a dopant. The channel region is composed of the organic semiconductor layer located between the source/drain electrodes. The channel region and each of the conductive portions is electrically connected through the organic conductive material layer.

摘要翻译： 提供场效应晶体管。 场效应晶体管包括栅电极，栅极绝缘层，源/漏电极和构成沟道区的有机半导体层。 源/漏电极各自包括由金属组成的导电部分和至少部分地覆盖导电部分并且掺杂有掺杂剂的有机导电材料层。 沟道区由位于源极/漏极之间的有机半导体层构成。 沟道区域和每个导电部分通过有机导电材料层电连接。

公开(公告)号：US20100078639A1

公开(公告)日：2010-04-01

申请号：US12523943

申请日：2008-01-28

申请人： Kazumasa Nomoto ,  Nobukazu Hirai ,  Ryoichi Yasuda ,  Takeo Minari ,  Kazuhito Tsukagoshi ,  Yoshinobu Aoyagi

发明人： Kazumasa Nomoto ,  Nobukazu Hirai ,  Ryoichi Yasuda ,  Takeo Minari ,  Kazuhito Tsukagoshi ,  Yoshinobu Aoyagi

IPC分类号： H01L29/786 ,  H01L21/336

CPC分类号： H01L51/001 ,  H01L51/0516 ,  H01L51/0529 ,  H01L51/0545

摘要： The present invention provides a method for making a thin film semiconductor device having a bottom-gate, bottom-contact-type thin film transistor structure finer in size with satisfactory characteristics, in which the interface between a gate insulating film and a thin film semiconductor layer can be maintained at satisfactory conditions without being affected by formation of source/drain electrodes. A first gate insulating film (7-1) covering a gate electrode (5) on a substrate (3) is formed, and a pair of source/drain electrodes (9) is formed on the first gate insulating film (7-1). Subsequently, a second gate insulating film (7-2) is selectively formed only on the first gate insulating film (7-2) exposed from the source/drain electrodes (9). Next, a thin film semiconductor layer (11) continuously covering from the source/drain electrodes (9) to the first gate insulating film (7-1) through the second gate insulating film (7-2) is formed while making contact with the source/drain electrodes (9). A method for making a thin film semiconductor device (1) is characterized as such.

摘要翻译： 本发明提供一种制造薄膜半导体器件的方法，该薄膜半导体器件具有尺寸较小且具有令人满意的特性的底栅，底接触型薄膜晶体管结构，其中栅极绝缘膜和薄膜半导体层 可以在令人满意的条件下保持不受源/漏电极形成的影响。 形成覆盖基板（3）上的栅极（5）的第一栅极绝缘膜（7-1），在第一栅极绝缘膜（7-1）上形成有一对源极/漏极电极（9） 。 随后，仅在从源极/漏极（9）露出的第一栅极绝缘膜（7-2）上选择性地形成第二栅极绝缘膜（7-2）。 接下来，形成通过第二栅极绝缘膜（7-2）从源极/漏极（9）连续地覆盖到第一栅极绝缘膜（7-1）的薄膜半导体层（11），同时与 源极/漏极（9）。 制造薄膜半导体器件（1）的方法的特征如下。

公开(公告)号：US07199303B2

公开(公告)日：2007-04-03

申请号：US10221719

申请日：2001-03-13

申请人： Akio Machida ,  Setsuo Usui ,  Kazumasa Nomoto

发明人： Akio Machida ,  Setsuo Usui ,  Kazumasa Nomoto

IPC分类号： H01N6/00

CPC分类号： H01L31/03682 ,  Y02E10/546

摘要： An optical energy conversion apparatus 10 includes a first impurity doped semiconductor layer 5, formed on a substrate, and which is of a semiconductor material admixed with a first impurity, an optically active layer 6, formed on the first impurity doped semiconductor layer 5, and which is of a hydrogen-containing amorphous semiconductor material, and a second impurity doped semiconductor layer 7, admixed with a second impurity and formed on the optically active semiconductor layer 6. The second impurity doped semiconductor layer is of a polycrystallized semiconductor material lower in hydrogen concentration than the material of the optically active semiconductor layer 6. The average crystal grain size in the depth-wise direction in an interfacing structure between the optically active semiconductor layer 6 and the second impurity doped semiconductor layer 7 is decreased stepwise in a direction proceeding from the surface of the second impurity doped semiconductor layer towards the substrate 1. By controlling the hydrogen concentration of the second impurity doped semiconductor layer 7, the number of dangling bonds in the second impurity doped semiconductor layer 7 is significantly decreased to exhibit superior crystallinity to improve the conversion efficiency of the apparatus 10.

摘要翻译： 光能转换装置10包括形成在基板上的第一杂质掺杂半导体层5，其是与第一杂质混合的半导体材料，形成在第一杂质掺杂半导体层5上的光学活性层6，以及 其是含氢非晶半导体材料，和第二杂质掺杂半导体层7，与第二杂质混合并形成在光学活性半导体层6上。 第二杂质掺杂半导体层是多晶半导体材料，其氢浓度低于光学活性半导体层6的材料。 在光学活性半导体层6和第二杂质掺杂半导体层7之间的界面结构中的深度方向上的平均晶粒尺寸在从第二杂质掺杂半导体层的表面朝向衬底的方向上逐步降低 1。 通过控制第二杂质掺杂半导体层7的氢浓度，第二杂质掺杂半导体层7中的悬挂键数量显着降低，以显示出优异的结晶度，从而提高了装置10的转换效率。

公开(公告)号：US06274903B1

公开(公告)日：2001-08-14

申请号：US09404479

申请日：1999-09-24

申请人： Kazumasa Nomoto ,  Dharam Pal Gosain ,  Setsuo Usui ,  Takashi Noguchi

发明人： Kazumasa Nomoto ,  Dharam Pal Gosain ,  Setsuo Usui ,  Takashi Noguchi

IPC分类号： H01L29788

CPC分类号： H01L27/1203 ,  B82Y10/00 ,  H01L21/84 ,  H01L27/115 ,  H01L29/7883

摘要： A memory device, a manufacturing method thereof, and an integrated circuit thereof are provided for storing information over a long period of time even if the memory device is manufactured at low temperatures. On a substrate made of glass, etc., a memory transistor and a selection transistor are formed, with a silicon nitride film and a silicon dioxide film in between. The memory transistor and the selection transistor are connected in series at a second impurity region. The conduction region for memory of the memory transistor is made of non-single crystal silicon and a storage region comprises a plurality of dispersed particulates made of non-single crystal silicon. Therefore, electrical charges can be stored partially if a tunnel insulating film has any defects. The tunnel insulating film is formed by exposing the surface of the conduction region for memory to the ionized gas containing oxygen atoms.

摘要翻译： 提供了一种存储器件，其制造方法及其集成电路，用于长时间存储信息，即使存储器件在低温下制造。 在由玻璃等制成的基板上，形成存储晶体管和选择晶体管，其间具有氮化硅膜和二氧化硅膜。 存储晶体管和选择晶体管在第二杂质区域串联连接。 用于存储晶体管的存储器的导电区域由非单晶硅制成，并且存储区域包括由非单晶硅制成的多个分散的微粒。 因此，如果隧道绝缘膜有任何缺陷，则可以部分地存储电荷。 隧道绝缘膜通过将用于记忆的导电区域的表面暴露于含有氧原子的电离气体而形成。

公开(公告)号：US6080995A

公开(公告)日：2000-06-27

申请号：US89389

申请日：1998-06-03

申请人： Kazumasa Nomoto

发明人： Kazumasa Nomoto

IPC分类号： H01L21/8247 ,  H01L27/115 ,  H01L29/06 ,  H01L29/66 ,  H01L29/788 ,  H01L29/792 ,  H01L29/80

CPC分类号： H01L29/803

摘要： A quantum device functioning as a memory device is provided for allowing high-speed writing and erasing of data with a low gate voltage. A source electrode and a drain electrode are formed on a substrate. A gate electrode is formed between the source and drain electrodes. Between the substrate and the gate electrode, a first barrier layer, a first quantum well layer, a second barrier layer, a second quantum well layer and a third barrier layer are stacked to form coupled quantum well layer. The thickness of each of the first and second barrier layers allows electron tunneling. The thickness of the third barrier layer does not allow electron tunneling. The energy level of the first quantum well layer is higher than the Fermi level of a conduction layer. The energy level of the second quantum well layer is lower than the energy level of the first quantum well layer. With an application of voltage to the gate electrode, a transition of electrons takes place by means of tunneling through the first quantum well layer to the second quantum well layer and the electrons are accumulated therein.

摘要翻译： 提供用作存储器件的量子器件，用于允许以低栅极电压高速写入和擦除数据。 在基板上形成源电极和漏电极。 在电极和漏电极之间形成栅电极。 在基板和栅电极之间，层叠第一阻挡层，第一量子阱层，第二势垒层，第二量子阱层和第三势垒层，形成耦合的量子阱层。 每个第一和第二阻挡层的厚度允许电子隧穿。 第三阻挡层的厚度不允许电子隧穿。 第一量子阱层的能级高于导电层的费米能级。 第二量子阱层的能级低于第一量子阱层的能级。 通过向栅电极施加电压，通过穿过第一量子阱层到第二量子阱层并且电子在其中积累而发生电子的转变。

公开(公告)号：US5512762A

公开(公告)日：1996-04-30

申请号：US309888

申请日：1994-09-20

申请人： Toshikazu Suzuki ,  Kazumasa Nomoto ,  Ryuichi Ugajin

发明人： Toshikazu Suzuki ,  Kazumasa Nomoto ,  Ryuichi Ugajin

IPC分类号： H01L29/68 ,  H01L29/06 ,  H01L29/12 ,  H01L29/80 ,  H01L29/861 ,  H01L31/0328 ,  H01L31/0336

CPC分类号： B82Y10/00 ,  H01L29/127 ,  H01L29/8616

摘要： A quantum box array comprising a plurality of quantum boxes is made by providing a plurality of box-shaped quantum well portions on a first barrier layer and a second barrier layer covering the quantum well portions. The quantum box array is designed so that interaction energy between electrons or holes is amply larger than transfer energy between the quantum boxes. A control electrode is provided on the second barrier layer to vary the number of electrons or holes in the quantum box array by changing the potential of the control electrode. In spite of using a relatively small number of electrons or holes, the quantum device can suppress fluctuation in density of electrons or holes, can have three or more states, and reduces the power consumption.

摘要翻译： 通过在第一阻挡层和覆盖量子阱部分的第二阻挡层上提供多个箱形量子阱部分来制造包括多个量子箱的量子盒阵列。 量子箱阵列被设计为使得电子或空穴之间的相互作用能量大于量子箱之间的转移能量。 控制电极设置在第二阻挡层上，以通过改变控制电极的电位来改变量子箱阵列中的电子或空穴的数量。 尽管使用相对少量的电子或空穴，量子器件可以抑制电子或空穴的密度波动，但可以具有三个或更多个状态，并降低功耗。

公开(公告)号：US08283200B2

公开(公告)日：2012-10-09

申请号：US11746738

申请日：2007-05-10

申请人： Noriyuki Kawashima ,  Kazumasa Nomoto ,  Akihiro Nomoto

发明人： Noriyuki Kawashima ,  Kazumasa Nomoto ,  Akihiro Nomoto

IPC分类号： H01L29/08

CPC分类号： H01L51/055 ,  H01L51/0022 ,  H01L51/0541

摘要： A manufacturing method of a thin film transistor made of a stack of an organic semiconductor layer, a gate insulating film and a gate electrode in this order on a substrate, which includes the steps of pattern coating a gate electrode material on the gate insulating film by printing; and carrying out a heat treatment to form the gate electrode resulting from drying for solidification of the pattern coated gate electrode material.

摘要翻译： 在衬底上依次形成由有机半导体层，栅极绝缘膜和栅极电极构成的薄膜晶体管的制造方法，其包括以下步骤：通过在栅极绝缘膜上图案涂覆栅电极材料的步骤 打印; 进行热处理，形成由干燥形成的图案涂布的栅电极材料固化而形成的栅电极。

公开(公告)号：US07718465B2

公开(公告)日：2010-05-18

申请号：US11458573

申请日：2006-07-19

申请人： Kazumasa Nomoto

发明人： Kazumasa Nomoto

IPC分类号： H01L51/40

CPC分类号： B82Y10/00 ,  B82Y40/00 ,  G03F7/0002 ,  H01L51/0004 ,  H01L51/0005 ,  H01L51/0022 ,  H01L51/0541 ,  H01L51/0545 ,  H01L2251/105

摘要： A semiconductor device and process for producing same are provided. The process for producing a semiconductor device includes a first embossing step of pressing a stamp having a relief pattern onto a surface of a substrate to form a depression pattern on the surface of the substrate; a second step of feeding an application material composed of a semiconductor material or a conductive material into the depression pattern by printing; and a third step of curing the application material fed by printing.

摘要翻译： 提供半导体器件及其制造方法。 制造半导体器件的方法包括：第一压花步骤，将具有浮雕图案的印模压印到基板的表面上，以在基板的表面上形成凹陷图案; 第二步，通过印刷将由半导体材料或导电材料构成的涂布材料进料到凹陷图案中; 以及固化通过印刷进料的涂布材料的第三步骤。

公开(公告)号：US20100032660A1

公开(公告)日：2010-02-11

申请号：US12510408

申请日：2009-07-28

申请人： Kazumasa Nomoto ,  Nobuhide Yoneya ,  Takahiro Ohe

发明人： Kazumasa Nomoto ,  Nobuhide Yoneya ,  Takahiro Ohe

IPC分类号： H01L51/10 ,  H01L51/40

CPC分类号： H01L51/0021 ,  H01L51/052 ,  H01L51/0541 ,  H01L51/0545 ,  H01L51/105

摘要： An organic thin film transistor is disclosed, including a substrate formed of an organic insulating layer, a first layer deposited on the substrate using a plating technique to be used for forming a source electrode and a drain electrode, a second layer of a metal material deposited covering the first layer using a further plating technique to be used for forming the source electrode and the drain electrode with the metal material capable of forming an ohmic contact with an organic semiconductor material lower than the first layer, and an organic semiconductor layer over a region between the source electrode and the drain electrode, which are each formed with the first layer and the second layer. Also disclosed is an electric device provided with the organic thin film transistor.

摘要翻译： 公开了一种有机薄膜晶体管，其包括由有机绝缘层形成的基板，使用用于形成源电极和漏电极的镀覆技术沉积在基板上的第一层，沉积的金属材料的第二层 使用另外的镀覆技术覆盖第一层，以用于形成源电极和漏电极，其中金属材料能够与低于第一层的有机半导体材料形成欧姆接触，并且在区域上形成有机半导体层 在源电极和漏电极之间，每个都形成有第一层和第二层。 还公开了设置有有机薄膜晶体管的电气装置。

公开(公告)号：US20080251844A1

公开(公告)日：2008-10-16

申请号：US12101532

申请日：2008-04-11

申请人： Akihiro Nomoto ,  Kazumasa Nomoto ,  Toshio Fukuda

发明人： Akihiro Nomoto ,  Kazumasa Nomoto ,  Toshio Fukuda

IPC分类号： H01L29/786 ,  H01L21/336

CPC分类号： H01L51/0022 ,  B82Y10/00 ,  B82Y40/00 ,  G03F7/0002 ,  H01L51/0545 ,  H01L51/102 ,  H05K3/046 ,  H05K3/207 ,  H05K2203/0108 ,  H05K2203/0528 ,  H05K2203/122

摘要： A method for forming a pattern includes the step of forming an electrically conductive film by applying a liquid composition onto a first plate. The liquid composition includes an organic solvent and conductive particles surface-modified with a fatty acid or an aliphatic amine. Then, a second pattern, which is a reverse pattern of a first pattern, is formed on the first plate by pressing a second plate having a concave-convex pattern on a surface thereof on a surface of the first plate having the electrically conductive film on the surface thereof. Then, the first pattern of the electrically conductive film is transferred onto convex top faces of the second plate. Then, the second pattern is transferred onto a surface of a transfer substrate by pressing the surface of the first plate having the second pattern thereon on the surface of the transfer substrate.

摘要翻译： 形成图案的方法包括通过将液体组合物施加到第一板上而形成导电膜的步骤。 液体组合物包括有机溶剂和用脂肪酸或脂肪族胺表面改性的导电颗粒。 然后，通过在具有导电膜的第一板的表面上的表面上压制具有凹凸图案的第二板，在第一板上形成作为第一图案的相反图案的第二图案 其表面。 然后，将导电膜的第一图案转印到第二板的凸顶面上。 然后，通过在转印基板的表面上按压具有第二图案的第一板的表面，将第二图案转印到转印基板的表面上。