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    FACILITATING VIRTUAL FUNCTIONS USING MEMORY ALLOCATION IN A VIRTUALIZATION ENVIRONMENT
    31.
    发明申请
    FACILITATING VIRTUAL FUNCTIONS USING MEMORY ALLOCATION IN A VIRTUALIZATION ENVIRONMENT 审中-公开

    公开(公告)号：US20190332291A1

    公开(公告)日：2019-10-31

    申请号：US15963236

    申请日：2018-04-26

    Applicant: MELLANOX TECHNOLOGIES, LTD.

    Inventor： Ariel Shahar ,  Peter Paneah ,  Maxim ZABOROV

    IPC: G06F3/06 ,  G06F13/16

    Abstract: Apparatuses and methods are described that provide for a mechanism for allocating physical device memory for one or more virtual functions. In particular, a memory allocating framework is provided to utilize device memory more efficiently by mapping at least one target location of the physical memory in a Base Address Register (BAR) associated with the virtual function from a plurality of available target locations based on an allocation request. The memory allocating framework is further configured to compare an indication associated with the requesting virtual function to an identifier of the requested target location. Moreover, the memory allocating framework is further configured to allow the simultaneous use of more than one virtual function at a time while providing isolation between multiple virtual functions.

    Network adapter with a common queue for both networking and data manipulation work requests
    32.
    发明申请
    Network adapter with a common queue for both networking and data manipulation work requests 审中-公开

    公开(公告)号：US20190171612A1

    公开(公告)日：2019-06-06

    申请号：US16224834

    申请日：2018-12-19

    Applicant: Mellanox Technologies, Ltd.

    Inventor： Ariel Shahar ,  Roee Moyal ,  Ali Ayoub ,  Michael Kegan

    IPC: G06F15/173 ,  G06F15/167 ,  G06F13/28 ,  H04L9/32 ,  H04L9/06

    Abstract: A network adapter includes a network interface that communicates packets over a network, a host interface connected locally to a host processor and to a host memory, and processing circuitry, coupled between the network interface and the host interface, and is configured to receive in a common queue, via the host interface, (i) a processing work item specifying a source buffer in the host memory, a data processing operation, and a first address in the host memory, and (ii) an RDMA write work item specifying the first address, and a second address in a remote memory. In response to the processing work item, the processing circuitry reads data from the source buffer, applies the data processing operation, and stores the processed data in the first address. In response to the RDMA write work item the processing circuitry transmits the processed data, over the network, for storage in the second address.

    Network operation offloading for collective operations
    33.
    发明授权
    Network operation offloading for collective operations 有权

    公开(公告)号：US10158702B2

    公开(公告)日：2018-12-18

    申请号：US14937907

    申请日：2015-11-11

    Applicant: MELLANOX TECHNOLOGIES LTD.

    Inventor： Noam Bloch ,  Gil Bloch ,  Ariel Shahar ,  Hillel Chapman ,  Gilad Shainer ,  Adi Menachem ,  Ofer Hayut

    IPC: H04L29/08 ,  G06F9/54

    Abstract: A Network Interface (NI) includes a host interface, which is configured to receive from a host processor of a node one or more work requests that are derived from an operation to be executed by the node. The NI maintains a plurality of work queues for carrying out transport channels to one or more peer nodes over a network. The NI further includes control circuitry, which is configured to accept the work requests via the host interface, and to execute the work requests using the work queues by controlling an advance of at least a given work queue according to an advancing condition, which depends on a completion status of one or more other work queues, so as to carry out the operation.

    PCI-EXPRESS DEVICE SERVING MULTIPLE HOSTS
    35.
    发明申请
    PCI-EXPRESS DEVICE SERVING MULTIPLE HOSTS 审中-公开
    PCI-EXPRESS DEVICES服务多个主机

    公开(公告)号：US20140129741A1

    公开(公告)日：2014-05-08

    申请号：US13670485

    申请日：2012-11-07

    Applicant: MELLANOX TECHNOLOGIES LTD.

    Inventor： Ariel Shahar ,  Eyal Waldman ,  Michael Kagan ,  Noam Bloch

    IPC: G06F13/14

    CPC classification number: G06F13/382

    Abstract: A method includes establishing in a peripheral device at least first and second communication links with respective first and second hosts. The first communication link is presented to the first host as the only communication link with the peripheral device, and the second communication link is presented to the second host as the only communication link with the peripheral device. The first and second hosts are served simultaneously by the peripheral device over the respective first and second communication links.

    Abstract translation: 一种方法包括在外围设备中建立与相应的第一和第二主机的至少第一和第二通信链路。 将第一通信链路作为与外围设备的唯一通信链路呈现给第一主机，并且将第二通信链路作为与外围设备的唯一通信链路呈现给第二主机。 第一和第二主机由外围设备在相应的第一和第二通信链路上同时服务。

    Floating internal context memory
    37.
    发明申请
    Floating internal context memory 有权

    公开(公告)号：US20250077440A1

    公开(公告)日：2025-03-06

    申请号：US18459047

    申请日：2023-08-31

    Applicant: MELLANOX TECHNOLOGIES, LTD.

    Inventor： Ariel Shahar ,  Shay Ben-Haim ,  Eyal Davidovitz ,  Oz Woller

    IPC: G06F12/1009 ,  G06F12/0882

    Abstract: In one embodiment, a processing device includes a memory to store a plurality of memory pages having corresponding physical memory addresses in the memory, store an active multilevel page table (MPT) mapping virtual to physical memory addresses for corresponding allocated memory pages stored in the memory, and store a floating MPT at least partially mapping virtual to physical memory addresses for corresponding spare memory pages stored in the memory, the floating and active MPT using a common mapping scheme, and a processor to receive a request to add a virtual to physical address mapping for more memory pages of the plurality of memory pages to the active MPT, and in response to receiving the request, adjoin at least part of the floating MPT to the active MPT so that the active MPT provides the virtual to physical address mapping for at least some memory pages of the spare memory pages.

    Secure in-service firmware update
    38.
    发明授权
    Secure in-service firmware update 有权

    公开(公告)号：US12223051B2

    公开(公告)日：2025-02-11

    申请号：US18349147

    申请日：2023-07-09

    Applicant: Mellanox Technologies, Ltd.

    Inventor： Mor Hoyda Sfadia ,  Yuval Itkin ,  Ahmad Atamli ,  Ariel Shahar ,  Yaniv Strassberg ,  Itsik Levi

    IPC: G06F21/57 ,  G06F8/65 ,  G06F9/445

    Abstract: A computer system includes a volatile memory and at least one processor. The volatile memory includes a protected storage segment (PSS) configured to store firmware-authentication program code for authenticating firmware of the computer system. The at least one processor is configured to receive a trigger to switch to a given version of the firmware, to obtain, in response to the trigger, a privilege to access the PSS, to authenticate the given version of the firmware by executing the firmware-authentication program code from the PSS, to switch to the given version of the firmware upon successfully authenticating the given version, and to take an alternative action upon failing to authenticate the given version.

    STRIDED MESSAGE BASED RECEIVE BUFFER
    39.
    发明申请
    STRIDED MESSAGE BASED RECEIVE BUFFER 有权

    公开(公告)号：US20250030649A1

    公开(公告)日：2025-01-23

    申请号：US18224258

    申请日：2023-07-20

    Applicant: Mellanox Technologies, Ltd.

    Inventor： Ortal Ben Moshe ,  Roee Moyal ,  Shay Aisman ,  Gil Bloch ,  Ariel Shahar ,  Roman Nudelman ,  Gil Kremer ,  Yossef Itigin ,  Lior Narkis

    IPC: H04L49/9057

    Abstract: Systems and methods are described herein for processing data packets. An example network adapter may include a network interface operatively coupled to a communication network and packet processing circuitry operatively coupled to the network interface. The packet processing circuitry is configured to receive, via the network interface, a plurality of data packets associated with a message; determine, for each data packet, at least one corresponding reserved stride in a strided buffer; store each data packet in the at least one corresponding reserved stride; process the strided buffer upon storing the plurality of data packets in a corresponding plurality of reserved strides; and generate a completion notification indicating that the plurality of data packets in the strided buffer has been processed.

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