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    SENSE OPERATION FLAGS IN A MEMORY DEVICE
    34.
    发明申请
    SENSE OPERATION FLAGS IN A MEMORY DEVICE 有权
    在存储器中识别操作标志

    公开(公告)号：US20150363313A1

    公开(公告)日：2015-12-17

    申请号：US14833175

    申请日：2015-08-24

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Shafqat Ahmed ,  Khaled Hasnat ,  Pranav Kalavade ,  Krishna Parat ,  Aaron Yip ,  Mark A. Helm ,  Andrew Bicksler

    IPC: G06F12/08 ,  G06F13/28 ,  G06F3/06

    CPC classification number: G06F3/0625 ,  G06F3/061 ,  G06F3/0653 ,  G06F3/0665 ,  G06F3/0688 ,  G06F3/0689 ,  G06F12/0804 ,  G06F12/0846 ,  G06F13/28 ,  G06F2212/2022 ,  G06F2212/224 ,  G06F2212/461 ,  G11C16/0483 ,  G11C16/24 ,  G11C16/26 ,  Y02D10/14

    Abstract: Memory devices, methods for programming sense flags, methods for sensing flags, and memory systems are disclosed. In one such memory device, the odd bit lines of a flag memory cell array are connected with a short circuit to a dynamic data cache. The even bit lines of the flag memory cell array are disconnected from the dynamic data cache. When an even page of a main memory cell array is read, the odd flag memory cells, comprising flag data, are read at the same time so that it can be determined whether the odd page of the main memory cell array has been programmed. If the flag data indicates that the odd page has not been programmed, threshold voltage windows can be adjusted to determine the states of the sensed even memory cell page.

    Abstract translation: 公开了存储器件，用于编程感测标志的方法，用于感测标志的方法和存储器系统。 在一个这样的存储器件中，标志存储器单元阵列的奇数位线与短路连接到动态数据高速缓存。 标记存储单元阵列的偶数位线与动态数据高速缓存断开连接。 当读取主存储单元阵列的偶数页时，同时读取包括标志数据的奇数标志存储单元，以便可以确定主存储单元阵列的奇数页是否已被编程。 如果标志数据指示奇数页未被编程，则可以调整阈值电压窗口以确定感测到的偶数存储单元页的状态。

    METHODS AND APPARATUSES HAVING STRINGS OF MEMORY CELLS INCLUDING A METAL SOURCE
    35.
    发明申请
    METHODS AND APPARATUSES HAVING STRINGS OF MEMORY CELLS INCLUDING A METAL SOURCE 有权
    具有包含金属源的记忆细胞束的方法和装置

    公开(公告)号：US20150123188A1

    公开(公告)日：2015-05-07

    申请号：US14069553

    申请日：2013-11-01

    Applicant: Micron Technology, Inc.

    Inventor： Zhenyu Lu ,  Roger W. Lindsay ,  Andrew Bicksler ,  Yongjun J. Hu ,  Haitao Liu

    IPC: H01L27/115

    CPC classification number: H01L27/11556 ,  H01L23/5283 ,  H01L27/11524 ,  H01L29/456 ,  H01L29/66825 ,  H01L29/7926

    Abstract: Methods for forming a string of memory cells, an apparatus having a string of memory cells, and a system are disclosed. A method for forming the string of memory cells comprises forming a metal silicide source material over a substrate. The metal silicide source material is doped. A vertical string of memory cells is formed over the metal silicide source material. A semiconductor material is formed vertically and adjacent to the vertical string of memory cells and coupled to the metal silicide source material.

    Abstract translation: 公开了形成一串存储器单元的方法，具有一串存储单元的装置和系统。 一种用于形成存储单元串的方法包括在衬底上形成金属硅化物源材料。 掺杂金属硅化物源材料。 在金属硅化物源材料上形成垂直的存储单元串。 半导体材料垂直地形成并且与垂直的存储单元串相邻并且耦合到金属硅化物源材料。

    Semiconductor device structures and memory devices including a uniform pattern of conductive material
    36.
    发明授权
    Semiconductor device structures and memory devices including a uniform pattern of conductive material 有权
    半导体器件结构和存储器件包括导电材料的均匀图案

    公开(公告)号：US08729708B2

    公开(公告)日：2014-05-20

    申请号：US13781027

    申请日：2013-02-28

    Applicant: Micron Technology, Inc.

    Inventor： Andrew Bicksler

    IPC: H01L21/00

    CPC classification number: H01L23/48 ,  H01L27/0207 ,  H01L27/11519 ,  H01L27/11521 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: Methods of forming semiconductor device structures are disclosed. One method comprises forming a plurality of loops of a conductive material. Each loop of the plurality of loops comprises a uniform pattern. In one embodiment, a portion of the conductive material is removed from at least one location in each loop of the plurality of loops. Contacts are formed to the conductive material. A semiconductor device structure is also disclosed.

    Abstract translation: 公开了形成半导体器件结构的方法。 一种方法包括形成导电材料的多个环。 多个回路中的每个回路包括均匀的图案。 在一个实施例中，导电材料的一部分从多个环的每个环中的至少一个位置移除。 触点形成为导电材料。 还公开了半导体器件结构。

    MEMORY ARRAY WITH AN AIR GAP BETWEEN MEMORY CELLS AND THE FORMATION THEREOF
    37.
    发明申请
    MEMORY ARRAY WITH AN AIR GAP BETWEEN MEMORY CELLS AND THE FORMATION THEREOF 有权
    记忆阵列与记忆细胞之间的空隙及其形成

    公开(公告)号：US20130260521A1

    公开(公告)日：2013-10-03

    申请号：US13902052

    申请日：2013-05-24

    Applicant: Micron Technology, Inc.

    Inventor： Andrew Bicksler ,  Christopher J. Larsen

    IPC: H01L29/66

    CPC classification number: H01L29/66825 ,  H01L21/764 ,  H01L27/115 ,  H01L27/11517 ,  H01L27/11521 ,  H01L27/11568 ,  H01L29/66833

    Abstract: A method of forming a memory array includes forming a dielectric over a semiconductor, forming a charge-storage structure over the dielectric, forming an isolation region through the dielectric and the charge-storage structure and extending into the semiconductor, recessing the isolation region to a level below a level of an upper surface of the dielectric and at or above a level of an upper surface of the semiconductor, forming an access line over the charge-storage structure and the recessed isolation region, and forming an air gap over the recessed isolation region so that the air gap passes through the charge-storage structure, so that the air gap extends to and terminates at a bottom surface of the access line, and so that the entire air gap is between the bottom surface of the access line and the upper surface of the semiconductor.

    Abstract translation: 形成存储器阵列的方法包括在半导体上形成电介质，在电介质上形成电荷存储结构，通过电介质和电荷存储结构形成隔离区并延伸到半导体中，使隔离区凹陷到 电平低于电介质的上表面的电平并且在半导体的上表面的水平以上，在电荷存储结构和凹陷隔离区域上形成存取线，并且在凹陷隔离件上形成气隙 区域，使得气隙通过电荷存储结构，使得气隙延伸到并终止于进入管线的底表面，并且使得整个气隙位于进入管线的底表面和 半导体的上表面。

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