公开(公告)号：US10852344B2

公开(公告)日：2020-12-01

申请号：US15839559

申请日：2017-12-12

Applicant: Micron Technology, Inc.

Inventor： Tony M. Lindenberg ,  Kurt J. Bossart ,  Jonathan S. Hacker ,  Chandra S. Tiwari

IPC: G01R31/28 ,  H01L21/67 ,  G01R1/073 ,  H01L21/68

Abstract: A testing probe apparatus for testing die. The testing probe may include a probe interface and a carrier for supporting at least one die comprising 3DI structures. The probe interface may be positionable on a first side of the at least one die and include a voltage source and at least one first inductor operably coupled to the voltage source. A voltage sensor and at least one second inductor coupled to the voltage sensor may be disposed on a second opposing side of the at least one die. The voltage source of the probe interface may be configured to inductively cause a voltage within the 3DI structures of the at least one die via the at least one first inductor. The voltage sensor may be configured to sense a voltage within the at least one 3DI structure via the at least one second inductor. Related systems and methods are also disclosed.

公开(公告)号：US10763131B2

公开(公告)日：2020-09-01

申请号：US15817000

申请日：2017-11-17

Applicant: Micron Technology, Inc.

Inventor： Shijian Luo ,  Jonathan S. Hacker

IPC: H01L23/498 ,  H01L21/56 ,  H01L23/31 ,  H01L23/00

Abstract: A semiconductor device includes a substrate including traces, wherein the traces protrude above a top surface of the substrate; a prefill material over the substrate and between the traces, wherein the prefill material directly contacts peripheral surfaces of the traces; a die attached over the substrate; and a wafer-level underfill between the prefill material and the die.

公开(公告)号：US10446431B2

公开(公告)日：2019-10-15

申请号：US15855622

申请日：2017-12-27

Applicant: Micron Technology, Inc.

Inventor： Jonathan S. Hacker

IPC: B32B43/00 ,  H01L21/00 ,  H01L21/683 ,  H01L21/67 ,  H01L23/00

Abstract: Systems and methods for debonding a carrier from a semiconductor device are disclosed herein. In one embodiment, a system for debonding a carrier from a semiconductor device includes a support member positioned to carry the semiconductor device and a fluid delivery device having an exit positioned to direct a fluid toward an adhesive layer between the carrier and the semiconductor device. The fluid directed from the fluid delivery device initiates debonding of the carrier from the semiconductor device by weakening or loosening at least a portion of the adhesive. The system further includes a liftoff device configured to releasably engage the carrier and apply a debonding force to the carrier to complete debonding of the carrier from the semiconductor device.

公开(公告)号：US20190178933A1

公开(公告)日：2019-06-13

申请号：US15839559

申请日：2017-12-12

Applicant: Micron Technology, Inc.

Inventor： Tony M. Lindenberg ,  Kurt J. Bossart ,  Jonathan S. Hacker ,  Chandra S. Tiwari

IPC: G01R31/28 ,  H01L21/67 ,  H01L21/68 ,  G01R1/073

Abstract: A testing probe apparatus for testing die. The testing probe may include a probe interface and a carrier for supporting at least one die comprising 3DI structures. The probe interface may be positionable on a first side of the at least one die and include a voltage source and at least one first inductor operably coupled to the voltage source. A voltage sensor and at least one second inductor coupled to the voltage sensor may be disposed on a second opposing side of the at least one die. The voltage source of the probe interface may be configured to inductively cause a voltage within the 3DI structures of the at least one die via the at least one first inductor. The voltage sensor may be configured to sense a voltage within the at least one 3DI structure via the at least one second inductor. Related systems and methods are also disclosed.

公开(公告)号：US20190157111A1

公开(公告)日：2019-05-23

申请号：US15817000

申请日：2017-11-17

Applicant: Micron Technology, Inc.

Inventor： Shijian Luo ,  Jonathan S. Hacker

IPC: H01L21/56 ,  H01L23/31 ,  H01L23/00

Abstract: A semiconductor device includes a substrate including traces, wherein the traces protrude above a top surface of the substrate; a prefill material over the substrate and between the traces, wherein the prefill material directly contacts peripheral surfaces of the traces; a die attached over the substrate; and a wafer-level underfill between the prefill material and the die.

公开(公告)号：US20190051623A1

公开(公告)日：2019-02-14

申请号：US15982129

申请日：2018-05-17

Applicant: Micron Technology, Inc.

Inventor： Mayukhee Das ,  Jonathan S. Hacker ,  Christopher J. Gambee ,  Chandra S. Tiwari

IPC: H01L23/00 ,  H01L25/065 ,  H01L21/66

Abstract: Semiconductor devices having discretely located passivation material are disclosed herein. In one embodiment, a semiconductor device assembly can include a bond pad having a bonding surface with a process artifact. A passivation material can be positioned to at least partially fill a portion of the process artifact. A conductive structure can be positioned to extend across the bonding surface of the bond pad.

公开(公告)号：US20180033781A1

公开(公告)日：2018-02-01

申请号：US15728123

申请日：2017-10-09

Applicant: Micron Technology, Inc.

Inventor： Wei Zhou ,  Aibin Yu ,  Zhaohui Ma ,  Sony Varghese ,  Jonathan S. Hacker ,  Bret K. Street ,  Shijian Luo

IPC: H01L25/18 ,  H01L21/683 ,  H01L21/78 ,  H01L23/544 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  H01L21/56 ,  H01L23/31

CPC classification number: H01L25/18 ,  H01L21/561 ,  H01L21/563 ,  H01L21/6835 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/544 ,  H01L24/81 ,  H01L24/94 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68359 ,  H01L2221/68381 ,  H01L2223/54433 ,  H01L2223/54486 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/18161 ,  H01L2224/03 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/014

Abstract: Methods of making semiconductor device packages may involve attaching a first semiconductor die to a carrier wafer, an inactive surface of the first semiconductor die facing the carrier wafer. One or more additional semiconductor die may be stacked on the first semiconductor die on a side of the first semiconductor die opposite the carrier wafer to form a stack of semiconductor dice. A protective material may be positioned over the stack of semiconductor dice, a portion of the protective material extending along side surfaces of the first semiconductor die to a location proximate the inactive surface of the first semiconductor die. The carrier wafer may be detached from the first semiconductor die.

公开(公告)号：US09865578B2

公开(公告)日：2018-01-09

申请号：US14730681

申请日：2015-06-04

Applicant: Micron Technology, Inc.

Inventor： Wei Zhou ,  Aibin Yu ,  Zhaohui Ma ,  Sony Varghese ,  Jonathan S. Hacker ,  Bret K. Street ,  Shijian Luo

IPC: H01L29/40 ,  H01L25/18 ,  H01L25/065 ,  H01L25/00 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/544 ,  H01L21/683 ,  H01L21/78

CPC classification number: H01L25/18 ,  H01L21/561 ,  H01L21/563 ,  H01L21/6835 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/544 ,  H01L24/81 ,  H01L24/94 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68359 ,  H01L2221/68381 ,  H01L2223/54433 ,  H01L2223/54486 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/18161 ,  H01L2224/03 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/014

Abstract: Methods of making semiconductor device packages may involve attaching a first semiconductor die to a carrier wafer, an inactive surface of the first semiconductor die facing the carrier wafer. One or more additional semiconductor die may be stacked on the first semiconductor die on a side of the first semiconductor die opposite the carrier wafer to form a stack of semiconductor dice. A protective material may be positioned over the stack of semiconductor dice, a portion of the protective material extending along side surfaces of the first semiconductor die to a location proximate the inactive surface of the first semiconductor die. The carrier wafer may be detached from the first semiconductor die.