公开(公告)号：US6070221A

公开(公告)日：2000-05-30

申请号：US130350

申请日：1998-08-13

申请人： Kazuo Nakamura

发明人： Kazuo Nakamura

IPC分类号： G06F9/48 ,  G06F13/26

CPC分类号： G06F13/26

摘要： An interrupt controller comprises a plurality of interrupt handling elements that are given different identification numbers for identification to which priorities are assigned. A first priority encoder accepts a plurality of level signals which are given different level numbers respectively representing the priorities assigned to the identification numbers, and then encodes the level number assigned to the highest-priority level signal included among all level signals at a low potential so as to generate an interrupt level number representing the encoded level number. Each interrupt handling element includes a current-sinking unit for sinking one of the level signals specified by the output of a level number register into a ground so that the specified level signal sinks to a low potential, and a comparator for comparing the level number represented by the output of the level number register with the interrupt level number from the first priority encoder to generate a comparison result signal indicating the comparison result. A second priority encoder accepts a plurality of comparison result signals from the plurality of interrupt handling elements, and then encodes the identification number assigned to one of the interrupt handling elements whose identification number has the highest priority and which is included among all interrupt handling elements each of which has furnished a comparison signal indicating that a corresponding level number is equal to the interrupt level number from the priority encoder so as to generate an interrupt identification number representing the encoded identification number.

摘要翻译： 中断控制器包括多个中断处理元件，其被赋予不同的识别号码，用于识别优先级被分配给哪个识别号码。 第一优先编码器接受多个电平信号，这些电平信号被分别表示分配给识别号码的优先级的不同电平数字，然后将分配给包括在所有电平信号中的最高优先级电平信号的电平编码为低电位编码 以产生表示编码级数的中断级数。 每个中断处理元件包括电流吸收单元，用于将由电平数寄存器的输出指定的电平信号中的一个信号吸入地，以使指定的电平信号陷入低电位;以及比较器，用于比较表示的电平数 通过电平数量寄存器的输出与来自第一优先级编码器的中断级别编号，以产生指示比较结果的比较结果信号。 第二优先级编码器接受来自多个中断处理单元的多个比较结果信号，然后对分配给识别号码具有最高优先级的中断处理单元之一的识别号进行编码，并将其包括在所有中断处理单元中 其中提供了一个比较信号，指示对应的电平数等于来自优先编码器的中断电平数，以产生表示编码的识别号的中断识别号。

公开(公告)号：US5937375A

公开(公告)日：1999-08-10

申请号：US758250

申请日：1996-11-27

申请人： Kazuo Nakamura

发明人： Kazuo Nakamura

IPC分类号： G10L11/02 ,  G10L11/06 ,  G10L15/04 ,  G10L9/18

CPC分类号： G10L25/78

摘要： A voice presence/absence discriminator can accurately determine the presence or absence of a voice in a frame that includes an uttered syllable head portion of an input voice and avoids performing erroneous determinations in bad environments such as those where background noise is of a high magnitude. In a sub-frame power calculation section, a sub-frame power Pm is calculated in units of sub-frames prepared by dividing a frame into four sub-frame portions. Based on this sub-frame power Pm, in a frame maximum power production section, a moving average (short-period average value) of the power of a sub-frame and the power of a sub-frame that precedes this sub-frame by one unit are calculated in units of a sub-frame and the short-period average values are compared with each other among the sub-frames that constitute the same frame to thereby select a maximum one of them as the frame maximum power Pf of this frame. As a result, even when voicing has been started from an ending half of the frame, there is no possibility that the frame maximum power Pf will be determined to be small in magnitude and this frame is reliably determined to be a voice presence frame in a voice presence determination portion.

摘要翻译： 语音存在/不存在鉴别器可以准确地确定包括输入语音的发音音节头部的帧中的语音的存在或不存在，并且避免在恶劣环境（例如背景噪声为高大小的那些环境）中执行错误确定。 在子帧功率计算部分中，以通过将帧划分为四个子帧部分而准备的子帧为单位计算子帧功率Pm。 基于该子帧功率Pm，在帧最大功率产生部中，子帧的功率的移动平均（短周期平均值）和在该子帧之前的子帧的功率由 以子帧为单位计算一个单位，并且在构成相同帧的子帧之间比较短周期平均值，从而选择其中最大的一个作为该帧的帧最大功率Pf 。 结果，即使从帧的结束一半开始发声，也不可能将帧最大功率Pf确定为小幅度，并且该帧被可靠地确定为是在帧的最大功率Pf中的语音存在帧 语音存在确定部分。

公开(公告)号：US5708800A

公开(公告)日：1998-01-13

申请号：US487170

申请日：1995-06-07

申请人： Hiroshi Tateishi ,  Hiroki Takahashi ,  Kazuo Nakamura

发明人： Hiroshi Tateishi ,  Hiroki Takahashi ,  Kazuo Nakamura

IPC分类号： G06F12/04 ,  G06F5/00 ,  G06F9/30 ,  G06F9/315 ,  G06F7/10

CPC分类号： G06F5/00

摘要： A microprocessor comprises a control section for receiving a transfer instruction and transferring N-bits of M-bit data stored at a transfer-source address in a first memory to a transfer-destination address in a second memory in response to a received transfer instruction. In this microprocessor, the transfer of N-bits is performed with the execution of a single transfer instruction. Hence, the memory area required for storing the transfer instructions is reduced, and the residual memory area can be used for other purposes, which improves the efficiency in the use of the memory. The control section stores in the first memory of the microprocessor all the interim results obtained during the execution of a transfer instruction and outputs only the final result to the external memory, reducing the number of machine cycles required for data transfer between the microprocessor and the memory, and further reducing the execution time for data transfer in the microprocessor.

摘要翻译： 微处理器包括控制部分，用于响应于接收到的传送指令，接收传送指令并将存储在第一存储器中的传送源地址的N位的M位数据传送到第二存储器中的传送目的地地址。 在该微处理器中，通过执行单个传送指令来执行N位的传送。 因此，存储转移指令所需的存储区域减少，并且剩余存储区域可以用于其他目的，这提高了存储器的使用效率。 控制部分在微处理器的第一存储器中存储在执行传送指令期间获得的所有中间结果，并且仅将最终结果输出到外部存储器，从而减少微处理器和存储器之间的数据传送所需的机器周期数 并且进一步减少微处理器中的数据传输的执行时间。

公开(公告)号：US5343081A

公开(公告)日：1994-08-30

申请号：US933118

申请日：1992-08-21

申请人： Kazuo Nakamura

发明人： Kazuo Nakamura

IPC分类号： H01L29/06 ,  G06G7/60 ,  G06N3/063 ,  H01L27/10 ,  H01L29/00 ,  H01L29/66 ,  H01L29/76 ,  H01L29/80 ,  H01L39/22 ,  H03K19/195 ,  G06G7/12 ,  H01J17/36

CPC分类号： H01L29/7606 ,  G06N3/0635 ,  Y10S250/91

摘要： According to the present invention, there is provided a semiconductor synapse circuit comprising a semiconductor having an electrically charged carrier gas which is provided with a plurality of electrically isolated input channels providing narrowed areas 21 through 24 respectively for restricting the emitting direction of the electrically charged carriers from emitter electrodes 11 through 14 as the exit, gate electrodes 31 through 34 for applying an electrostatic potential for changing the traveling direction of the carriers emitted from the input channels, a single narrowed area 41 positioned opposed to the exits 21 through 24 of the input channels for passing through only the carriers traveling in the restricted direction and an acceptor electrode 40 for collecting the carriers which have passed through the single narrowed area.Since it utilizes the ballistic performance of the carriers, as compared with the conventionally proposed circuit, a synapse circuit whose area is greatly reduced and whose operating speed is improved can be realized. Thus, it becomes possible to further improve the degree of integration and reduce the delay time at the line.

摘要翻译： 根据本发明，提供了一种半导体突触电路，其包括具有带电荷的载气的半导体，该半导体具有多个电隔离的输入通道，该多个电隔离的输入通道分别用于限制带电载体的发射方向 从作为出射口的发射电极11至14，用于施加用于改变从输入通道发射的载流子的行进方向的静电电位的栅电极31至34，与输入端的出口21至24相对定位的单个变窄区域41 用于仅通过在限制方向上行进的载体的通道和用于收集已经通过单个变窄区域的载体的受电极40。 由于利用载波的弹道性能，与现有技术的电路相比，可以实现面积大大降低，工作速度提高的突触电路。 因此，可以进一步提高集成度并减少线路上的延迟时间。

公开(公告)号：US5280566A

公开(公告)日：1994-01-18

申请号：US669131

申请日：1991-03-13

申请人： Kazuo Nakamura

发明人： Kazuo Nakamura

IPC分类号： G06F9/44 ,  G06N5/04 ,  G06N7/02

CPC分类号： G06N5/048 ,  G06N7/026 ,  Y10S706/90

摘要： A fuzzy inference method which improves reliability of an inference result by obtaining a variance which is a statistical value. The variance considers not only the value of a membership function derived from performing maximum operation (logical AND) but also a position of the function. These values are added and, according to this result, any inconsistency in fuzzy rules is detected.

摘要翻译： 一种模糊推理方法，其通过获得作为统计值的方差来提高推理结果的可靠性。 方差不仅考虑从执行最大操作（逻辑AND）导出的隶属函数的值，还考虑函数的位置。 添加这些值，根据该结果，检测到模糊规则中的任何不一致。

公开(公告)号：US5179629A

公开(公告)日：1993-01-12

申请号：US599328

申请日：1990-10-17

申请人： Kazuo Nakamura

发明人： Kazuo Nakamura

IPC分类号： G05B13/02 ,  G06F9/44 ,  G06N7/02 ,  G06N7/04

CPC分类号： G06N7/04 ,  Y10S706/90

摘要： A fuzzy computer which is provided with a control part for generating control information to define a trapezoidal membrship function, an operating unit for calculating the both oblique sides of the trapezoid by operating input data according to the control information, a comparator (overflow detection circuit) for comparing operation results of the operating unit with a predetermined value which is based on the control information, and a data elector for selecting, according to the comparison results of the comparator, either of the operation results of the operating unit or the predetermined value in order to obtain the both bases of the trapezoid, that is, both of the maximum and minimum values of the membership function, in order to generate the membership function, as a result, the fuzzy computer entails neither a large-storage memory nor complicated software operations which need processing time.

摘要翻译： 一种模糊计算机，其具有用于产生控制信息以定义梯形记录功能的控制部分，用于通过根据控制信息操作输入数据来计算梯形的两个斜边的操作单元;比较器（溢出检测电路） 用于将操作单元的操作结果与基于控制信息的预定值进行比较;以及数据选择器，用于根据比较器的比较结果来选择操作单元的操作结果或者操作单元的操作结果 为了获得梯形的两个基数，即隶属函数的最大值和最小值，为了生成隶属函数，结果是模糊计算机既不需要大容量存储器也不需要复杂的软件 需要处理时间的操作。

公开(公告)号：US4890251A

公开(公告)日：1989-12-26

申请号：US159869

申请日：1988-02-24

申请人： Yasuhiko Nitta ,  Kazuo Nakamura

发明人： Yasuhiko Nitta ,  Kazuo Nakamura

IPC分类号： G06F7/00 ,  G06F5/01 ,  G06F7/48 ,  G06F7/76

CPC分类号： G06F5/015 ,  G06F7/48 ,  G06F7/49994

摘要： A shifter for shifting a first data word by a bit width which is specified by a second data word. The shifter provides a sign extension so that the shifter can be used for arithmetic shifts. The shifter includes a first inverter for inverting the bits of the first data word only when the most significant bit of the data word is a predetermined datum. The output from the inverter is shifted, using a shifter array, by a bit width specified by the second data word. The output from the shifter array is provided to a second inverter. The second inverter inverts the output from the shifter array only if the most significant bit of the first data word is a predetermined datum.

摘要翻译： 一种用于将第一数据字移位由第二数据字指定的位宽度的移位器。 移位器提供符号扩展，使得移位器可以用于算术移位。 移位器包括第一反相器，用于仅在数据字的最高有效位是预定数据时才反转第一数据字的位。 使用移位器阵列将来自反相器的输出移位由第二数据字指定的位宽度。 来自移位器阵列的输出被提供给第二反相器。 只有当第一数据字的最高有效位是预定的数据时，第二个反相器才会反转移位器阵列的输出。

公开(公告)号：US4862139A

公开(公告)日：1989-08-29

申请号：US232865

申请日：1988-08-16

申请人： Masaaki Fukamachi ,  Nobuyuki Onitsuka ,  Akira Tanaka ,  Kazuo Nakamura

发明人： Masaaki Fukamachi ,  Nobuyuki Onitsuka ,  Akira Tanaka ,  Kazuo Nakamura

IPC分类号： B60R25/10 ,  B60R25/24 ,  G07C9/00

CPC分类号： B60R25/24 ,  B60R25/1001 ,  G07C9/00182 ,  G07C9/00738 ,  B60R25/1003 ,  B60R25/1018 ,  G07C2009/00785

摘要： A signal is received from a key having predetermined information. A resulting output signal is discriminated as to whether it represents the predetermined information. A predetermined anti-theft operation is actuated in response to output signals from first and second detectors indicating that at least one predetermined one of the covering members is closed and locked. Operation of the actuator is disabled in response to an output signal indicating that the received signal represents the predetermined information. The key includes a magnetic element forming first predetermined information, and light emitting elements for emitting infrared ray carrying second predetermined information. The predetermined anti-theft operation is actuated in response to an output signal from a third detector indicating that the key has been removed from a predetermined key hole, in addition to the output signals from the first and second detectors.

摘要翻译： 从具有预定信息的键接收信号。 得到的输出信号被判定为是否表示预定信息。 响应于来自第一和第二检测器的输出信号来启动预定的防盗操作，指示覆盖构件中的至少一个预定的一个闭合和锁定。 响应于指示接收到的信号表示预定信息的输出信号，致动器的操作被禁用。 键包括形成第一预定信息的磁性元件和用于发射携带第二预定信息的红外线的发光元件。 除了来自第一和第二检测器的输出信号之外，响应于来自第三检测器的指示键已经从预定键孔移除的输出信号，预定的防盗操作被致动。

公开(公告)号：US4745506A

公开(公告)日：1988-05-17

申请号：US89945

申请日：1987-08-26

申请人： Kazuo Nakamura ,  Seishi Sasaki ,  Ken Takahashi ,  Hiroshi Yohda ,  Nobuyuki Kaminaka

发明人： Kazuo Nakamura ,  Seishi Sasaki ,  Ken Takahashi ,  Hiroshi Yohda ,  Nobuyuki Kaminaka

IPC分类号： G11B5/127 ,  G11B5/17 ,  G11B5/31 ,  G11B5/147 ,  G11B5/187 ,  G11B5/23

CPC分类号： G11B5/1278 ,  G11B5/17 ,  G11B5/3103

摘要： A perpendicular magnetic head of high recording and reproducing efficiency which integrally incorporates a step-up transformer. A main pole for picking up a reproduce magnetic flux from a recording medium and applying recording magnetic field thereto is formed of a magnetic thin film. A signal winding formed of a thin film is disposed in the immediate vicinity of the forward end of the main pole so as to have a high conversion sensitivity per turn with respect to the reproduce magnetic flux from the recording medium. The signal winding which itself constitutes a closed circuit interlinks a magnetic path of the step-up transformer, thereby forming a primary winding of the transformer. A secondary winding from which head output is taken out is wound in the magnetic path of the transformer.

摘要翻译： 具有高记录和再现效率的垂直磁头，其整体结合了升压变压器。 用于从记录介质拾取再现磁通并向其施加记录磁场的主极由磁性薄膜形成。 由薄膜形成的信号绕组设置在主极的前端附近，以便相对于来自记录介质的再现磁通具有高的每转转换灵敏度。 本身构成闭路的信号绕组使升压变压器的磁路相互连接，从而形成变压器的初级绕组。 取出头部输出的次级绕组缠绕在变压器的磁路中。

公开(公告)号：US4647932A

公开(公告)日：1987-03-03

申请号：US488342

申请日：1983-04-25

申请人： Takesi Ono ,  Kazuo Nakamura ,  Toshio Okamoto

发明人： Takesi Ono ,  Kazuo Nakamura ,  Toshio Okamoto

IPC分类号： G05D13/00 ,  G01S11/10 ,  G05D1/10 ,  G01S3/02

CPC分类号： G01S11/10

摘要： A system for measuring the velocity of a spacecraft from a position onboard the spacecraft is disclosed. This system includes a radio wave receiver means for receiving pulse trains from a plurality of preselected pulsars. A velocity measuring unit located on the spacecraft measures the velocity of the spacecraft based on the Doppler shift of the pulse trains transmitted from each of the plurality of preselected pulsars.

摘要翻译： 公开了一种用于从航天器上的位置测量航天器的速度的系统。 该系统包括用于从多个预选脉冲发生器接收脉冲序列的无线电波接收装置。 位于航天器上的速度测量单元基于从多个预先选择的脉冲星中的每一个发送的脉冲序列的多普勒频移来测量航天器的速度。