摘要:
The present disclosure generally relates to forming a metallization layer in a semiconductor device. In particular, this disclosure concerns the damascene inlay technique in low-k dielectric layers. Etching trenches and vias in low-k dielectric materials leads to uneven and porous sidewalls of the trenches and vias due to the porous nature of the low-k dielectric materials. Thus, smooth and dense sidewalls cannot be achieved, which is a prerequisite for an effective barrier layer, which prevents copper from being diffused into the low-k dielectric material. As a consequence, process tolerances are high and the reliability of the semiconductor device is reduced. The present disclosure overcomes these drawbacks by a surface treatment of the sidewalls of trenches and vias in order to densify the surface such that the following barrier layer may more effectively prevent copper from diffusing into the low-k or ultra high-k dielectric material.
摘要:
A method of forming a semiconductor structure comprises providing a substrate comprising a layer of a first material. A protection layer is formed over the layer of first material. At least one opening is formed in the layer of first material and the protection layer. A layer of a second material is formed over the layer of first material and the protection layer to fill the opening with the second material. A planarization process is performed to remove portions of the layer of second material outside the opening. At least a portion of the protection layer is not removed during the planarization process. An etching process is performed to remove the portions of the protection layer which were not removed during the planarization process.
摘要:
By providing a highly stressed interlayer dielectric material, the performance of at least one type of transistor may be increased due to an enhanced strain-inducing mechanism. For instance, by providing a highly compressive silicon dioxide of approximately 400 Mega Pascal and more as an interlayer dielectric material, the drive current of the P-channel transistors may be increased by 2% and more while not unduly affecting the performance of the N-channel transistors.
摘要:
By incorporating a material exhibiting a high adhesion on chamber walls of a process chamber during sputter etching, the defect rate in a patterning sequence on the basis of an ARC layer may be significantly reduced, since the adhesion material may be reliably exposed during a sputter preclean process. The corresponding adhesion layer may be positioned within the ARC layer stack so as to be reliably consumed, at least partially, while nevertheless providing the required optical characteristics. Hence, a low defect rate in combination with a high process efficiency may be achieved.
摘要:
Degradation acids obtained in the synthesis of carboxylic acids, in particular dicarboxylic acids, having from 8 to 16 carbon atoms may be isolated by separating the degradation acids in the form of a solid from the crude reaction mixture, then washing the degradation acids in the form of an oil with water at an elevated temperature. The resulting degradation acids having low oxidant and metal contents, and the metal catalyst may be recirculated back to the process.
摘要:
A motor actuator of a climate control system includes an specialized electric motor with a motor housing enclosing an encoder ring on a motor shaft having a plurality of opposite encoder-segment sets with encoder brushes on the housing wiping the encoder ring and thereby forming an encoder circuit through opposite segments of the encoder-segment sets. The electric motor further includes power and encoder terminals positioned externally of the motor housing with at least one power terminal being electrically coupled to one of the power brushes and at least one encoder terminal being electrically coupled to one of the encoder brushes. A control head of the system includes a continuity pulse counter coupled to the at least one encoder terminal for creating pulses representative of impedance in the encoder circuit and, therefore, movement of the motor shaft and a damper linked thereto.
摘要:
A molding composition comprises from 80 to 99.9 parts by weight of thermoplastic polyester and from 0.1 to 20 parts by weight of a polyamide-polyamine graft copolymer, where the sum of the parts by weight of the polyester and of the graft copolymer is 100. The molding composition has improved flowability.
摘要:
A molding composition of at least 50% by weight of a polyamine-polyamide copolymer obtained from 0.05 to 2.5% by weight of a polyamine having at least 4 nitrogen atoms and having a viscosity of at least 5 000 Pa•s at 250° C. and at a shear rate of 0.1 l/s, and having a viscosity ratio of at least 7 at 250° C., when the melt viscosities at shear rates of 0.1 l/s and 100 l/s are compared with one another, has high melt stiffness and is easy to cut, and performs well in blow molding.
摘要:
The present disclosure provides manufacturing techniques and semiconductor devices in which performance of P-channel transistors may be enhanced on the basis of a stress mechanism that involves the deposition of a dielectric bi-layer system. Contrary to conventional strategies, an additional pre-treatment may be performed prior to the deposition of an adhesion layer in a plasma-free process atmosphere, thereby enabling a reduced thickness of the adhesion layer and a higher internal stress level of the subsequent top layer.
摘要:
Interlayer connections, i.e., vertical connections, may be formed on the basis of a hard mask material, which may be positioned below, within or above an interlayer dielectric material, wherein one lateral dimension is defined by a trench mask, thereby obtaining a desired interlayer connection in a common patterning process. Furthermore, the thickness of at least certain portions of the metal lines may be adjusted with a high degree of flexibility, thereby providing the possibility of significantly reducing the overall resistivity of metal lines in metal levels, in which device performance may significantly depend on resistivity rather than parasitic capacitance.