公开(公告)号：US11417681B2

公开(公告)日：2022-08-16

申请号：US17215308

申请日：2021-03-29

Applicant: Micron Technology, Inc.

Inventor： Yi Hu ,  Merri L. Carlson ,  Anilkumar Chandolu ,  Indra V. Chary ,  David Daycock ,  Harsh Narendrakumar Jain ,  Matthew J. King ,  Jian Li ,  Brett D. Lowe ,  Prakash Rau Mokhna Rau ,  Lifang Xu

IPC: H01L27/11582 ,  H01L27/11556 ,  H01L27/11565 ,  H01L21/28 ,  H01L21/768 ,  H01L27/115 ,  H01L21/311 ,  H01L21/02 ,  H01L27/11526 ,  H01L27/11519 ,  H01L27/11573 ,  H01L21/3213

Abstract: A method used in forming a memory array comprising strings of memory cells and operative through-array-vias (TAVs) comprises forming a stack comprising vertically-alternating insulative tiers and conductive tiers. The stack comprises a TAV region and an operative memory-cell-string region. The TAV region comprises spaced operative TAV areas. Operative channel-material strings are formed in the stack in the operative memory-cell-string region and dummy channel-material strings are formed in the stack in the TAV region laterally outside of and not within the operative TAV areas. Operative TAVs are formed in individual of the spaced operative TAV areas in the TAV region. Other methods and structure independent of method are disclosed.

公开(公告)号：US11417673B2

公开(公告)日：2022-08-16

申请号：US16908287

申请日：2020-06-22

Applicant: Micron Technology, Inc.

Inventor： Shuangqiang Luo ,  Indra V. Chary ,  Justin B. Dorhout

IPC: H01L27/11556 ,  H01L23/00 ,  G11C5/02 ,  H01L23/538 ,  H01L21/768 ,  H01L27/11582 ,  G11C5/06

Abstract: A microelectronic device comprises a stack structure comprising alternating conductive structures and insulative structures arranged in tiers, the tiers individually comprising one of the conductive structures and one of the insulative structures, first support pillar structures extending through the stack structure within a first region of the microelectronic device, the first support pillar structures electrically isolated from a source structure underlying the stack structure, second support pillar structures extending through the stack structure within a second region of the microelectronic device, the second support pillar structures comprising an electrically conductive material in electrical communication with the source structure, and bridge structures extending between at least some neighboring first support pillar structures of the first support pillar structures. Related memory devices, electronic systems, and methods are also described.

公开(公告)号：US20220199637A1

公开(公告)日：2022-06-23

申请号：US17125200

申请日：2020-12-17

Applicant: Micron Technology, Inc.

Inventor： Shuangqiang Luo ,  John D. Hopkins ,  Lifang Xu ,  Nancy M. Lomeli ,  Indra V. Chary ,  Kar Wui Thong ,  Shicong Wang

IPC: H01L27/11556 ,  H01L27/11582 ,  G11C5/06 ,  G11C5/02 ,  H01L21/768

Abstract: A microelectronic device comprises a stack structure comprising a vertically alternating sequence of conductive material and insulative material arranged in tiers. The stack structure has blocks separated from one another by first dielectric slot structures. Each of the blocks comprises two crest regions, a stadium structure interposed between the two crest regions in a first horizontal direction and comprising opposing staircase structures each having steps comprising edges of the tiers of the stack structure, and two bridge regions neighboring opposing sides of the stadium structure in a second horizontal direction orthogonal to the first horizontal direction and having upper surfaces substantially coplanar with upper surfaces of the two crest regions. At least one second dielectric slot structure is within horizontal boundaries of the stadium structure in the first horizontal direction and partially vertically extends through and segmenting each of the two bridge regions. Memory devices, electronic systems, and methods of forming microelectronic devices are also described.

公开(公告)号：US20220068317A1

公开(公告)日：2022-03-03

申请号：US17243937

申请日：2021-04-29

Applicant: Micron Technology, Inc.

Inventor： Yoshiaki Fukuzumi ,  Paolo Tessariol ,  David H. Wells ,  Lars P. Heineck ,  Richard J. Hill ,  Lifang Xu ,  Indra V. Chary ,  Emilio Camerlenghi

IPC: G11C5/06 ,  H01L21/50 ,  H01L25/065 ,  H01L27/11556 ,  H01L27/11582

Abstract: Some embodiments include an integrated assembly having a pair of adjacent memory-block-regions, and having a separator structure between the adjacent memory-block-regions. The memory-block-regions include a first stack of alternating conductive levels and first insulative levels. The separator structure includes a second stack of alternating second and third insulative levels. The second insulative levels are substantially horizontally aligned with the conductive levels, and the third insulative levels are substantially horizontally aligned with the first insulative levels. Some embodiments include methods of forming integrated assemblies.

公开(公告)号：US20210408029A1

公开(公告)日：2021-12-30

申请号：US17473679

申请日：2021-09-13

Applicant: Micron Technology, Inc.

Inventor： Matthew J. King ,  Anilkumar Chandolu ,  Indra V. Chary ,  Darwin A. Clampitt ,  Gordon Haller ,  Thomas George ,  Brett D. Lowe ,  David A. Daycock

IPC: H01L27/11573 ,  H01L21/762 ,  H01L27/11578 ,  H01L27/1157 ,  H01L21/768 ,  H01L27/11575

Abstract: A termination opening can be formed through the stack alternating dielectrics concurrently with forming contact openings through the stack. A termination structure can be formed in the termination opening. An additional opening can be formed through the termination structure and through the stack between groups of semiconductor structures that pass through the stack. In another example, an opening can be formed through the stack so that a first segment of the opening is between groups of semiconductor structures in a first region of the stack and a second segment of the opening is in a second region of the stack that does not include the groups of semiconductor structures. A material can be formed in the second segment so that the first segment terminates at the material. In some instances, the material can be implanted in the dielectrics in the second region through the second segment.

公开(公告)号：US20210398997A1

公开(公告)日：2021-12-23

申请号：US16908287

申请日：2020-06-22

Applicant: Micron Technology, Inc.

Inventor： Shuangqiang Luo ,  Indra V. Chary ,  Justin B. Dorhout

IPC: H01L27/11556 ,  H01L23/00 ,  G11C5/02 ,  G11C5/06 ,  H01L21/768 ,  H01L27/11582 ,  H01L23/538

Abstract: A microelectronic device comprises a stack structure comprising alternating conductive structures and insulative structures arranged in tiers, the tiers individually comprising one of the conductive structures and one of the insulative structures, first support pillar structures extending through the stack structure within a first region of the microelectronic device, the first support pillar structures electrically isolated from a source structure underlying the stack structure, second support pillar structures extending through the stack structure within a second region of the microelectronic device, the second support pillar structures comprising an electrically conductive material in electrical communication with the source structure, and bridge structures extending between at least some neighboring first support pillar structures of the first support pillar structures. Related memory devices, electronic systems, and methods are also described.

公开(公告)号：US20210375907A1

公开(公告)日：2021-12-02

申请号：US16885720

申请日：2020-05-28

Applicant: Micron Technology, Inc.

Inventor： Shuangqiang Luo ,  Indra V. Chary

IPC: H01L27/11582 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/1157

Abstract: Some embodiments include an integrated assembly having a first deck, a second deck over the first deck, and a third deck over the second deck. The first deck has first conductive levels disposed one atop another. The second deck has second conductive levels disposed one atop another. The third deck has third conductive levels disposed one atop another. A first staircase region extends to the first and second conductive levels, and passes through the third conductive levels. A second staircase region extends to the third conductive levels and not to the first and second conductive levels. Some embodiments include methods of forming integrated assemblies.

公开(公告)号：US11177271B2

公开(公告)日：2021-11-16

申请号：US15705179

申请日：2017-09-14

Applicant: Micron Technology, Inc.

Inventor： Paolo Tessariol ,  Justin B. Dorhout ,  Indra V. Chary ,  Jun Fang ,  Matthew Park ,  Zhiqiang Xie ,  Scott D. Stull ,  Daniel Osterberg ,  Jason Reece ,  Jian Li

IPC: H01L27/11582 ,  H01L21/768 ,  H01L21/311 ,  H01L23/528 ,  H01L27/11556 ,  H01L21/02 ,  H01L29/10 ,  H01L23/522 ,  H01L27/11575 ,  H01L27/11565

Abstract: A device comprises an array of elevationally-extending transistors and a circuit structure adjacent and electrically coupled to the elevationally-extending transistors of the array. The circuit structure comprises a stair step structure comprising vertically-alternating tiers comprising conductive steps that are at least partially elevationally separated from one another by insulative material. Operative conductive vias individually extend elevationally through one of the conductive steps at least to a bottom of the vertically-alternating tiers and individually electrically couple to an electronic component below the vertically-alternating tiers. Dummy structures individually extend elevationally through one of the conductive steps at least to the bottom of the vertically-alternating tiers. Methods are also disclosed.

公开(公告)号：US11121146B2

公开(公告)日：2021-09-14

申请号：US16159955

申请日：2018-10-15

Applicant: Micron Technology, Inc.

Inventor： Matthew J. King ,  Anilkumar Chandolu ,  Indra V. Chary ,  Darwin A. Clampitt ,  Gordon Haller ,  Thomas George ,  Brett D. Lowe ,  David A. Daycock

IPC: H01L27/11573 ,  H01L27/11578 ,  H01L21/768 ,  H01L21/762 ,  H01L27/1157 ,  H01L27/11575

Abstract: A termination opening can be formed through the stack alternating dielectrics concurrently with forming contact openings through the stack. A termination structure can be formed in the termination opening. An additional opening can be formed through the termination structure and through the stack between groups of semiconductor structures that pass through the stack. In another example, an opening can be formed through the stack so that a first segment of the opening is between groups of semiconductor structures in a first region of the stack and a second segment of the opening is in a second region of the stack that does not include the groups of semiconductor structures. A material can be formed in the second segment so that the first segment terminates at the material. In some instances, the material can be implanted in the dielectrics in the second region through the second segment.

公开(公告)号：US20210126010A1

公开(公告)日：2021-04-29

申请号：US16667719

申请日：2019-10-29

Applicant: Micron Technology, Inc.

Inventor： Shuangqiang Luo ,  Indra V. Chary ,  Justin B. Dorhout

IPC: H01L27/11582 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/1157 ,  G11C16/08

Abstract: A method of forming a microelectronic device comprises forming a microelectronic device structure. The microelectronic device structure comprises a stack structure comprising insulative structures and additional insulative structures vertically alternating with the insulative structures, a dielectric structure vertically extending partially through the stack structure, and a dielectric material vertically overlying and horizontally extending across the stack structure and the dielectric structure. Portions of at least the dielectric material and the dielectric structure are removed to form a trench vertically overlying and at least partially horizontally overlapping a remaining portion of the dielectric structure. The trench is substantially filled with additional dielectric material. Microelectronic devices, memory devices, and electronic systems are also described.