摘要:
Aspects of a method and system for integrated blocker detection and automatic gain control are provided. In this regard, a communication device may generate one or more first signal strength indications based on a strength of a received signal at a first point in the analog front-end of the communication device. The communication device may generate one or more second signal strength indications based on a strength of the received signal at a second point in a digital processing module of the communication device. The first point in the analog front-end may be an input or an output of a down-conversion mixer. The second point in the digital processing module may be an output of an analog-to-digital converter or an output of a channel selection filter. The communication device may control, utilizing the first signal strength indication(s) and the second signal strength indication(s), a gain of one or more components of the communication device.
摘要:
A system for correcting a second order intermodulation product in a direct conversion receiver is provided. The system includes a cross-covariance system receiving a data signal and a second order intermodulation estimate signal and generating a cross-covariance value. An auto-covariance system receives the second order intermodulation estimate signal and generates an auto covariance value. A buffer system stores a second order intermodulation product correction factor. A divider receives the cross-covariance value, the auto-covariance value and the second order intermodulation product correction factor and generates a running average second order intermodulation product correction factor.
摘要:
A supply voltage controlled power amplifier includes a power amplifier, a closed power control loop configured to generate a power control signal, and a voltage regulator coupled to the power control loop, the voltage regulator including a first regulator stage, a second regulator stage, and a peak detector, wherein an output of the second regulator stage is applied as a feedback signal to the first regulator stage and wherein an output of the first regulator stage is decreased to a level consistent with an output of the power amplifier and an additional operating buffer amount.
摘要:
A phase-locked loop (PLL) is arranged to receive high-pass data at a first input and low-pass data at a second input. A first digital input is coupled to a primary path through a digital-to-analog converter (DAC) and a second digital input is coupled to a feedback path of the PLL. The controller provides the first input and the second input during a calibration procedure. The controller adjusts first and second control inputs in an attempt to keep the input voltage to a voltage-controlled oscillator (VCO) in the PLL constant while determining the gain of the VCO in Hz/LSB.
摘要:
An adaptive predistortion system for controlling an open loop power amplifier includes a transmitter, a receiver, a phase and amplitude determination element configured to determine amplitude and phase characteristics of an output signal generated in the transmitter, the signal representing transmitter characteristics, an amplitude resampling element configured to generate an updated AM-AM predistortion signal based on the output signal generated in the transmitter, and an amplitude predistortion element configured to compare the updated AM-AM predistortion signal with a factory-calibrated AM-AM predistortion signal and generate an amplitude compensation signal. The adaptive predistortion system also includes a phase comparison element configured to compare the signal representing transmitter characteristics with a desired phase signal, a phase resampling element configured to generate an updated AM-PM predistortion signal based on the output signal generated in the transmitter, and a phase predistortion element configured to compare the updated AM-PM predistortion signal with a factory-calibrated AM-PM predistortion signal and generate a phase compensation signal.
摘要:
A system for saturation detection and compensation in a power amplifier includes a power amplifier, a closed power control loop configured to develop a power control signal (VPC), a comparator configured to receive the power control signal and a reference signal, the comparator also configured to determine whether the power amplifier is operating in a saturation mode, and power control circuitry configured to reduce the power control signal if the power amplifier is operating in a saturation mode.
摘要:
A single continuous closed-loop power control feedback system provides seamless power control for a power amplifier and also enables an AM signal to be injected into the power amplifier through the power amplifiers' control port. The AM signal is developed by an I/Q modulator and supplied to a comparator located in the power control loop. By using leakage from the power amplifier as feedback to a phase locked loop during initial power amplifier power ramp-up, the single continuous closed-loop power control system provides continuous feedback to the phase locked loop during the entire power amplification ramp-up period and eliminates the need for multiple feedback loops.
摘要:
A system of and method for reducing or eliminating any unwanted sideband component in a signal derived from the output of a quadrature modulator. An unwanted sideband detector detects the unwanted sideband in the output of the quadrature modulator, and responsive thereto, a correction circuit corrects a baseband signal prior to inputting it to the quadrature modulator. In one embodiment, the unwanted sideband detector is an envelope detector.
摘要:
A system for reducing internal interference in a radio-frequency (RF) receiver includes providing a plurality of time slots within a frame where the receiver is configured to receive external RF signals during a receive time slot within the frame. Data is collected during a receive time slot of a frame, and a receive data value is calculated corresponding to the collected data. A predetermined portion of the data collected is inspected, and a bias data value is calculated. The bias value is attributable to interference signals caused by the internal interference. The bias data value is added to an accumulator, and over time, a running average of the bias data values is determined. A portion of the running average is subtracted from the sample stream of data to provide output data corresponding to the external RF signals absent the internal interference.
摘要:
A direct conversion receiver system is provided in which a first input signal at a first frequency is applied to a first input port of a multiplier, a second input signal at a second frequency equal to about {fraction (1/n)} times the first frequency, wherein n is an integer, is applied to a second input port of the multiplier. A first filter coupled to the first input port is configured to substantially filter out any leakage at the second frequency which may be present. A second filter coupled to the second input port is configured to substantially filter out any leakage at the first frequency which may be present. The multiplier is configured to produce a signal at an output port thereof which is derived from the product of the first and second signals. In one embodiment, the output is representative of the product of the filtered first signal and a multiplication factor which switches at n times the second frequency. The output of the multiplier is coupled to a third filter. The output signal has a baseband component and another component. The third filter is configured to substantially filter out the other component and substantially maintain the baseband component in the output signal. In one implementation example, the multiplier is a mixer initializing half-frequency injection, such that the LO frequency is about ½ the RF frequency.