Process for manufacturing a field-emission device
    32.
    发明授权
    Process for manufacturing a field-emission device 失效
    制造场致发射装置的方法

    公开(公告)号:US5727977A

    公开(公告)日:1998-03-17

    申请号:US608023

    申请日:1996-03-04

    IPC分类号: H01J9/02

    CPC分类号: H01J9/025 B82Y10/00 B82Y30/00

    摘要: A process for manufacturing of a field emission device (100, 200) including the steps of i) providing a substrate (101, 201), ii) forming a conductive row (106, 206), ii) forming a dielectric layer (102, 202), iv) forming a resist layer (116, 216), v) forming a self-assembled monolayer (112, 212) of a self-assembled monolayer-forming molecular species on the resist layer (116, 216) so that the self-assembled monolayer (112, 212) defines an etch pattern for an emitter well (107, 207), vi) etching the resist layer (116, 216), vii) etching the dielectric layer ((102, 202), viii) forming conductive column (103, 203), and ix) forming the electron-emitter structure (105, 208) within the emitter well (107, 207).

    摘要翻译: 一种用于制造场致发射器件(100,200)的方法,包括以下步骤:i)提供衬底(101,201),ii)形成导电行(106,206),ii)形成介电层(102, 202),iv)形成抗蚀剂层(116,216),v)在抗蚀剂层(116,216)上形成自组装单层形成分子物质的自组装单层(112,212),使得 自组装单层(112,212)限定了用于发射极阱(107,207)的蚀刻图案,vi)蚀刻抗蚀剂层(116,216),vii)蚀刻介电层((102,202)),viii) 形成导电柱(103,203),以及ix)在发射阱(107,207)内形成电子 - 发射结构(105,208)。

    Apparatus and method for patterning a surface
    33.
    发明授权
    Apparatus and method for patterning a surface 失效
    用于图案化表面的装置和方法

    公开(公告)号:US5725788A

    公开(公告)日:1998-03-10

    申请号:US608022

    申请日:1996-03-04

    摘要: An apparatus (95) and method for patterning a surface of an article (30), the apparatus (95) including a large-area stamp (50) for forming a self-assembled monolayer (36) (SAM) of a molecular species (38) on the surface (34) of a layer (32) of resist material, which is formed on the surface of the article (30). The large-area stamp (50) includes a layer (52) of an elastomer and has, embedded within it, mechanical structures (68, 80) which stiffen the large-area stamp (50) and deform it to control the stamped patterns. The method includes the steps of: forming a layer (32) of resist material is on the surface of the article (30), utilizing the large-area stamp (50) to form the SAM (36) on the surface (34) of the layer (32) of resist material, etching the layer (32) of resist material, and thereafter etching or plating the surface of the article (30).

    摘要翻译: 一种用于对制品(30)的表面进行图案化的装置(95)和方法,所述装置(95)包括用于形成分子种类的自组装单层(36)(SAM)的大面积印模(50) 38)形成在制品(30)的表面上的抗蚀剂材料层(32)的表面(34)上。 大面积邮票(50)包括弹性体层(52),并且内嵌有机械结构(68,80),其加强大面积印模(50)并使其变形以控制冲压图案。 该方法包括以下步骤:在制品(30)的表面上形成抗蚀剂材料层(32),利用大面积印模(50)在表面(34)上形成SAM(36) 抗蚀剂材料层(32),蚀刻抗蚀剂材料层(32),然后蚀刻或电镀制品(30)的表面。

    Superlattice gate field effect transistor
    34.
    发明授权
    Superlattice gate field effect transistor 失效
    超晶格栅场效应晶体管

    公开(公告)号:US4769683A

    公开(公告)日:1988-09-06

    申请号:US64629

    申请日:1987-06-22

    摘要: A quasi 1-dimensional electron gas transistor has been provided having a source electrode and a drain electrode. A plurality of electrodes are positioned between the source and drain electrodes in a manner which are parallel to the electron flow between the source and the drain electrodes. In one embodiment, the electrodes are interconnected by a gate electrode while in an alternate embodiment all the electrodes are connected to the source electrode and insulated from the gate electrode. This device provides a quantum wire for quasi 1-dimensional electron flow.

    摘要翻译: 已经提供了具有源电极和漏电极的准一维电子气体晶体管。 以与源极和漏极之间的电子流平行的方式将多个电极定位在源极和漏极之间。 在一个实施例中,电极通过栅电极互连,而在替代实施例中,所有电极都连接到源电极并与栅电极绝缘。 该器件为准1维电子流提供量子线。