Process for manufacturing a field-emission device
    1.
    发明授权
    Process for manufacturing a field-emission device 失效
    制造场致发射装置的方法

    公开(公告)号:US5727977A

    公开(公告)日:1998-03-17

    申请号:US608023

    申请日:1996-03-04

    IPC分类号: H01J9/02

    CPC分类号: H01J9/025 B82Y10/00 B82Y30/00

    摘要: A process for manufacturing of a field emission device (100, 200) including the steps of i) providing a substrate (101, 201), ii) forming a conductive row (106, 206), ii) forming a dielectric layer (102, 202), iv) forming a resist layer (116, 216), v) forming a self-assembled monolayer (112, 212) of a self-assembled monolayer-forming molecular species on the resist layer (116, 216) so that the self-assembled monolayer (112, 212) defines an etch pattern for an emitter well (107, 207), vi) etching the resist layer (116, 216), vii) etching the dielectric layer ((102, 202), viii) forming conductive column (103, 203), and ix) forming the electron-emitter structure (105, 208) within the emitter well (107, 207).

    摘要翻译: 一种用于制造场致发射器件(100,200)的方法,包括以下步骤:i)提供衬底(101,201),ii)形成导电行(106,206),ii)形成介电层(102, 202),iv)形成抗蚀剂层(116,216),v)在抗蚀剂层(116,216)上形成自组装单层形成分子物质的自组装单层(112,212),使得 自组装单层(112,212)限定了用于发射极阱(107,207)的蚀刻图案,vi)蚀刻抗蚀剂层(116,216),vii)蚀刻介电层((102,202)),viii) 形成导电柱(103,203),以及ix)在发射阱(107,207)内形成电子 - 发射结构(105,208)。

    Apparatus and method for patterning a surface
    2.
    发明授权
    Apparatus and method for patterning a surface 失效
    用于图案化表面的装置和方法

    公开(公告)号:US5725788A

    公开(公告)日:1998-03-10

    申请号:US608022

    申请日:1996-03-04

    摘要: An apparatus (95) and method for patterning a surface of an article (30), the apparatus (95) including a large-area stamp (50) for forming a self-assembled monolayer (36) (SAM) of a molecular species (38) on the surface (34) of a layer (32) of resist material, which is formed on the surface of the article (30). The large-area stamp (50) includes a layer (52) of an elastomer and has, embedded within it, mechanical structures (68, 80) which stiffen the large-area stamp (50) and deform it to control the stamped patterns. The method includes the steps of: forming a layer (32) of resist material is on the surface of the article (30), utilizing the large-area stamp (50) to form the SAM (36) on the surface (34) of the layer (32) of resist material, etching the layer (32) of resist material, and thereafter etching or plating the surface of the article (30).

    摘要翻译: 一种用于对制品(30)的表面进行图案化的装置(95)和方法,所述装置(95)包括用于形成分子种类的自组装单层(36)(SAM)的大面积印模(50) 38)形成在制品(30)的表面上的抗蚀剂材料层(32)的表面(34)上。 大面积邮票(50)包括弹性体层(52),并且内嵌有机械结构(68,80),其加强大面积印模(50)并使其变形以控制冲压图案。 该方法包括以下步骤:在制品(30)的表面上形成抗蚀剂材料层(32),利用大面积印模(50)在表面(34)上形成SAM(36) 抗蚀剂材料层(32),蚀刻抗蚀剂材料层(32),然后蚀刻或电镀制品(30)的表面。

    Apparatus and method for stamping a surface
    3.
    发明授权
    Apparatus and method for stamping a surface 失效
    用于冲压表面的装置和方法

    公开(公告)号:US5669303A

    公开(公告)日:1997-09-23

    申请号:US610776

    申请日:1996-03-04

    摘要: An apparatus (100) including a support structure (104), a flexible stamp (106) having a stamping surface (110) including a predetermined pattern disposed opposite the support structure (104), a pressure controlled chamber (112) disposed above the support structure (104), and a mechanical attachment (114) affixed to the flexible stamp (106). A method is provided for stamping the surface (101) of an article (102) including the steps of i) placing the article (102) on the support structure (104) within the pressure-controlled chamber (112), ii) wetting the stamping surface (110) with a solution containing a self-assembled monolayer-forming molecular species, iii) aligning alignment patterns (118) on the flexible stamp (106) with alignment patterns (124) on the surface (101) of the article (102), iv) controllably contacting the wetted stamping surface (110) with the surface (101) of the article (102) by changing the pressure differential across the flexible stamp (106) so that contact commences at the center of the flexible stamp (106) and proceeds outwardly in a controlled manner, and v) removing the stamping surface (110) from the surface (101) of the article so that a self-assembled monolayer (134) having the predetermined pattern is formed on the surface (101) of the article (102).

    摘要翻译: 一种包括支撑结构(104)的装置(100),具有包括与所述支撑结构(104)相对设置的预定图案的冲压表面的柔性印模(106),设置在所述支撑结构(104)上方的压力控制室 结构(104)和固定到柔性印模(106)上的机械附件(114)。 提供了一种用于冲压制品(102)的表面(101)的方法,包括以下步骤:i)将制品(102)放置在压力控制室(112)内的支撑结构(104)上,ii)润湿 用包含自组装单层形成分子种类的溶液冲压表面(110),iii)将柔性印模(106)上的对准图案(118)与制品的表面(101)上的对准图案(124)对准( 102),iv)通过改变柔性印章(106)上的压差来可控地将湿润的冲压表面(110)与制品(102)的表面(101)接触,使得在柔性印模的中心开始接触 106),并且以受控的方式向外移动,以及v)从制品的表面(101)移除冲压表面(110),使得在表面(101)上形成具有预定图案的自组装单层(134) )的物品(102)。

    High efficiency power amplifier using HITFET driver circuit
    4.
    发明授权
    High efficiency power amplifier using HITFET driver circuit 失效
    高效率功率放大器采用HITFET驱动电路

    公开(公告)号:US5939941A

    公开(公告)日:1999-08-17

    申请号:US937775

    申请日:1997-09-25

    摘要: A high efficiency power amplifier includes an integrated circuit with a heterojunction interband tunneling field effect transistor (HITFET) amplifier coupled to receive high frequency (into the GHz) RF signals. The HITFET amplifier is constructed to receive the RF signal with a given frequency at the input terminal and to produce a substantially square wave signal at the given frequency at an output terminal in response to the RF signal applied to the input terminal. The gate of a switching FET connected as a class E amplifier is coupled to the output of the HITFET for receiving the square wave signal and an impedance matching output circuit is coupled to the drain of the switching FET.

    摘要翻译: 高效率功率放大器包括具有耦合以接收高频(GHz)RF信号的异质结带间隧道场效应晶体管(HITFET)放大器的集成电路。 HITFET放大器被构造为响应于施加到输入端子的RF信号,在输入端子处以给定的频率在输入端子处接收RF信号并且在输出端子处以给定频率产生基本上方波的信号。 作为E级放大器连接的开关FET的栅极耦合到HITFET的输出端,用于接收方波信号,阻抗匹配输出电路耦合到开关FET的漏极。

    Phonon suppression in quantum wells
    5.
    发明授权
    Phonon suppression in quantum wells 失效
    量子阱中的声子抑制

    公开(公告)号:US5160982A

    公开(公告)日:1992-11-03

    申请号:US895228

    申请日:1992-06-08

    IPC分类号: H01L29/12

    CPC分类号: B82Y10/00 H01L29/122

    摘要: An enhanced mobility semiconductor comprising a host quantum well having at least two charge carrier barrier layers of a wide bandgap material, each of the two charge carrier barrier layers being separated by a conducting region containing charge carriers is provided. A number of phonon barriers having a predetermined thickness are formed in the conducting region wherein the predetermined thickness is chosen to allow charge carrier tunneling through the phonon barriers.

    摘要翻译: 提供了一种增强的迁移率半导体,其包括具有宽带隙材料的至少两个电荷载流子阻挡层的主量子阱,两个电荷载流子阻挡层中的每一个由包含电荷载流子的导电区域分开。 在导电区域中形成许多具有预定厚度的声子屏障,其中选择预定厚度以允许载流子隧道穿过声子屏障。

    VCO with multiple negative differential resistance devices
    6.
    发明授权
    VCO with multiple negative differential resistance devices 失效
    VCO具有多个负差分电阻器件

    公开(公告)号:US5942952A

    公开(公告)日:1999-08-24

    申请号:US903081

    申请日:1997-07-30

    摘要: A VCO includes a transistor having a plurality of negative differential resistance devices coupled in series to the source terminal of the transistor, with each of the devices having a negative differential resistance operating region. Biasing circuits are coupled to the drain and gate terminals along with operating voltages which set the oscillator to operating in a negative differential resistance region of at least one of the negative differential resistance devices so that oscillations of a selected frequency are produced at an output terminal. The transistor, the plurality of N devices, the DC biasing circuits, and the operating voltages are connected so that the oscillator negative differential resistance operating region is greater than N times as wide as each of the device negative differential operating regions individually.

    摘要翻译: VCO包括具有与晶体管的源极端子串联耦合的多个负差分电阻器件的晶体管,其中每个器件具有负的差分电阻工作区域。 偏置电路耦合到漏极和栅极端子以及操作电压,其工作电压将振荡器设置为在负差分电阻器件中的至少一个的负差分电阻区域中工作,使得在输出端子处产生选定频率的振荡。 连接晶体管,多个N器件,DC偏置电路和工作电压,使得振荡器负差分电阻工作区域分别大于每个器件负差分工作区域的N倍。

    Superlattice gate field effect transistor
    7.
    发明授权
    Superlattice gate field effect transistor 失效
    超晶格栅场效应晶体管

    公开(公告)号:US4769683A

    公开(公告)日:1988-09-06

    申请号:US64629

    申请日:1987-06-22

    摘要: A quasi 1-dimensional electron gas transistor has been provided having a source electrode and a drain electrode. A plurality of electrodes are positioned between the source and drain electrodes in a manner which are parallel to the electron flow between the source and the drain electrodes. In one embodiment, the electrodes are interconnected by a gate electrode while in an alternate embodiment all the electrodes are connected to the source electrode and insulated from the gate electrode. This device provides a quantum wire for quasi 1-dimensional electron flow.

    摘要翻译: 已经提供了具有源电极和漏电极的准一维电子气体晶体管。 以与源极和漏极之间的电子流平行的方式将多个电极定位在源极和漏极之间。 在一个实施例中,电极通过栅电极互连,而在替代实施例中,所有电极都连接到源电极并与栅电极绝缘。 该器件为准1维电子流提供量子线。

    METHOD AND SYSTEM FOR MANAGING A COMMUNICATION SESSION
    9.
    发明申请
    METHOD AND SYSTEM FOR MANAGING A COMMUNICATION SESSION 审中-公开
    用于管理通信会话的方法和系统

    公开(公告)号:US20080155102A1

    公开(公告)日:2008-06-26

    申请号:US11613669

    申请日:2006-12-20

    IPC分类号: G06F15/16

    CPC分类号: H04M3/56

    摘要: A method and system for managing a communication session among a plurality of communication members (116, 118, 120 and 122) is provided. The communication session is managed by an electronic device (102). The method includes identifying (304) an interrupted communication member (120) from the plurality of communication members. The interrupted communication member is talked-over by an interrupting communication member (122) during the communication session. Further, the method includes determining (306) an opportunity to notify in the communication session when the talk-over concludes. Furthermore, the method includes providing (308) a notification of the talk-over to the plurality of communication members during the opportunity to notify.

    摘要翻译: 提供了一种用于管理多个通信构件(116,118,120和122)中的通信会话的方法和系统。 通信会话由电子设备(102)管理。 该方法包括从多个通信部件识别(304)中断的通信部件(120)。 中断的通信成员在通信会话期间由中断的通信成员(122)进行通话。 此外,该方法包括在通话结束时确定(306)在通信会话中通知的机会。 此外,该方法包括在通知机会期间向多个通信成员提供(308)通话通知。