公开(公告)号：US20140203276A1

公开(公告)日：2014-07-24

申请号：US14154483

申请日：2014-01-14

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Daisuke MATSUBAYASHI ,  Hideomi SUZAWA ,  Tetsuhiro TANAKA ,  Hirokazu WATANABE

IPC: H01L27/12

CPC classification number: H01L27/1225 ,  H01L27/1222 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78633 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: To provide a highly reliable semiconductor device. The semiconductor device includes a first oxide layer over an insulating film; an oxide semiconductor layer over the first oxide layer; a gate insulating film over the oxide semiconductor layer; and a gate electrode over the gate insulating film. The first oxide layer contains indium. The oxide semiconductor layer contains indium and includes a channel formation region. The distance from the interface to the channel formation region is 20 nm or more, preferably 30 nm or more, further preferably 40 nm or more, still further preferably 60 nm or more.

Abstract translation: 提供高度可靠的半导体器件。 半导体器件包括绝缘膜上的第一氧化物层; 在所述第一氧化物层上的氧化物半导体层; 氧化物半导体层上的栅极绝缘膜; 以及栅极绝缘膜上的栅电极。 第一氧化物层含有铟。 氧化物半导体层含有铟，并且包括沟道形成区域。 从界面到沟道形成区域的距离为20nm以上，优选为30nm以上，进一步优选为40nm以上，进一步优选为60nm以上。

公开(公告)号：US20230246110A1

公开(公告)日：2023-08-03

申请号：US18133078

申请日：2023-04-11

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Masayuki SAKAKURA ,  Hideomi SUZAWA

IPC: H01L29/786 ,  H01L29/04 ,  H10B99/00 ,  H01L27/12 ,  H01L27/146 ,  H01L29/24 ,  H01L29/66

CPC classification number: H01L29/78696 ,  H01L29/04 ,  H10B99/00 ,  H01L29/78693 ,  H01L29/7869 ,  H01L27/1225 ,  H01L27/14616 ,  H01L29/045 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/7854

Abstract: A semiconductor device having a structure which can prevent a decrease in electrical characteristics due to miniaturization is provided. The semiconductor device includes, over an insulating surface, a stack in which a first oxide semiconductor layer and a second oxide semiconductor layer are sequentially formed, and a third oxide semiconductor layer covering part of a surface of the stack. The third oxide semiconductor layer includes a first layer in contact with the stack and a second layer over the first layer. The first layer includes a microcrystalline layer, and the second layer includes a crystalline layer in which c-axes are aligned in a direction perpendicular to a surface of the first layer.

公开(公告)号：US20220352378A1

公开(公告)日：2022-11-03

申请号：US17708084

申请日：2022-03-30

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Yuta ENDO ,  Hideomi SUZAWA

IPC: H01L29/786 ,  H01L27/108 ,  H01L27/12

Abstract: A semiconductor device that can be highly integrated is provided.
The semiconductor device includes first and second transistors and first and second capacitors. Each of the first and second transistors includes a gate insulator and a gate electrode over an oxide. Each of the first and second capacitors includes a conductor, a dielectric over the conductor, and the oxide. The first and second transistors are provided between the first capacitor and the second capacitor. One of a source and a drain of the first transistor is also used as one of a source and a drain of the second transistor. The other of the source and the drain of the first transistor is also used as one electrode of the first capacitor. The other of the source and the drain of the second transistor is also used as one electrode of the second capacitor. The channel lengths of the first and second transistors are larger than the lengths in a direction parallel to short sides of fourth and fifth conductors.

公开(公告)号：US20210305413A1

公开(公告)日：2021-09-30

申请号：US17167332

申请日：2021-02-04

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Hideomi SUZAWA ,  Shinya SASAGAWA ,  Motomu KURATA ,  Masashi TSUBUKU

IPC: H01L29/66 ,  H01L29/786 ,  H01L21/02 ,  H01L27/12 ,  H01L27/146

Abstract: The on-state characteristics of a transistor are improved and thus, a semiconductor device capable of high-speed response and high-speed operation is provided. A highly reliable semiconductor device showing stable electric characteristics is made. The semiconductor device includes a transistor including a first oxide layer; an oxide semiconductor layer over the first oxide layer; a source electrode layer and a drain electrode layer in contact with the oxide semiconductor layer; a second oxide layer over the oxide semiconductor layer; a gate insulating layer over the second oxide layer; and a gate electrode layer over the gate insulating layer. An end portion of the second oxide layer and an end portion of the gate insulating layer overlap with the source electrode layer and the drain electrode layer.

公开(公告)号：US20200227566A1

公开(公告)日：2020-07-16

申请号：US16833918

申请日：2020-03-30

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Hideomi SUZAWA ,  Tetsuhiro TANAKA ,  Hirokazu WATANABE ,  Yuhei SATO ,  Yasumasa YAMANE ,  Daisuke MATSUBAYASHI

IPC: H01L29/786 ,  H01L29/45 ,  H01L29/66

Abstract: A semiconductor device having a reduced amount of oxygen vacancy in a channel formation region of an oxide semiconductor is provided. Further, a semiconductor device which includes an oxide semiconductor and has improved electric characteristics is provided. Furthermore, a methods for manufacturing the semiconductor device is provided. An oxide semiconductor film is formed; a conductive film is formed over the oxide semiconductor film at the same time as forming a low-resistance region between the oxide semiconductor film and the conductive film; the conductive film is processed to form a source electrode and a drain electrode; and oxygen is added to the low-resistance region between the source electrode and the drain electrode, so that a channel formation region having a higher resistance than the low-resistance region is formed and a first low-resistance region and a second low-resistance region between which the channel formation region is positioned are formed.

公开(公告)号：US20200066884A1

公开(公告)日：2020-02-27

申请号：US16671612

申请日：2019-11-01

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Hideomi SUZAWA ,  Shinya SASAGAWA ,  Motomu KURATA ,  Masashi TSUBUKU

IPC: H01L29/66 ,  H01L27/146 ,  H01L27/12 ,  H01L21/02 ,  H01L29/786

Abstract: The on-state characteristics of a transistor are improved and thus, a semiconductor device capable of high-speed response and high-speed operation is provided. A highly reliable semiconductor device showing stable electric characteristics is made. The semiconductor device includes a transistor including a first oxide layer; an oxide semiconductor layer over the first oxide layer; a source electrode layer and a drain electrode layer in contact with the oxide semiconductor layer; a second oxide layer over the oxide semiconductor layer; a gate insulating layer over the second oxide layer; and a gate electrode layer over the gate insulating layer. An end portion of the second oxide layer and an end portion of the gate insulating layer overlap with the source electrode layer and the drain electrode layer.

公开(公告)号：US20190181159A1

公开(公告)日：2019-06-13

申请号：US16266263

申请日：2019-02-04

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Hideomi SUZAWA ,  Yuta ENDO ,  Kazuya HANAOKA

IPC: H01L27/12 ,  H01L29/786

Abstract: A semiconductor device with reduced parasitic capacitance is provided. The semiconductor device includes a first insulating layer; a first oxide layer over the first insulating layer; a semiconductor layer over the first oxide layer; a source electrode layer and a drain electrode layer over the semiconductor layer; a second insulating layer over the first insulating layer; a third insulating layer over the second insulating layer, the source electrode layer, and the drain electrode layer; a second oxide layer over the semiconductor layer; a gate insulating layer over the second oxide layer; a gate electrode layer over the gate insulating layer; and a fourth insulating layer over the third insulating layer, the second oxide layer, the gate insulating layer, and the gate electrode layer.

公开(公告)号：US20180182899A1

公开(公告)日：2018-06-28

申请号：US15900845

申请日：2018-02-21

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuta ENDO ,  Hideomi SUZAWA ,  Sachiaki TEZUKA ,  Tetsuhiro TANAKA ,  Toshiya ENDO ,  Mitsuhiro ICHIJO

IPC: H01L29/786 ,  H01L29/66 ,  H01L21/8258 ,  H01L29/423 ,  H01L27/12 ,  H01L27/092 ,  H01L27/06 ,  H01L29/49

CPC classification number: H01L29/78648 ,  H01L21/8258 ,  H01L27/0688 ,  H01L27/092 ,  H01L27/1207 ,  H01L27/1225 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78651 ,  H01L29/7869 ,  H01L29/78696

Abstract: A miniaturized transistor is provided. A first layer is formed over a third insulator over a semiconductor; a second layer is formed over the first layer; an etching mask is formed over the second layer; the second layer is etched using the etching mask until the first layer is exposed to form a third layer; a selective growth layer is formed on a top surface and a side surface of the third layer; the first layer is etched using the third layer and the selective growth layer until the third insulator is exposed to form a fourth layer; and the third insulator is etched using the third layer, the selective growth layer, and the fourth layer until the semiconductor is exposed to form a first insulator.

公开(公告)号：US20170309721A1

公开(公告)日：2017-10-26

申请号：US15642400

申请日：2017-07-06

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Hideomi SUZAWA ,  Hiroshi FUJIKI ,  Hiromichi GODO ,  Yasumasa YAMANE

IPC: H01L29/49 ,  H01L29/45 ,  H01L29/24 ,  H01L29/786 ,  H01L27/12

CPC classification number: H01L29/4908 ,  H01L27/1225 ,  H01L29/24 ,  H01L29/45 ,  H01L29/7869

Abstract: The reliability of a semiconductor device is increased by suppression of a variation in electric characteristics of a transistor as much as possible. As a cause of a variation in electric characteristics of a transistor including an oxide semiconductor, the concentration of hydrogen in the oxide semiconductor, the density of oxygen vacancies in the oxide semiconductor, or the like can be given. A source electrode and a drain electrode are formed using a conductive material which is easily bonded to oxygen. A channel formation region is formed using an oxide layer formed by a sputtering method or the like under an atmosphere containing oxygen. Thus, the concentration of hydrogen in a stack, in particular, the concentration of hydrogen in a channel formation region can be reduced.

公开(公告)号：US20170222057A1

公开(公告)日：2017-08-03

申请号：US15490433

申请日：2017-04-18

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Hideomi SUZAWA ,  Masami JINTYOU

IPC: H01L29/786 ,  H01L29/66 ,  H01L27/12 ,  H01L29/49 ,  H01L29/423

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L27/3262 ,  H01L29/24 ,  H01L29/42364 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/78696

Abstract: A self-aligned transistor including an oxide semiconductor film, which has excellent and stable electrical characteristics, is provided. A semiconductor device is provided with a transistor that includes an oxide semiconductor film, a gate electrode overlapping with part of the oxide semiconductor film, and a gate insulating film between the oxide semiconductor film and the gate electrode. The oxide semiconductor film includes a first region and second regions between which the first region is positioned. The second regions include an impurity element. A side of the gate insulating film has a depressed region. Part of the gate electrode overlaps with parts of the second regions in the oxide semiconductor film.