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公开(公告)号:US09972405B2
公开(公告)日:2018-05-15
申请号:US15726068
申请日:2017-10-05
Applicant: SK hynix Inc.
Inventor: Tae Hoon Kim
CPC classification number: G11C29/50004 , G11C11/5642 , G11C16/24 , G11C16/26 , G11C16/3418 , G11C29/021 , G11C29/028 , G11C2029/1204 , G11C2029/5004
Abstract: A semiconductor memory device includes memory cells coupled to a word line; and a peripheral circuit configured to read first to kth page data from the memory cells by sequentially applying first to kth test voltages to the word line, where k is a natural number greater than 3, wherein the peripheral circuit is configured to gradually reduce times during which the first to kth test voltages are applied to the word line.
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公开(公告)号:US09965205B2
公开(公告)日:2018-05-08
申请号:US14657711
申请日:2015-03-13
Applicant: SK hynix Inc.
Inventor: Young Gyun Kim , Tae Hoon Kim
CPC classification number: G06F3/0623 , G06F3/0604 , G06F3/064 , G06F3/0652 , G06F3/0673 , G06F3/0679 , G06F21/00 , G06F21/79 , H04L9/008 , H04L9/06 , H04L9/0618 , H04L63/0428 , H04L63/0435
Abstract: A data storage device includes a conversion block suitable for performing a scramble operation on write data, and generating random write data, wherein the scramble operation includes inversion/non-inversion processing and calculation processing based on a random pattern.
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公开(公告)号:US09331055B2
公开(公告)日:2016-05-03
申请号:US14936301
申请日:2015-11-09
Applicant: SK hynix Inc.
Inventor: Tae Hoon Kim
IPC: H01L25/065 , H01L23/00
CPC classification number: H01L25/0657 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/83 , H01L24/85 , H01L24/91 , H01L25/50 , H01L2224/05553 , H01L2224/05599 , H01L2224/29099 , H01L2224/32145 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/48106 , H01L2224/48225 , H01L2224/48229 , H01L2224/48465 , H01L2224/49176 , H01L2224/73265 , H01L2224/78301 , H01L2224/832 , H01L2224/8389 , H01L2224/85007 , H01L2224/85181 , H01L2224/852 , H01L2224/85439 , H01L2224/85444 , H01L2224/85447 , H01L2224/85455 , H01L2224/8547 , H01L2224/92247 , H01L2225/0651 , H01L2225/06555 , H01L2924/00014 , H01L2924/01006 , H01L2924/1434 , H01L2224/45015 , H01L2924/207
Abstract: A semiconductor package includes a package substrate on which a substrate pad is disposed, a structure disposed over the package substrate, a semiconductor chip disposed over the structure using an adhesive member having a magnetic material layer disposed therein, a chip pad disposed on a top surface of the semiconductor chip, and a bonding wire coupling the substrate pad and the chip pad.
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公开(公告)号:US09263149B2
公开(公告)日:2016-02-16
申请号:US13624255
申请日:2012-09-21
Applicant: SK hynix Inc.
Inventor: Tae Hoon Kim
Abstract: A semiconductor device includes a one-time programmable (OTP) memory cell includes a first MOS transistor having a gate coupled to a bit line, a first switching device, coupled to one side of a source/drain of the first MOS transistor, configured to provide a current path for a current supplied to the gate of the first MOS transistor, and a second switching device configured to provide a bias voltage at the other side of the source/drain of the first MOS transistor.
Abstract translation: 半导体器件包括一次性可编程(OTP)存储单元,其包括具有耦合到位线的栅极的第一MOS晶体管,耦合到第一MOS晶体管的源极/漏极的一侧的第一开关器件,被配置为 为提供给第一MOS晶体管的栅极的电流提供电流路径,以及被配置为在第一MOS晶体管的源极/漏极的另一侧提供偏置电压的第二开关器件。
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35.
公开(公告)号:US09214452B2
公开(公告)日:2015-12-15
申请号:US14452305
申请日:2014-08-05
Applicant: SK HYNIX INC.
Inventor: Tae Hoon Kim
IPC: H01L23/48 , H01L25/065 , H01L25/00 , H01L23/00
CPC classification number: H01L25/0657 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/83 , H01L24/85 , H01L24/91 , H01L25/50 , H01L2224/05553 , H01L2224/05599 , H01L2224/29099 , H01L2224/32145 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/48106 , H01L2224/48225 , H01L2224/48229 , H01L2224/48465 , H01L2224/49176 , H01L2224/73265 , H01L2224/78301 , H01L2224/832 , H01L2224/8389 , H01L2224/85007 , H01L2224/85181 , H01L2224/852 , H01L2224/85439 , H01L2224/85444 , H01L2224/85447 , H01L2224/85455 , H01L2224/8547 , H01L2224/92247 , H01L2225/0651 , H01L2225/06555 , H01L2924/00014 , H01L2924/01006 , H01L2924/1434 , H01L2224/45015 , H01L2924/207
Abstract: A semiconductor package includes a package substrate on which a substrate pad is disposed, a structure disposed over the package substrate, a semiconductor chip disposed over the structure using an adhesive member having a magnetic material layer disposed therein, a chip pad disposed on a top surface of the semiconductor chip, and a bonding wire coupling the substrate pad and the chip pad.
Abstract translation: 一种半导体封装,包括:衬底,其上设置有衬底焊盘的封装衬底;设置在封装衬底上的结构,使用其中设置有磁性材料层的粘合构件设置在结构上的半导体芯片;设置在顶表面上的芯片焊盘 以及连接基板焊盘和芯片焊盘的接合线。
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