公开(公告)号：US20180351353A1

公开(公告)日：2018-12-06

申请号：US15607780

申请日：2017-05-30

Applicant: STMicroelectronics (Alps) SAS ,  STMicroelectronics SA

Inventor： Yves Mazoyer ,  Philippe Galy ,  Philippe Sirito-Olivier

IPC: H02H9/04 ,  H02H9/00 ,  H01L27/02 ,  H01L23/62 ,  H01L23/60

Abstract: Electrostatic discharge (ESD) protection is provided by a circuit including a resistor having a first terminal and a second terminal, a zener diode having a cathode terminal directly connected to said first terminal and an anode terminal directly connected to a third terminal, and a clamp diode having a cathode terminal directly connected to said second terminal and an anode terminal directly connected to said third terminal.

公开(公告)号：US20180276536A1

公开(公告)日：2018-09-27

申请号：US15697598

申请日：2017-09-07

Applicant: STMicroelectronics SA

Inventor： Philippe Galy ,  Thomas Bedecarrats

IPC: G06N3/063 ,  G06N3/04 ,  G11C11/54

CPC classification number: G06N3/063 ,  G06N3/049 ,  G06N3/0635 ,  G11C11/54

Abstract: An integrated artificial neuron device includes a refractory circuit configured to inhibit signal integration for an inhibition duration after delivery of an output signal. The refractory circuit includes a first MOS transistor coupled between an input node and a reference node and having a gate connected to the output node by a second MOS transistor having a first electrode coupled to the supply node and a gate coupled to the output node. The refractory circuit further includes a resistive-capacitive circuit coupled between the supply node, the reference node and the gate of the second MOS transistor. An inhibition duration depends on a time constant of the resistive-capacitive circuit.

公开(公告)号：US09831288B2

公开(公告)日：2017-11-28

申请号：US15387850

申请日：2016-12-22

Applicant: Commissariat A L'Energie Atomique et aux Energies Alternatives ,  STMICROELECTRONICS (CROLLES 2) SAS ,  STMICROELECTRONICS SA

Inventor： Laurent Grenouillet ,  Sotirios Athanasiou ,  Philippe Galy

IPC: H01L27/24 ,  G11C13/00 ,  H01L27/12 ,  H01L45/00 ,  H01L27/10

CPC classification number: H01L27/2454 ,  G11C13/0007 ,  G11C13/0069 ,  G11C2213/53 ,  H01L27/101 ,  H01L27/1207 ,  H01L27/2436 ,  H01L28/00 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/145 ,  H01L45/147

Abstract: The invention relates to an integrated circuit (1), comprising: a field-effect transistor (2), comprising: first and second conduction electrodes (201, 202); a channel zone (203) arranged between the first and second conduction electrodes; a gate stack (220) arranged vertically in line with the channel zone, and comprising a gate electrode (222); an RRAM-type memory point (31) formed under the channel zone, or formed in the gate stack under the gate electrode.

公开(公告)号：US09746863B2

公开(公告)日：2017-08-29

申请号：US14960052

申请日：2015-12-04

Applicant: STMicroelectronics SA

Inventor： Philippe Galy ,  Sotirios Athanasiou ,  Julien Le Coz ,  Sylvain Engels

IPC: H01L23/34 ,  G05F1/46 ,  H01L27/02 ,  H01L27/06

CPC classification number: G05F1/463 ,  H01L23/345 ,  H01L27/0251 ,  H01L27/0629 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An electronic device includes an integrated circuit with a MOS transistor and a heating circuit electrically coupled to at least two points of one of the source or drain semiconductive region of the transistor. A portion of the source or drain semiconductive region between the two points forms a resistive element. The heating circuit is configured to cause a current to circulate through the resistive element between the two points to heat an active region of the transistor.

公开(公告)号：US09571160B2

公开(公告)日：2017-02-14

申请号：US14821053

申请日：2015-08-07

Applicant: STMicroelectronics SA

Inventor： Philippe Galy

IPC: H04B3/54 ,  H04L7/033 ,  H03M9/00 ,  H04L25/49

CPC classification number: H04B3/548 ,  H03M9/00 ,  H04L7/033 ,  H04L25/4917

Abstract: A data transmission circuit transmits a data signal over a transmission line. A digital to analog converter (DAC) operates to receive N-bit input digital values for conversion to corresponding ones of 2N different DC voltage levels. The DAC selects, for each N-bit input digital value, one of the 2N DC voltage levels. An analog to digital converter (ADC) operates to sense the DC voltage on the transmission line for conversion to a corresponding N-bit output digital value.

Abstract translation: 数据传输电路通过传输线传输数据信号。 数模转换器（DAC）用于接收N位输入数字值，以转换为2N个不同直流电压电平中的相应的数字值。 DAC为每个N位输入数字值选择2N直流电压电平之一。 模数转换器（ADC）用于检测传输线上的直流电压，以转换为相应的N位输出数字值。

公开(公告)号：US20170012043A1

公开(公告)日：2017-01-12

申请号：US15041593

申请日：2016-02-11

Applicant: STMicroelectronics SA

Inventor： Philippe Galy ,  Sotirios Athanasiou

IPC: H01L27/092 ,  H01L21/84 ,  H01L23/528 ,  H01L21/8238 ,  H01L27/12

CPC classification number: H01L27/092 ,  H01L21/8238 ,  H01L21/823871 ,  H01L21/84 ,  H01L23/528 ,  H01L27/1203 ,  H01L29/0847 ,  H01L29/1033 ,  H01L29/165 ,  H01L29/66772 ,  H01L29/78603 ,  H01L29/78615 ,  H01L29/78648 ,  H01L29/78654

Abstract: A substrate contact land for a first MOS transistor is produced in and on an active zone of a substrate of silicon on insulator type using a second MOS transistor without any PN junction that is also provided in the active zone. A contact land on at least one of a source or drain region of the second MOS transistor forms the substrate contact land.

Abstract translation: 使用第二MOS晶体管在绝缘体上的硅衬底的有源区中及其上产生用于第一MOS晶体管的衬底接触区，而没有任何PN结的也在激活区中提供。 第二MOS晶体管的源极或漏极区域中的至少一个上的接触焊盘形成衬底接触区域。

公开(公告)号：US20160370815A1

公开(公告)日：2016-12-22

申请号：US14960052

申请日：2015-12-04

Applicant: STMicroelectronics SA

Inventor： Philippe Galy ,  Sotirios Athanasiou ,  Julien Le Coz ,  Sylvain Engels

IPC: G05F1/46

CPC classification number: G05F1/463 ,  H01L23/345 ,  H01L27/0251 ,  H01L27/0629 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An electronic device includes an integrated circuit with a MOS transistor and a heating circuit electrically coupled to at least two points of one of the source or drain semiconductive region of the transistor. A portion of the source or drain semiconductive region between the two points forms a resistive element. The heating circuit is configured to cause a current to circulate through the resistive element between the two points to heat an active region of the transistor.

Abstract translation: 电子器件包括具有MOS晶体管的集成电路和与该晶体管的源极或半导体半导体区域中的至少两个点的至少两个点电耦合的加热电路。 两点之间的源极或漏极半导体区域的一部分形成电阻元件。 加热电路被配置为使电流在两个点之间循环通过电阻元件，以加热晶体管的有源区。

公开(公告)号：US20160049992A1

公开(公告)日：2016-02-18

申请号：US14821053

申请日：2015-08-07

Applicant: STMicroelectronics SA

Inventor： Philippe Galy

IPC: H04B3/54 ,  H04L7/033

CPC classification number: H04B3/548 ,  H03M9/00 ,  H04L7/033 ,  H04L25/4917

Abstract: A data transmission circuit transmits a data signal over a transmission line. A digital to analog converter (DAC) operates to receive N-bit input digital values for conversion to corresponding ones of 2N different DC voltage levels. The DAC selects, for each N-bit input digital value, one of the 2N DC voltage levels. An analog to digital converter (ADC) operates to sense the DC voltage on the transmission line for conversion to a corresponding N-bit output digital value.

Abstract translation: 数据传输电路通过传输线传输数据信号。 数模转换器（DAC）用于接收N位输入数字值，以转换为2N个不同直流电压电平中的相应的数字值。 DAC为每个N位输入数字值选择2N直流电压电平之一。 模数转换器（ADC）用于检测传输线上的直流电压，以转换为相应的N位输出数字值。

公开(公告)号：US09035349B2

公开(公告)日：2015-05-19

申请号：US13768730

申请日：2013-02-15

Applicant: STMicroelectronics SA

Inventor： Philippe Galy ,  Nicolas Guitard ,  Thomas Benoist

IPC: H01L29/74 ,  H01L27/02 ,  H01L29/87

CPC classification number: H01L29/7424 ,  H01L27/0262 ,  H01L29/87

Abstract: A device includes, within a layer of silicon on insulator, a central semiconductor zone including a central region having a first type of conductivity, two intermediate regions having a second type of conductivity opposite to that of the first one, respectively disposed on either side of and in contact with the central region in order to form two PN junctions, two semiconductor end zones respectively disposed on either side of the central zone, each end zone comprising two end regions of opposite types of conductivity, in contact with the adjacent intermediate region, the two end regions of each end zone being mutually connected electrically in order to form the two terminals of the device.

Abstract translation: 一种器件包括在绝缘体上的硅层内的包括具有第一类型导电性的中心区域的中心半导体区域，具有与第一类型导电性相反的第二类型导电率的第二类型的中间区域分别设置在 并且与中心区域接触以形成两个PN结，两个半导体端部区域分别设置在中心区域的任一侧上，每个端部区域包括与相邻中间区域接触的相反导电类型的两个端部区域， 每个端部区域的两个端部区域相互电连接以形成装置的两个端子。

公开(公告)号：US11867570B2

公开(公告)日：2024-01-09

申请号：US17192438

申请日：2021-03-04

Applicant: STMicroelectronics SA

Inventor： Philippe Galy ,  Renan Lethiecq

IPC: G01K7/01 ,  G01K7/22 ,  G01K7/25 ,  H01L27/12 ,  H01C7/04 ,  G05F3/24 ,  H01C7/00 ,  H01L29/10 ,  H01L29/78

CPC classification number: G01K7/01 ,  G01K7/015 ,  G01K7/22 ,  G01K7/226 ,  G01K7/25 ,  G05F3/245 ,  H01C7/008 ,  H01C7/04 ,  H01L27/1203 ,  H01L29/1095 ,  H01L29/7831

Abstract: An electronic device includes a module that delivers a positive temperature coefficient output voltage at an output terminal. A thermistor includes a first MOS transistor operating in weak inversion mode and having a negative temperature coefficient drain-source resistance and whose source is coupled to the output terminal. A current source coupled to the output terminal imposes the drain-source current of the first transistor.