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    Semiconductor device and method of fabricating the same
    31.
    发明授权
    Semiconductor device and method of fabricating the same 有权

    公开(公告)号：US11257840B2

    公开(公告)日：2022-02-22

    申请号：US16701340

    申请日：2019-12-03

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Bong Yong Lee ,  Tae Hun Kim ,  Min Kyung Bae

    IPC: H01L27/11578 ,  H01L27/11582 ,  H01L27/11573 ,  H01L27/11556 ,  H01L29/06 ,  H01L23/10 ,  H01L27/11526

    Abstract: A semiconductor device including a substrate; a lower structure including a sealing layer on the substrate and a support layer on the sealing layer, the sealing layer and the support layer both including a semiconductor material; a mold structure on the lower structure and having an interlayer insulating film and a conductive film alternately stacked therein; a channel hole penetrating the mold structure; a channel structure extending along sidewalls of the channel hole; an isolation trench penetrating the mold structure and extending into the lower structure; and a poly liner extending along sidewalls of the isolation trench, the poly liner being connected to the lower structure and including the semiconductor material.

    Semiconductor package including test pad
    32.
    发明授权
    Semiconductor package including test pad 有权

    公开(公告)号：US11088038B2

    公开(公告)日：2021-08-10

    申请号：US16508498

    申请日：2019-07-11

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hyuek Jae Lee ,  Tae Hun Kim ,  Ji Hwan Hwang ,  Ji Hoon Kim ,  Ji Seok Hong

    IPC: H01L23/528 ,  H01L21/66 ,  H01L23/00

    Abstract: A semiconductor package includes a base including a first bonding structure; and a first semiconductor chip, including a second bonding structure, the second bonding structure being coupled to the first bonding structure of the base, wherein the first bonding structure includes: a test pad; a first pad being electrically connected to the test pad; and a first insulating layer, wherein the second bonding structure includes: a second pad being electrically connected to the first pad; and a second insulating layer being in contact with the first insulating layer, and wherein at least a portion of the test pad is in contact with the second insulating layer.

    Semiconductor light emitting device and manufacturing method thereof
    36.
    发明授权
    Semiconductor light emitting device and manufacturing method thereof 有权
    半导体发光器件及其制造方法

    公开(公告)号：US09087932B2

    公开(公告)日：2015-07-21

    申请号：US13948797

    申请日：2013-07-23

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Tae Hun Kim ,  Sung Joon Kim ,  Yong Il Kim ,  Yung Ho Ryu ,  Myeong Rak Son ,  Su Yeol Lee ,  Seung Hwan Lee ,  Tae Sung Jang ,  Su Min Hwangbo

    IPC: H01L33/00 ,  H01L21/00

    CPC classification number: H01L33/007 ,  H01L33/0079

    Abstract: A method for manufacturing a semiconductor light emitting device includes forming an isolation pattern on a semiconductor single crystal growth substrate. A first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer are sequentially grown in one chip unit region of the semiconductor single crystal growth substrate defined by the isolation pattern, and a reflective metal layer is formed to cover the light emitting structure and the isolation pattern. A support substrate is formed on the reflective metal layer, and the semiconductor single crystal growth substrate is removed from the light emitting structure. The support substrate is then cut into individual light emitting devices.

    Abstract translation: 一种制造半导体发光器件的方法包括在半导体单晶生长衬底上形成隔离图案。 在由隔离图案限定的半导体单晶生长基板的一个芯片单元区域中依次生长第一导电型半导体层，有源层和第二导电型半导体层，并且形成反射金属层以覆盖 发光结构和隔离图案。 在反射金属层上形成支撑基板，从发光结构去除半导体单晶生长基板。 然后将支撑衬底切割成单个发光器件。

    SEMICONDUCTOR PACKAGE INCLUDING TEST PAD
    37.
    发明申请
    SEMICONDUCTOR PACKAGE INCLUDING TEST PAD 有权

    公开(公告)号：US20210335680A1

    公开(公告)日：2021-10-28

    申请号：US17367903

    申请日：2021-07-06

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hyuek Jae LEE ,  Tae Hun Kim ,  Ji Hwan Hwang ,  Ji Hoon Kim ,  Ji Seok Hong

    IPC: H01L21/66 ,  H01L23/528 ,  H01L23/00

    Abstract: A semiconductor package includes a base including a first bonding structure; and a first semiconductor chip, including a second bonding structure, the second bonding structure being coupled to the first bonding structure of the base, wherein the first bonding structure includes: a test pad; a first pad being electrically connected to the test pad; and a first insulating layer, wherein the second bonding structure includes: a second pad being electrically connected to the first pad; and a second insulating layer being in contact with the first insulating layer, and wherein at least a portion of the test pad is in contact with the second insulating layer.

    Nonvolatile memory device, an operating method thereof, and a storage system including the nonvolatile memory device
    39.
    发明授权
    Nonvolatile memory device, an operating method thereof, and a storage system including the nonvolatile memory device 有权

    公开(公告)号：US10923195B2

    公开(公告)日：2021-02-16

    申请号：US16686327

    申请日：2019-11-18

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Minkyung Bae ,  Tae Hun Kim ,  Myunghun Woo ,  Bongyong Lee ,  Doohee Hwang

    IPC: G11C11/34 ,  G11C16/14 ,  G11C16/08 ,  G11C16/04 ,  H01L27/11582

    Abstract: An operating method of a nonvolatile memory device which includes a cell string including a plurality of cell transistors connected in series between a bit line and a common source line and stacked in a direction perpendicular to a substrate, the method including: programming an erase control transistor of the plurality of cell transistors; and after the erase control transistor is programmed, applying an erase voltage to the common source line or the bit line and applying an erase control voltage to an erase control line connected to the erase control transistor, wherein the erase control voltage is less than the erase voltage and greater than a ground voltage, and wherein the erase control transistor is between a ground selection transistor of the plurality of cell transistors and the common source line or between a string selection transistor of the plurality of cell transistors and the bit line.

    Semiconductor light emitting device and semiconductor light emitting device package using the same
    40.
    发明授权
    Semiconductor light emitting device and semiconductor light emitting device package using the same 有权

    公开(公告)号：US10811568B2

    公开(公告)日：2020-10-20

    申请号：US16181592

    申请日：2018-11-06

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Tae Hun Kim ,  Jae In Sim ,  Ju Heon Yoon

    IPC: H01L33/40 ,  H01L33/62 ,  H01L33/52 ,  H01L33/10

    Abstract: A semiconductor light emitting device includes a first conductivity-type semiconductor layer including a recessed region and a protruding region, an active layer and a second conductivity-type semiconductor layer on the protruding region, a reflective electrode layer disposed on the second conductivity-type semiconductor layer, an insulating layer including a first opening disposed on a contact region of the first conductivity-type semiconductor layer and a second opening disposed on a contact region of the reflective electrode layer, a first conductive pattern disposed on the insulating layer, and extending into the first opening to be electrically connected to the contact region of the first conductivity-type semiconductor layer, a second conductive pattern disposed on the insulating layer, and extending into the second opening to be electrically connected to the reflective electrode layer, and a multilayer insulating structure covering the first and second conductive patterns.

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