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公开(公告)号:US07982223B2
公开(公告)日:2011-07-19
申请号:US12372212
申请日:2009-02-17
申请人: Seung-Ha Choi , Min-Seok Oh , Sang-Gab Kim , Hong-Kee Chin , Yu-Gwang Jeong
发明人: Seung-Ha Choi , Min-Seok Oh , Sang-Gab Kim , Hong-Kee Chin , Yu-Gwang Jeong
CPC分类号: H01L27/124 , G02F1/136286 , G02F2001/136222 , G02F2001/136295 , H01L27/1248 , H01L27/1288
摘要: In a display apparatus and a method of manufacturing the display apparatus, a first insulating layer having a trench and a second insulating layer having a via hole corresponding to the trench are formed on an array substrate. After forming a seed layer in the trench, a conductive layer is formed on the seed layer through a plating process, thereby forming the gate line, the gate electrode and the storage line accommodated in the trench and the via hole.
摘要翻译: 在显示装置和显示装置的制造方法中,在阵列基板上形成具有沟槽的第一绝缘层和具有与沟槽对应的通路孔的第二绝缘层。 在沟槽中形成晶种层之后,通过电镀工艺在晶种层上形成导电层,从而形成栅极线,栅极电极和容纳在沟槽和通孔中的存储线。
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公开(公告)号:US20090152635A1
公开(公告)日:2009-06-18
申请号:US12331361
申请日:2008-12-09
申请人: Yu-Gwang JEONG , Young-Wook Lee , Sang-Gab Kim , Woo-Geun Lee , Min-Seok Oh , Jang-Soo Kim , Kap-Soo Yoon , Shin-Il Choi , Hong-Kee Chin , Seung-Ha Choi , Seung-Hwan Shim , Sung-Hoon Yang , Ki-Hun Jeong
发明人: Yu-Gwang JEONG , Young-Wook Lee , Sang-Gab Kim , Woo-Geun Lee , Min-Seok Oh , Jang-Soo Kim , Kap-Soo Yoon , Shin-Il Choi , Hong-Kee Chin , Seung-Ha Choi , Seung-Hwan Shim , Sung-Hoon Yang , Ki-Hun Jeong
CPC分类号: H01L27/127 , H01L27/1214 , H01L27/1259 , H01L27/1288 , H01L29/66765
摘要: Embodiments of the present invention relate to a thin film transistor and a manufacturing method of a display panel, and include forming a gate line including a gate electrode on a substrate, forming a gate insulating layer on the gate electrode, forming an intrinsic semiconductor on the gate insulating layer, forming an extrinsic semiconductor on the intrinsic semiconductor, forming a data line including a source electrode and a drain electrode on the extrinsic semiconductor, and plasma-treating a portion of the extrinsic semiconductor between the source electrode and the drain electrode to form a protection member and ohmic contacts on respective sides of the protection member. Accordingly, the process for etching the extrinsic semiconductor and forming an inorganic insulating layer for protecting the intrinsic semiconductor may be omitted such that the manufacturing process of the display panel may be simplified, manufacturing cost may be reduced, and productivity may be improved.
摘要翻译: 本发明的实施例涉及薄膜晶体管和显示面板的制造方法,包括在基板上形成包括栅电极的栅极线,在栅电极上形成栅绝缘层,在栅电极上形成本征半导体 栅极绝缘层,在本征半导体上形成非本征半导体,在外部半导体上形成包括源电极和漏电极的数据线,以及对源电极和漏极之间的非本征半导体的一部分进行等离子体处理,以形成 保护构件和保护构件的相应侧上的欧姆接触。 因此,可以省略用于蚀刻外部半导体和形成用于保护本征半导体的无机绝缘层的工艺,从而可以简化显示面板的制造工艺,可以降低制造成本,并且可以提高生产率。
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公开(公告)号:US20100317135A1
公开(公告)日:2010-12-16
申请号:US12862580
申请日:2010-08-24
申请人: Hong-Kee Chin , Sang-Gab Kim , Min-Seok Oh
发明人: Hong-Kee Chin , Sang-Gab Kim , Min-Seok Oh
IPC分类号: H01L21/336
CPC分类号: H01L27/1288 , G02F1/136204 , H01L27/1244
摘要: A method of manufacturing a display substrate includes forming a first metallic pattern including gate and storage conductors and a gate electrode of a switching device on a base substrate, forming a gate insulation layer, forming a second metallic pattern and a channel portion including a source line, source and drain electrodes of the switching device, forming a passivation layer and a photoresist film on the second metallic pattern, patterning the photoresist film to form a first pattern portion corresponding to the gate and source conductors and the switching device, and a second pattern portion formed on the storage line, etching the passivation layer and the gate insulation layer, and forming a pixel electrode using the first pattern portion. Therefore, excessive etching of the stepped portion may be prevented, so that a short-circuit defect between a metallic pattern and a pixel electrode may be prevented
摘要翻译: 一种制造显示基板的方法包括在基底基板上形成包括栅极和存储导体的第一金属图案和开关器件的栅电极,形成栅极绝缘层,形成第二金属图案和包括源极线的沟道部分 开关器件的源极和漏极,在第二金属图案上形成钝化层和光致抗蚀剂膜,图案化光致抗蚀剂膜以形成对应于栅极和源极导体和开关器件的第一图案部分,以及第二图案 形成在存储线上的部分,蚀刻钝化层和栅极绝缘层,以及使用第一图案部分形成像素电极。 因此,可以防止阶梯部分的过度蚀刻,从而可以防止金属图案和像素电极之间的短路缺陷
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公开(公告)号:US07638375B2
公开(公告)日:2009-12-29
申请号:US12009253
申请日:2008-01-16
申请人: Hong-Kee Chin , Yu-Gwang Jeong , Sang-Gab Kim , Joo-Han Kim , Joo-Ae Youn , Min-Seok Oh , Jong-Hyun Choung , Seung-Ha Choi
发明人: Hong-Kee Chin , Yu-Gwang Jeong , Sang-Gab Kim , Joo-Han Kim , Joo-Ae Youn , Min-Seok Oh , Jong-Hyun Choung , Seung-Ha Choi
IPC分类号: H01L21/84
CPC分类号: H01L27/1288 , H01L27/1214
摘要: A method of manufacturing a TFT substrate includes: sequentially forming a transparent conductive layer and an opaque conductive layer on a substrate, patterning the transparent conductive layer and the opaque conductive layer by using a first mask to form a gate pattern including a pixel electrode, and forming a gate insulating layer and a semiconductor layer above the substrate. A contact hole is formed which exposes a portion of the pixel electrode and a semiconductor pattern using a second mask. A conductive layer is formed above the substrate and patterned to form a source/drain pattern including a drain electrode which overlaps a portion of the pixel electrode. Portions of the gate insulating layer and the opaque conductive layer above the pixel electrode are removed except a portion overlapping the drain electrode, by using a third mask.
摘要翻译: 一种制造TFT基板的方法包括:在基板上依次形成透明导电层和不透明导电层,通过使用第一掩模对透明导电层和不透明导电层进行构图,形成包括像素电极的栅极图案,以及 在基板上形成栅极绝缘层和半导体层。 使用第二掩模形成露出一部分像素电极和半导体图案的接触孔。 在衬底上形成导电层,并被图案化以形成包括与像素电极的一部分重叠的漏电极的源极/漏极图案。 除了与漏电极重叠的部分之外,通过使用第三掩模除去栅极绝缘层和像素电极上方的不透明导电层的部分。
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公开(公告)号:US08247815B2
公开(公告)日:2012-08-21
申请号:US12900634
申请日:2010-10-08
申请人: Shin-Il Choi , Sang-Gab Kim , Hong-Kee Chin , Min-Seok Oh , Yu-Gwang Jeong , Seung-Ha Choi
发明人: Shin-Il Choi , Sang-Gab Kim , Hong-Kee Chin , Min-Seok Oh , Yu-Gwang Jeong , Seung-Ha Choi
IPC分类号: H01L29/04 , H01L31/20 , H01L31/036 , H01L31/0376
CPC分类号: H01L27/124 , H01L29/458 , H01L29/66765
摘要: A method of fabricating a thin film transistor includes forming a gate electrode on a substrate, forming a semiconductor layer on the gate electrode, forming a source electrode on the semiconductor layer, forming a drain electrode on the semiconductor layer spaced apart from the source electrode, forming a copper layer pattern on the source electrode and the drain electrode, exposing the copper layer pattern on the source electrode and the drain electrode to a fluorine-containing process gas to form a copper fluoride layer pattern thereon, and patterning the semiconductor layer.
摘要翻译: 一种薄膜晶体管的制造方法,包括在基板上形成栅电极,在栅电极上形成半导体层,在半导体层上形成源电极,在与源电极间隔开的半导体层上形成漏电极, 在源电极和漏电极上形成铜层图案,将源电极和漏电极上的铜层图案暴露于含氟处理气体,以在其上形成氟化铜层图案,并对该半导体层进行构图。
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公开(公告)号:US20110159622A1
公开(公告)日:2011-06-30
申请号:US13042348
申请日:2011-03-07
申请人: Yu-Gwang Jeong , Young-Wook Lee , Sang-Gab Kim , Woo-Geun Lee , Min-Seok Oh , Jang-Soo Kim , Kap-Soo Yoon , Shin-Il Choi , Hong-Kee Chin , Seung-Ha Choi , Seung-Hwan Shim , Sung-Hoon Yang , Ki-Hun Jeong
发明人: Yu-Gwang Jeong , Young-Wook Lee , Sang-Gab Kim , Woo-Geun Lee , Min-Seok Oh , Jang-Soo Kim , Kap-Soo Yoon , Shin-Il Choi , Hong-Kee Chin , Seung-Ha Choi , Seung-Hwan Shim , Sung-Hoon Yang , Ki-Hun Jeong
IPC分类号: H01L33/62
CPC分类号: H01L27/127 , H01L27/1214 , H01L27/1259 , H01L27/1288 , H01L29/66765
摘要: Embodiments of the present invention relate to a thin film transistor and a manufacturing method of a display panel, and include forming a gate line including a gate electrode on a substrate, forming a gate insulating layer on the gate electrode, forming an intrinsic semiconductor on the gate insulating layer, forming an extrinsic semiconductor on the intrinsic semiconductor, forming a data line including a source electrode and a drain electrode on the extrinsic semiconductor, and plasma-treating a portion of the extrinsic semiconductor between the source electrode and the drain electrode to form a protection member and ohmic contacts on respective sides of the protection member. Accordingly, the process for etching the extrinsic semiconductor and forming an inorganic insulating layer for protecting the intrinsic semiconductor may be omitted such that the manufacturing process of the display panel may be simplified, manufacturing cost may be reduced, and productivity may be improved.
摘要翻译: 本发明的实施例涉及薄膜晶体管和显示面板的制造方法,包括在基板上形成包括栅电极的栅极线,在栅电极上形成栅绝缘层,在栅电极上形成本征半导体 栅极绝缘层,在本征半导体上形成非本征半导体,在外部半导体上形成包括源电极和漏电极的数据线,以及对源电极和漏极之间的非本征半导体的一部分进行等离子体处理,以形成 保护构件和保护构件的相应侧上的欧姆接触。 因此,可以省略用于蚀刻外部半导体和形成用于保护本征半导体的无机绝缘层的工艺,从而可以简化显示面板的制造工艺,可以降低制造成本,并且可以提高生产率。
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公开(公告)号:US07923732B2
公开(公告)日:2011-04-12
申请号:US12331361
申请日:2008-12-09
申请人: Yu-Gwang Jeong , Young-Wook Lee , Sang-Gab Kim , Woo-Geun Lee , Min-Seok Oh , Jang-Soo Kim , Kap-Soo Yoon , Shin-Il Choi , Hong-Kee Chin , Seung-Ha Choi , Seung-Hwan Shim , Sung-Hoon Yang , Ki-Hun Jeong
发明人: Yu-Gwang Jeong , Young-Wook Lee , Sang-Gab Kim , Woo-Geun Lee , Min-Seok Oh , Jang-Soo Kim , Kap-Soo Yoon , Shin-Il Choi , Hong-Kee Chin , Seung-Ha Choi , Seung-Hwan Shim , Sung-Hoon Yang , Ki-Hun Jeong
IPC分类号: H01L29/00
CPC分类号: H01L27/127 , H01L27/1214 , H01L27/1259 , H01L27/1288 , H01L29/66765
摘要: Embodiments of the present invention relate to a thin film transistor and a manufacturing method of a display panel, and include forming a gate line including a gate electrode on a substrate, forming a gate insulating layer on the gate electrode, forming an intrinsic semiconductor on the gate insulating layer, forming an extrinsic semiconductor on the intrinsic semiconductor, forming a data line including a source electrode and a drain electrode on the extrinsic semiconductor, and plasma-treating a portion of the extrinsic semiconductor between the source electrode and the drain electrode to form a protection member and ohmic contacts on respective sides of the protection member. Accordingly, the process for etching the extrinsic semiconductor and forming an inorganic insulating layer for protecting the intrinsic semiconductor may be omitted such that the manufacturing process of the display panel may be simplified, manufacturing cost may be reduced, and productivity may be improved.
摘要翻译: 本发明的实施例涉及薄膜晶体管和显示面板的制造方法,包括在基板上形成包括栅电极的栅极线,在栅电极上形成栅绝缘层,在栅电极上形成本征半导体 栅极绝缘层,在本征半导体上形成非本征半导体,在外部半导体上形成包括源电极和漏电极的数据线,以及对源电极和漏极之间的非本征半导体的一部分进行等离子体处理,以形成 保护构件和保护构件的相应侧上的欧姆接触。 因此,可以省略用于蚀刻外部半导体和形成用于保护本征半导体的无机绝缘层的工艺,从而可以简化显示面板的制造工艺,可以降低制造成本,并且可以提高生产率。
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公开(公告)号:US07863065B2
公开(公告)日:2011-01-04
申请号:US11682907
申请日:2007-03-07
申请人: Min-Seok Oh , Bong-Kyu Shin , Sang-Gab Kim , Eun-Guk Lee , Hong-Kee Chin , Yu-Gwang Jeong , Seung-Ha Choi
发明人: Min-Seok Oh , Bong-Kyu Shin , Sang-Gab Kim , Eun-Guk Lee , Hong-Kee Chin , Yu-Gwang Jeong , Seung-Ha Choi
IPC分类号: H01L21/00
CPC分类号: G02F1/136227 , G02F1/13439 , G02F2201/50
摘要: A method of forming a display substrate includes forming an array layer on a substrate, forming a passivation layer on the array layer, forming a photoresist pattern on the passivation layer corresponding to a gate line, a source line and a thin-film transistor of the array layer, etching the passivation layer using the photoresist pattern as a mask Non-uniformly surface treating a surface of the photoresist pattern, forming a transparent electrode layer on the substrate having the surface-treated photoresist pattern formed thereon and forming a pixel electrode. The forming a pixel electrode includes removing the photoresist pattern and the transparent electrode layer, such as by infiltrating a strip solution into the surface-treated photoresist pattern.
摘要翻译: 形成显示基板的方法包括在基板上形成阵列层,在阵列层上形成钝化层,在对应于栅极线,源极线和薄膜晶体管的钝化层上形成光致抗蚀剂图案 使用光致抗蚀剂图案作为掩模蚀刻钝化层对光致抗蚀剂图案的表面进行非均匀表面处理,在其上形成有表面处理的光致抗蚀剂图案的基板上形成透明电极层并形成像素电极。 形成像素电极包括通过将带状溶液浸入表面处理的光致抗蚀剂图案中去除光致抗蚀剂图案和透明电极层。
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公开(公告)号:US20090115066A1
公开(公告)日:2009-05-07
申请号:US12290594
申请日:2008-10-31
申请人: Dong-Ju Yang , Shin-Il Choi , Sang-Gab Kim , Min-Seok Oh , Hong-Kee Chin , Ki-Yeup Lee , Yu-Gwang Jeong , Seung-Ha Choi
发明人: Dong-Ju Yang , Shin-Il Choi , Sang-Gab Kim , Min-Seok Oh , Hong-Kee Chin , Ki-Yeup Lee , Yu-Gwang Jeong , Seung-Ha Choi
IPC分类号: H01L23/535 , H01L21/768
CPC分类号: H01L23/535 , H01L21/743 , H01L27/1218 , H01L27/124 , H01L2924/0002 , H01L2924/00
摘要: A metal wiring layer and a method of fabricating the metal wiring layer are provided. The method includes forming a dielectric layer on a substrate, forming a plurality of dielectric layer patterns and holes therein on the substrate by etching part of the dielectric layer, with a cross sectional area of the holes in the dielectric layer patterns decreasing with increasing distance away from the substrate and the holes exposing the substrate, forming a trench by etching a portion of the substrate exposed through the holes in the dielectric layer patterns, and forming a metal layer which fills the trench and the holes in the dielectric layer patterns. Thus, it is possible to prevent the occurrence of an edge build-up phenomenon by forming a metal layer in a plurality of holes in the dielectric layer patterns having a cross sectional area decreasing with increasing distance away from the substrate. Therefore, it is possible to prevent the transmittance of a liquid crystal layer from decreasing due to a failure to properly fill liquid crystal molecules in the liquid crystal layer, and thus to increase the quality of display.
摘要翻译: 提供金属布线层和制造金属布线层的方法。 该方法包括在衬底上形成电介质层,通过蚀刻介电层的一部分,在衬底上形成多个介电层图案和孔,电介质层图案中的孔的横截面积随距离的增加而减小 从衬底和暴露衬底的孔,通过蚀刻通过介电层图案中的孔暴露的衬底的一部分形成沟槽,以及形成填充沟槽和介电层图案中的空穴的金属层。 因此,可以通过在电介质层图案中的多个孔中形成金属层来防止边缘积聚现象的发生,该电介质层图案的横截面积随离开距衬底的距离的增加而减小。 因此,可以防止液晶层的透射率由于不能适当地填充液晶层中的液晶分子而降低,从而提高显示质量。
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公开(公告)号:US20080268581A1
公开(公告)日:2008-10-30
申请号:US12009253
申请日:2008-01-16
申请人: Hong-Kee Chin , Yu-Gwang Jeong , Sang-Gab Kim , Joo-Han Kim , Joo-Ae Youn , Min-Seok Oh , Jong-Hyun Choung , Seung-Ha Choi
发明人: Hong-Kee Chin , Yu-Gwang Jeong , Sang-Gab Kim , Joo-Han Kim , Joo-Ae Youn , Min-Seok Oh , Jong-Hyun Choung , Seung-Ha Choi
IPC分类号: H01L21/00
CPC分类号: H01L27/1288 , H01L27/1214
摘要: A method of manufacturing a TFT substrate includes: sequentially forming a transparent conductive layer and an opaque conductive layer on a substrate, patterning the transparent conductive layer and the opaque conductive layer by using a first mask to form a gate pattern including a pixel electrode, and forming a gate insulating layer and a semiconductor layer above the substrate. A contact hole is formed which exposes a portion of the pixel electrode and a semiconductor pattern using a second mask. A conductive layer is formed above the substrate and patterned to form a source/drain pattern including a drain electrode which overlaps a portion of the pixel electrode. Portions of the gate insulating layer and the opaque conductive layer above the pixel electrode are removed except a portion overlapping the drain electrode, by using a third mask.
摘要翻译: 一种制造TFT基板的方法包括:在基板上依次形成透明导电层和不透明导电层,通过使用第一掩模对透明导电层和不透明导电层进行构图,形成包括像素电极的栅极图案,以及 在基板上形成栅极绝缘层和半导体层。 使用第二掩模形成露出一部分像素电极和半导体图案的接触孔。 在衬底上形成导电层,并被图案化以形成包括与像素电极的一部分重叠的漏电极的源极/漏极图案。 除了与漏电极重叠的部分之外,通过使用第三掩模除去栅极绝缘层和像素电极上方的不透明导电层的部分。
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