Metal wiring layer and method of fabricating the same
    1.
    发明申请
    Metal wiring layer and method of fabricating the same 有权
    金属布线层及其制造方法

    公开(公告)号:US20090115066A1

    公开(公告)日:2009-05-07

    申请号:US12290594

    申请日:2008-10-31

    IPC分类号: H01L23/535 H01L21/768

    摘要: A metal wiring layer and a method of fabricating the metal wiring layer are provided. The method includes forming a dielectric layer on a substrate, forming a plurality of dielectric layer patterns and holes therein on the substrate by etching part of the dielectric layer, with a cross sectional area of the holes in the dielectric layer patterns decreasing with increasing distance away from the substrate and the holes exposing the substrate, forming a trench by etching a portion of the substrate exposed through the holes in the dielectric layer patterns, and forming a metal layer which fills the trench and the holes in the dielectric layer patterns. Thus, it is possible to prevent the occurrence of an edge build-up phenomenon by forming a metal layer in a plurality of holes in the dielectric layer patterns having a cross sectional area decreasing with increasing distance away from the substrate. Therefore, it is possible to prevent the transmittance of a liquid crystal layer from decreasing due to a failure to properly fill liquid crystal molecules in the liquid crystal layer, and thus to increase the quality of display.

    摘要翻译: 提供金属布线层和制造金属布线层的方法。 该方法包括在衬底上形成电介质层,通过蚀刻介电层的一部分,在衬底上形成多个介电层图案和孔,电介质层图案中的孔的横截面积随距离的增加而减小 从衬底和暴露衬底的孔,通过蚀刻通过介电层图案中的孔暴露的衬底的一部分形成沟槽,以及形成填充沟槽和介电层图案中的空穴的金属层。 因此,可以通过在电介质层图案中的多个孔中形成金属层来防止边缘积聚现象的发生,该电介质层图案的横截面积随离开距衬底的距离的增加而减小。 因此,可以防止液晶层的透射率由于不能适当地填充液晶层中的液晶分子而降低,从而提高显示质量。

    Metal wiring layer and method of fabricating the same
    2.
    发明授权
    Metal wiring layer and method of fabricating the same 有权
    金属布线层及其制造方法

    公开(公告)号:US08211797B2

    公开(公告)日:2012-07-03

    申请号:US12290594

    申请日:2008-10-31

    IPC分类号: H01L21/44

    摘要: A metal wiring layer and a method of fabricating the metal wiring layer are provided. The method includes forming a dielectric layer on a substrate, forming a plurality of dielectric layer patterns and holes therein on the substrate by etching part of the dielectric layer, with a cross sectional area of the holes in the dielectric layer patterns decreasing with increasing distance away from the substrate and the holes exposing the substrate, forming a trench by etching a portion of the substrate exposed through the holes in the dielectric layer patterns, and forming a metal layer which fills the trench and the holes in the dielectric layer patterns. Thus, it is possible to prevent the occurrence of an edge build-up phenomenon by forming a metal layer in a plurality of holes in the dielectric layer patterns having a cross sectional area decreasing with increasing distance away from the substrate. Therefore, it is possible to prevent the transmittance of a liquid crystal layer from decreasing due to a failure to properly fill liquid crystal molecules in the liquid crystal layer, and thus to increase the quality of display.

    摘要翻译: 提供金属布线层和制造金属布线层的方法。 该方法包括在衬底上形成电介质层,通过蚀刻介电层的一部分,在衬底上形成多个介电层图案和孔,电介质层图案中的孔的横截面积随距离的增加而减小 从衬底和暴露衬底的孔,通过蚀刻通过介电层图案中的孔暴露的衬底的一部分形成沟槽,以及形成填充沟槽和介电层图案中的空穴的金属层。 因此,可以通过在电介质层图案中的多个孔中形成金属层来防止边缘积聚现象的发生,该电介质层图案的横截面积随离开距衬底的距离的增加而减小。 因此,可以防止液晶层的透射率由于不能适当地填充液晶层中的液晶分子而降低,从而提高显示质量。

    Thin film transistor, and display apparatus having the same
    8.
    发明授权
    Thin film transistor, and display apparatus having the same 有权
    薄膜晶体管及其显示装置

    公开(公告)号:US08247815B2

    公开(公告)日:2012-08-21

    申请号:US12900634

    申请日:2010-10-08

    摘要: A method of fabricating a thin film transistor includes forming a gate electrode on a substrate, forming a semiconductor layer on the gate electrode, forming a source electrode on the semiconductor layer, forming a drain electrode on the semiconductor layer spaced apart from the source electrode, forming a copper layer pattern on the source electrode and the drain electrode, exposing the copper layer pattern on the source electrode and the drain electrode to a fluorine-containing process gas to form a copper fluoride layer pattern thereon, and patterning the semiconductor layer.

    摘要翻译: 一种薄膜晶体管的制造方法,包括在基板上形成栅电极,在栅电极上形成半导体层,在半导体层上形成源电极,在与源电极间隔开的半导体层上形成漏电极, 在源电极和漏电极上形成铜层图案,将源电极和漏电极上的铜层图案暴露于含氟处理气体,以在其上形成氟化铜层图案,并对该半导体层进行构图。