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    SONOS memory device having nano-sized trap elements
    31.
    发明申请
    SONOS memory device having nano-sized trap elements 有权
    具有纳米级陷阱元件的SONOS存储器件

    公开(公告)号：US20070267688A1

    公开(公告)日：2007-11-22

    申请号：US11878277

    申请日：2007-07-23

    申请人： Ju-hyung Kim ,  Chung-woo Kim ,  Soo-doo Chae ,  Youn-seok Jeong

    发明人： Ju-hyung Kim ,  Chung-woo Kim ,  Soo-doo Chae ,  Youn-seok Jeong

    IPC分类号： H01L29/788

    CPC分类号： H01L21/28282 ,  B82Y10/00 ,  H01L21/28273 ,  H01L29/42332 ,  H01L29/513 ,  H01L29/518 ,  H01L29/7887

    摘要： A silicon-oxide-nitride-oxide-silicon (SONOS) memory device includes a memory type transistor including a gate with a SONOS structure on a semiconductor substrate. The gate is formed by sequentially stacking a tunneling oxide layer, a memory node structure including a trap site having nano-sized trap elements in which charges passing through the tunneling oxide layer are trapped, and a gate electrode. The nano-sized trap elements may be a crystal layer composed of nanocrystals that are separated from one another to trap the charges. The memory node structure may include additional memory node layers which are isolated from the nano-sized trap elements.

    摘要翻译： 氧化硅 - 氧化物 - 氧化物 - 硅（SONOS）存储器件包括在半导体衬底上包括具有SONOS结构的栅极的存储器型晶体管。 栅极通过依次层叠隧道氧化物层，存储器结构结构，其包括具有纳米级陷阱元件的陷阱位置，其中通过隧道氧化物层的电荷被捕获，以及栅极电极。 纳米尺寸的阱元件可以是由彼此分离以捕获电荷的纳米晶体组成的晶体层。 存储器节点结构可以包括与纳米级陷阱元件隔离的附加存储器节点层。

    SONOS memory device having side gate stacks and method of manufacturing the same
    33.
    发明授权
    SONOS memory device having side gate stacks and method of manufacturing the same 失效
    具有侧栅叠层的SONOS存储器件及其制造方法

    公开(公告)号：US06946703B2

    公开(公告)日：2005-09-20

    申请号：US10753772

    申请日：2004-01-09

    申请人： Won-il Ryu ,  Jo-won Lee ,  Se-wook Yoon ,  Chung-woo Kim

    发明人： Won-il Ryu ,  Jo-won Lee ,  Se-wook Yoon ,  Chung-woo Kim

    IPC分类号： H01L21/8247 ,  H01L21/28 ,  H01L21/336 ,  H01L27/115 ,  H01L29/423 ,  H01L29/788 ,  H01L29/792

    CPC分类号： H01L29/66833 ,  H01L21/28273 ,  H01L21/28282 ,  H01L29/42328 ,  H01L29/7881 ,  H01L29/792 ,  H01L29/7923

    摘要： In a silicon-oxide-nitride-oxide-silicon (SONOS) memory device and a method of manufacturing the same, a SONOS memory device includes a semiconductor substrate, an insulating layer deposited on the semiconductor substrate, an active layer formed on a predetermined region of the insulating layer and divided into a source region, a drain region, and a channel region, a first side gate stack formed at a first side of the channel region, and a second side gate stack formed at a second side of the channel region opposite the first side of the channel region. In the SONOS memory device, at least two bits of data may be stored in each SONOS memory device, thereby allowing the integration density of the semiconductor memory device to be increased without increasing an area thereof.

    摘要翻译： 在氧化硅 - 氧化物 - 氧化物 - 硅（SONOS）存储器件及其制造方法中，SONOS存储器件包括半导体衬底，沉积在半导体衬底上的绝缘层，形成在预定区域上的有源层 并且被分成源区域，漏极区域和沟道区域，形成在沟道区域的第一侧的第一侧栅叠层和形成在沟道区域的第二侧的第二侧栅叠层 与通道区域的第一侧相对。 在SONOS存储器件中，可以在每个SONOS存储器件中存储至少两位数据，从而允许半导体存储器件的集成密度增加而不增加其面积。

    Single electron transistor using porous silicon and manufacturing method thereof
    35.
    发明授权
    Single electron transistor using porous silicon and manufacturing method thereof 有权
    使用多孔硅的单电子晶体管及其制造方法

    公开(公告)号：US06479365B2

    公开(公告)日：2002-11-12

    申请号：US10090169

    申请日：2002-03-05

    申请人： Jo-won Lee ,  Chung-woo Kim ,  Byong-man Kim ,  Moon-kyung Kim

    发明人： Jo-won Lee ,  Chung-woo Kim ,  Byong-man Kim ,  Moon-kyung Kim

    IPC分类号： H01L2176

    CPC分类号： H01L29/7613 ,  B82Y10/00 ,  H01L29/16 ,  Y10S438/96 ,  Y10S977/937

    摘要： A single electron transistor using porous silicon, which is fabricated by applying porous silicon having a size of several tens of nanometers obtained by electrochemically etching silicon, and a fabrication method thereof, are provided. In the single electron transistor using porous silicon, silicon pores, each of which has a diameter of 5 nm or less, are fabricated by electrochemically etching a silicon on insulator (SOI) substrate having silicon dioxide (SiO2) in its lower portion using an HF-based solution, and serve as islands of a single electron transistor. Also, a source and a drain are formed of silicon on which metal is deposited or silicon doped with impurities. Hence, formation of islands and tunnel barriers is easy, mass production is possible, and the sizes of islands can be controlled by oxidation, so that single electron transistors capable of operating at room temperature can be easily fabricated.

    摘要翻译： 提供了通过使用通过电化学蚀刻硅获得的尺寸为几十纳米的多孔硅制造的使用多孔硅的单电子晶体管及其制造方法。 在使用多孔硅的单电子晶体管中，通过使用HF在其下部电化学蚀刻其下部具有二氧化硅（SiO 2）的绝缘体上硅（SOI）衬底，制造每个具有5nm或更小直径的硅孔。 的溶液，并且用作单电子晶体管的岛。 此外，源极和漏极由其上沉积有金属的硅或掺杂有杂质的硅形成。 因此，岛和隧道壁垒的形成是容易的，批量生产是可能的，并且可以通过氧化来控制岛的尺寸，使得能够容易地制造能够在室温下操作的单电子晶体管。

    Method of operating a SONOS memory device
    36.
    发明授权
    Method of operating a SONOS memory device 有权
    操作SONOS存储器件的方法

    公开(公告)号：US07825459B2

    公开(公告)日：2010-11-02

    申请号：US12453147

    申请日：2009-04-30

    申请人： Ju-hyung Kim ,  Chung-woo Kim ,  Soo-doo Chae ,  Youn-seok Jeong

    发明人： Ju-hyung Kim ,  Chung-woo Kim ,  Soo-doo Chae ,  Youn-seok Jeong

    IPC分类号： H01L29/792 ,  H01L21/336

    CPC分类号： H01L21/28282 ,  B82Y10/00 ,  H01L21/28273 ,  H01L29/42332 ,  H01L29/513 ,  H01L29/518 ,  H01L29/7887

    摘要： A silicon-oxide-nitride-oxide-silicon (SONOS) memory device includes a memory type transistor including a gate with a SONOS structure on a semiconductor substrate. The gate is formed by sequentially stacking a tunneling oxide layer, a memory node structure including a trap site having nano-sized trap elements in which charges passing through the tunneling oxide layer are trapped, and a gate electrode. The nano-sized trap elements may be a crystal layer composed of nanocrystals that are separated from one another to trap the charges. The memory node structure may include additional memory node layers which are isolated from the nano-sized trap elements.

    摘要翻译： 氧化硅 - 氧化物 - 氧化物 - 硅（SONOS）存储器件包括在半导体衬底上包括具有SONOS结构的栅极的存储器型晶体管。 栅极通过依次层叠隧道氧化物层，存储器结构结构，其包括具有纳米级陷阱元件的陷阱位置，其中通过隧道氧化物层的电荷被捕获，以及栅极电极。 纳米尺寸的阱元件可以是由彼此分离以捕获电荷的纳米晶体组成的晶体层。 存储器节点结构可以包括与纳米级陷阱元件隔离的附加存储器节点层。

    Method of operating sonos memory device
    37.
    发明申请
    Method of operating sonos memory device 有权
    操作sonos存储器的方法

    公开(公告)号：US20090238004A1

    公开(公告)日：2009-09-24

    申请号：US12453147

    申请日：2009-04-30

    申请人： Ju-hyung Kim ,  Chung-woo Kim ,  Soo-doo Chae ,  Youn-seok Jeong

    发明人： Ju-hyung Kim ,  Chung-woo Kim ,  Soo-doo Chae ,  Youn-seok Jeong

    IPC分类号： G11C16/04 ,  G11C11/34

    CPC分类号： H01L21/28282 ,  B82Y10/00 ,  H01L21/28273 ,  H01L29/42332 ,  H01L29/513 ,  H01L29/518 ,  H01L29/7887

    摘要： A silicon-oxide-nitride-oxide-silicon (SONOS) memory device includes a memory type transistor including a gate with a SONOS structure on a semiconductor substrate. The gate is formed by sequentially stacking a tunneling oxide layer, a memory node structure including a trap site having nano-sized trap elements in which charges passing through the tunneling oxide layer are trapped, and a gate electrode. The nano-sized trap elements may be a crystal layer composed of nanocrystals that are separated from one another to trap the charges. The memory node structure may include additional memory node layers which are isolated from the nano-sized trap elements.

    摘要翻译： 氧化硅 - 氧化物 - 氧化物 - 硅（SONOS）存储器件包括在半导体衬底上包括具有SONOS结构的栅极的存储器型晶体管。 栅极通过依次层叠隧道氧化物层，存储器结构结构，其包括具有纳米级陷阱元件的陷阱位置，其中通过隧道氧化物层的电荷被捕获，以及栅极电极。 纳米尺寸的阱元件可以是由彼此分离以捕获电荷的纳米晶体组成的晶体层。 存储器节点结构可以包括与纳米级陷阱元件隔离的附加存储器节点层。

    SONOS memory device having side gate stacks and method of manufacturing the same
    38.
    发明授权
    SONOS memory device having side gate stacks and method of manufacturing the same 有权
    具有侧栅叠层的SONOS存储器件及其制造方法

    公开(公告)号：US07374991B2

    公开(公告)日：2008-05-20

    申请号：US11200153

    申请日：2005-08-10

    申请人： Won-il Ryu ,  Jo-won Lee ,  Se-wook Yoon ,  Chung-woo Kim

    发明人： Won-il Ryu ,  Jo-won Lee ,  Se-wook Yoon ,  Chung-woo Kim

    IPC分类号： H01L21/8238

    CPC分类号： H01L29/66833 ,  H01L21/28273 ,  H01L21/28282 ,  H01L29/42328 ,  H01L29/7881 ,  H01L29/792 ,  H01L29/7923

    摘要： In a silicon-oxide-nitride-oxide-silicon (SONOS) memory device and a method of manufacturing the same, a SONOS memory device includes a semiconductor substrate, an insulating layer deposited on the semiconductor substrate, an active layer formed on a predetermined region of the insulating layer and divided into a source region, a drain region, and a channel region, a first side gate stack formed at a first side of the channel region, and a second side gate stack formed at a second side of the channel region opposite the first side of the channel region. In the SONOS memory device, at least two bits of data may be stored in each SONOS memory device, thereby allowing the integration density of the semiconductor memory device to be increased without increasing an area thereof.

    摘要翻译： 在氧化硅 - 氧化物 - 氧化物 - 硅（SONOS）存储器件及其制造方法中，SONOS存储器件包括半导体衬底，沉积在半导体衬底上的绝缘层，形成在预定区域上的有源层 并且被分成源区域，漏极区域和沟道区域，形成在沟道区域的第一侧的第一侧栅叠层和形成在沟道区域的第二侧的第二侧栅叠层 与通道区域的第一侧相对。 在SONOS存储器件中，可以在每个SONOS存储器件中存储至少两位数据，从而允许半导体存储器件的集成密度增加而不增加其面积。