公开(公告)号：US5897426A

公开(公告)日：1999-04-27

申请号：US66271

申请日：1998-04-24

Applicant: Sasson Somekh

Inventor： Sasson Somekh

IPC: B24B7/22 ,  B24B37/04 ,  B24B49/12 ,  B24D13/14

CPC classification number: B24B37/245 ,  B24B37/013 ,  B24B37/042 ,  B24B37/205 ,  B24B49/12

Abstract: In chemical mechanical polishing, a substrate is planarized with one or more fixed-abrasive polishing pads. Then the substrate is polished with a standard polishing pad to remove scratch defects created by the fixed-abrasive polishing pads.

公开(公告)号：US5745331A

公开(公告)日：1998-04-28

申请号：US381786

申请日：1995-01-31

Applicant: Shamouil Shamouilian ,  Sasson Somekh ,  Hyman J. Levinstein ,  Manoocher Birang ,  Semyon Sherstinsky ,  John F. Cameron

Inventor： Shamouil Shamouilian ,  Sasson Somekh ,  Hyman J. Levinstein ,  Manoocher Birang ,  Semyon Sherstinsky ,  John F. Cameron

IPC: B23Q3/15 ,  H01L21/683 ,  H02N13/00

CPC classification number: H01L21/6831 ,  H01L21/6833 ,  H02N13/00

Abstract: An electrostatic chuck (20) for holding a substrate (75) comprises (i) a base (80) having an upper surface (95) with grooves (85) therein, the grooves (85) sized and distributed for holding coolant for cooling a substrate (75), and (ii) a substantially continuous insulator film (45) conformal to the grooves (85) on upper surface (95) of the base (80). The base (80) can be electrically conductive and capable of serving as the electrode (50) of the chuck (20), or the electrode (50) can be embedded in the insulator film (45). The insulator film (45) has a dielectric breakdown strength sufficiently high that when a substrate (75) placed on the chuck (20) and electrically biased with respect to the electrode (50), electrostatic charge accumulates in the substrate (75) and in the electrode (50) forming an electrostatic force that attracts and holds the substrate (75) to the chuck (20). Preferably the chuck (20) is fabricated using a pressure forming process, and more preferably using a pressure differential process.

Abstract translation: 用于保持基板（75）的静电卡盘（20）包括（i）具有在其中具有凹槽（85）的上表面（95）的基部（80），所述凹槽（85）的尺寸和分布以保持用于冷却的冷却剂 衬底（75），和（ii）与基座（80）的上表面（95）上的凹槽（85）共形的基本上连续的绝缘膜（45）。 基座（80）可以是导电的并且能够用作卡盘（20）的电极（50），或者电极（50）可以嵌入绝缘膜（45）中。 绝缘体膜（45）具有足够高的绝缘击穿强度，当放置在卡盘（20）上并相对于电极（50）电偏置的基板（75）时，静电电荷积聚在基板（75）中 所述电极（50）形成吸引并保持所述基板（75）到所述卡盘（20）的静电力。 优选地，使用压力成形方法制造卡盘（20），更优选使用压差法。

公开(公告)号：US5705080A

公开(公告)日：1998-01-06

申请号：US271134

申请日：1994-07-06

Applicant: Cissy S. Leung ,  Lawrence Chung-Lai Lei ,  Sasson Somekh

Inventor： Cissy S. Leung ,  Lawrence Chung-Lai Lei ,  Sasson Somekh

IPC: C30B33/12 ,  C23C16/44 ,  C23F4/00 ,  H01J37/32 ,  H01L21/00 ,  H01L21/205 ,  H01L21/302 ,  H01L21/304 ,  H01L21/3065

CPC classification number: H01L21/67028 ,  C23C16/4405 ,  H01J37/32862 ,  H01J2237/022 ,  Y10S438/905

Abstract: A process for removing deposits from within a space at least partially delimited by a surface which is subject to attack from a plasma includes the steps of placing on the surface a cover comprising a material which is inert to the plasma, and then removing the deposits.

Abstract translation: 用于从至少部分地由等离子体侵蚀的表面界定的空间内去除沉积物的方法包括以下步骤：在表面上放置包含对等离子体是惰性的材料的盖子，然后去除沉积物。

公开(公告)号：US5697748A

公开(公告)日：1997-12-16

申请号：US205711

申请日：1994-03-03

Applicant: Sasson Somekh ,  Kevin Fairbairn ,  Gary M. Kolstoe ,  Gregory W. White ,  W. George Faraco, Jr.

Inventor： Sasson Somekh ,  Kevin Fairbairn ,  Gary M. Kolstoe ,  Gregory W. White ,  W. George Faraco, Jr.

IPC: H01L21/677 ,  H01L21/683 ,  B65G65/00

CPC classification number: H01L21/67748 ,  H01L21/67739 ,  H01L21/6838 ,  Y10S414/137

Abstract: A semiconductor wafer processing system for processing wafers from a wafer storage cassette includes a wafer transfer chamber; a wafer storage elevator within the transfer chamber; one or more wafer processing chambers; and a wafer transfer apparatus for transferring a wafer between a standard storage cassette adjacent and outside the transfer chamber and the elevator, and between the elevator and the processing chamber. The storage chamber pressure varies between atmospheric when accepting wafers from outside, and a subatmospheric pressure when transferring wafers to or from a processing chamber. The transfer apparatus includes a robot arm; a thin flat wafer carrying blade at the leading end of the robot arm configured for engaging a wafer from the storage cassette or the elevator; and a wafer support tray configured for removable engagement with the blade and for engaging and positively positioning a wafer from the elevator, or a support pedestal within a processing chamber. When the transfer apparatus moves a wafer between the elevator and a processing chamber in an evacuated environment, the tray is engaged with the blade and helps retain the wafer during transit. When wafers are transferred between the cassette and the elevator at atmospheric pressure the tray is disengaged from the blade and placed in a rest position on the elevator, and the wafer transfer is performed by means of the blade alone with a vacuum pick integral to the blade. The blade includes upper and lower halves together defining vacuum channels and capacitive position sensors.

Abstract translation: 用于从晶片存储盒处理晶片的半导体晶片处理系统包括：晶片传送室; 传送室内的晶片存储电梯; 一个或多个晶片处理室; 以及晶片传送装置，用于在与传送室和电梯之间以及电梯和处理室之间的标准存储盒之间传送晶片。 当从外部接收晶片时，储存室压力在大气压之间变化，并且在将晶片转移到处理室或从处理室转移时的低于大气压。 传送装置包括机器人臂; 在所述机器人臂的前端处的薄平板晶片承载叶片，其被配置用于从所述存储盒或电梯接合晶片; 以及晶片支撑托盘，其构造成用于与所述刀片可拆卸地接合并且用于从所述电梯或处理腔室内的支撑座接合和积极地定位晶片。 当传送装置在真空环境中在电梯和处理室之间移动晶片时，托盘与刀片接合并有助于在运输过程中保持晶片。 当晶片在大气压下在盒和电梯之间转移时，托盘与叶片脱离并放置在电梯上的静止位置，并且通过单独的叶片执行晶片传送，该真空拾取器与叶片成一整体 。 叶片包括一起限定真空通道和电容位置传感器的上半部和下半部。

公开(公告)号：US5636964A

公开(公告)日：1997-06-10

申请号：US438670

申请日：1995-05-10

Applicant: Sasson Somekh ,  Kevin Fairbairn ,  Gary M. Kolstoe ,  Gregory W. White ,  W. George Faraco, Jr.

Inventor： Sasson Somekh ,  Kevin Fairbairn ,  Gary M. Kolstoe ,  Gregory W. White ,  W. George Faraco, Jr.

IPC: B65G49/07 ,  H01L21/677 ,  H01L21/683 ,  B65G65/00

CPC classification number: H01L21/6838 ,  H01L21/67742 ,  H01L21/67748 ,  Y10S294/907 ,  Y10S414/137 ,  Y10S414/139 ,  Y10S414/141

Abstract: A semiconductor wafer processing system for processing wafers from a wafer storage cassette includes a wafer transfer chamber; a wafer storage elevator within the transfer chamber; one or more wafer processing chambers; and a wafer transfer apparatus for transferring a wafer between a standard storage cassette adjacent and outside the transfer chamber and the elevator, and between the elevator and the processing chamber. The storage chamber pressure varies between atmospheric when accepting wafers from outside, and a subatmospheric pressure when transferring wafers to or from a processing chamber. The transfer apparatus includes a robot arm; a thin flat wafer carrying blade at the leading end of the robot arm configured for engaging a wafer from the storage cassette or the elevator; and a wafer support tray configured for removable engagement with the blade and for engaging and positively positioning a wafer from the elevator, or a support pedestal within a processing chamber. When the transfer apparatus moves a wafer between the elevator and a processing chamber in an evacuated enviroment, the tray is engaged with the blade and helps retain the wafer during transit. When wafers are transferred between the cassette and the elevator at atmospheric pressure the tray is disengaged from the blade and placed in a rest position on the elevator, and the wafer transfer is performed by means of the blade alone with a vacuum pick integral to the blade. The blade includes upper and lower halves together defining vacuum channels and capacitive position sensors.

Abstract translation: 用于从晶片存储盒处理晶片的半导体晶片处理系统包括：晶片传送室; 传送室内的晶片存储电梯; 一个或多个晶片处理室; 以及晶片传送装置，用于在与传送室和电梯之间以及电梯和处理室之间的标准存储盒之间传送晶片。 当从外部接收晶片时，储存室压力在大气压之间变化，并且在将晶片转移到处理室或从处理室转移时的低于大气压。 传送装置包括机器人臂; 在所述机器人臂的前端处的薄平板晶片承载叶片，其被配置用于从所述存储盒或电梯接合晶片; 以及晶片支撑托盘，其构造成用于与所述刀片可拆卸地接合并且用于从所述电梯或处理腔室内的支撑座接合和积极地定位晶片。 当传送装置在电梯和处理室之间移动晶片在真空环境中时，托盘与刀片接合并有助于在运输过程中保持晶片。 当晶片在大气压下在盒和电梯之间转移时，托盘与叶片脱离并放置在电梯上的静止位置，并且通过单独的叶片执行晶片传送，该真空拾取器与叶片成一整体 。 叶片包括一起限定真空通道和电容位置传感器的上半部和下半部。

公开(公告)号：US5556147A

公开(公告)日：1996-09-17

申请号：US438328

申请日：1995-05-10

Applicant: Sasson Somekh ,  Kevin Fairbairn ,  Gary M. Kolstoe ,  Gregory W. White ,  W. George Faraco, Jr.

Inventor： Sasson Somekh ,  Kevin Fairbairn ,  Gary M. Kolstoe ,  Gregory W. White ,  W. George Faraco, Jr.

IPC: B65G49/07 ,  H01L21/677 ,  H01L21/683 ,  B25J15/06

CPC classification number: H01L21/6838 ,  H01L21/67742 ,  H01L21/67748 ,  Y10S294/907 ,  Y10S414/137 ,  Y10S414/139 ,  Y10S414/141

Abstract: A semiconductor wafer processing system for processing wafers from a wafer storage cassette includes a wafer transfer chamber; a wafer storage elevator within the transfer chamber; one or more wafer processing chambers; and a wafer transfer apparatus for transferring a wafer between a standard storage cassette adjacent and outside the transfer chamber and the elevator, and between the elevator and the processing chamber. The environment of the storage chamber varies in pressure between atmospheric when accepting wafers from outside, and a subatmospheric pressure when transferring wafers to or from a processing chamber. The transfer apparatus includes a robot arm; a thin flat wafer carrying blade at the leading end of the robot arm and configured for engaging a wafer from the storage cassette or the elevator; and a wafer support tray which is configured for removable engagement with the blade and for engaging and positively positioning a wafer from the elevator, or a support pedestal within a processing chamber. When the transfer apparatus moves a wafer between the elevator and a processing chamber in an evacuated environment, the tray is engaged with the blade and helps retain the wafer during transit. When wafers are transferred between the cassette and the elevator at atmospheric pressure the tray is disengaged from the blade and placed in a rest position on the elevator, and the wafer transfer is performed by means of the blade alone with a vacuum pick integral to the blade. The blade includes upper and lower halves together defining vacuum channels and capacitive position sensors.

Abstract translation: 用于从晶片存储盒处理晶片的半导体晶片处理系统包括：晶片传送室; 传送室内的晶片存储电梯; 一个或多个晶片处理室; 以及晶片传送装置，用于在与传送室和电梯之间以及电梯和处理室之间的标准存储盒之间传送晶片。 当从外部接收晶片时，储存室的环境在大气压之间变化，并且在将晶片转移到处理室或从处理室转移时的低于大气压。 传送装置包括机器人臂; 在所述机器人臂的前端处的薄平板晶片承载叶片，并且构造成用于从所述存储盒或电梯接合晶片; 以及晶片支撑托盘，其构造成用于与所述刀片可移除接合，并且用于接合并且将来自所述升降机的晶片或将处理室内的支撑基座正确地定位。 当传送装置在真空环境中在电梯和处理室之间移动晶片时，托盘与刀片接合并有助于在运输过程中保持晶片。 当晶片在大气压下在盒和电梯之间转移时，托盘与叶片脱离并放置在电梯上的静止位置，并且通过单独的叶片执行晶片传送，该真空拾取器与叶片成一整体 。 叶片包括一起限定真空通道和电容位置传感器的上半部和下半部。

公开(公告)号：US5384008A

公开(公告)日：1995-01-24

申请号：US79481

申请日：1993-06-18

Applicant: Ashok Sinha ,  Sasson Somekh

Inventor： Ashok Sinha ,  Sasson Somekh

IPC: C23C16/458 ,  H01L21/00

CPC classification number: H01L21/02087 ,  C23C16/4583 ,  H01L21/0209 ,  H01L21/68735 ,  H01L21/32136 ,  Y10S438/905 ,  Y10S438/928

Abstract: A process and apparatus is described for depositing a layer of material over the entire frontside surface of a semiconductor wafer without leaving residues on the backside of said wafer. A semiconductor wafer is placed on the surface of a first wafer support without contacting the frontside surface of the wafer to thereby permit access by deposition materials to the entire frontside surface of the wafer, and then a layer of material is deposited on the entire frontside surface of the semiconductor wafer. To remove any deposits formed on the backside of the wafer during such a deposition, the coated wafer is then placed generally coaxially on the surface of a generally circular second wafer support which will permit access to the outermost portions of the backside of the wafer. In one embodiment the second wafer support is provided with an annular groove coaxially formed in the surface of the second wafer support which faces the backside of the wafer. This annular groove has an outer diameter larger than the diameter of the wafer and an inner diameter smaller than the outer diameter of that portion of the backside of the wafer not containing deposits thereon from the deposition step, so that all of the backside surface containing such depositions is exposed by the groove. The wafer is then etched to remove from the backside any materials deposited thereon during the deposition step, by permitting etchant materials to contact such backside deposits through the annular groove formed in the second wafer support.

Abstract translation: 描述了用于在半导体晶片的整个前侧表面上沉积材料层而不在所述晶片的背面留下残留物的方法和装置。 将半导体晶片放置在第一晶片支撑体的表面上，而不接触晶片的前侧表面，从而允许通过沉积材料进入晶片的整个前侧表面，然后在整个前侧表面上沉积一层材料 的半导体晶片。 为了在这样的沉积期间去除形成在晶片背面的任何沉积物，涂覆的晶片然后大致同轴地放置在大致圆形的第二晶片支撑件的表面上，这将允许进入晶片背面的最外部分。 在一个实施例中，第二晶片支撑件设置有同轴地形成在面向晶片背面的第二晶片支撑件的表面中的环形槽。 该环形槽的外径大于晶片的直径，内径小于晶片背面部分的外径，该晶片的背面不含有从沉积步骤沉积在其上的部分，所以包含这种 凹槽露出沉积物。 然后在沉积步骤期间，通过允许蚀刻剂材料通过形成在第二晶片支撑件中的环形槽接触这种背面沉积物，从而将晶片从背面剥离出沉积在其上的任何材料。

公开(公告)号：US5292393A

公开(公告)日：1994-03-08

申请号：US808786

申请日：1991-12-16

Applicant: Dan Maydan ,  Sasson Somekh ,  David N. Wang ,  David Cheng ,  Masato Toshima ,  Isaac Harari ,  Peter D. Hoppe

Inventor： Dan Maydan ,  Sasson Somekh ,  David N. Wang ,  David Cheng ,  Masato Toshima ,  Isaac Harari ,  Peter D. Hoppe

IPC: H01L21/00 ,  C23C16/00 ,  B65G1/06

CPC classification number: H01L21/67167 ,  H01L21/67201

Abstract: An integrated modular multiple chamber vacuum processing system is disclosed. The system includes a load lock, may include an external cassette elevator, and an internal load lock wafer elevator, and also includes stations about the periphery of the load lock for connecting one, two or several vacuum process chambers to the load lock chamber. A robot is mounted within the load lock and utilizes a concentric shaft drive system connected to an end effector via a dual four-bar link mechanism for imparting selected R-.theta. movement to the blade to load and unload wafers at the external elevator, internal elevator and individual process chambers. The system is uniquely adapted for enabling various types of IC processing including etch, deposition, sputtering and rapid thermal annealing chambers, thereby providing the opportunity for multiple step, sequential processing using different processes.

Abstract translation: 公开了一种集成的模块化多室真空处理系统。 该系统包括一个加载锁定，可以包括一个外部盒式电梯和一个内部装载锁定晶片升降机，并且还包括围绕负载锁的周边的站，用于将一个，两个或几个真空处理室连接到负载锁定室。 机器人被安装在装载锁中，并且利用通过双重四杆连杆机构连接到端部执行器的同心轴驱动系统，用于将选定的R（θ）运动传递到叶片以在外部升降机上加载和卸载晶片， 内部电梯和各个处理室。 该系统独特地适用于实现各种类型的IC处理，包括蚀刻，沉积，溅射和快速热退火室，从而为使用不同工艺的多步骤顺序处理提供了机会。

公开(公告)号：US4668338A

公开(公告)日：1987-05-26

申请号：US814638

申请日：1985-12-30

Applicant: Dan Maydan ,  Sasson Somekh ,  Mei Cheng ,  David Cheng

Inventor： Dan Maydan ,  Sasson Somekh ,  Mei Cheng ,  David Cheng

IPC: H01L21/302 ,  H01J37/32 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/306 ,  B44C1/22 ,  C03C15/00 ,  C03C25/06

CPC classification number: H01J37/32623 ,  H01J37/3266 ,  H01L21/31116 ,  H01L21/32137 ,  H01J2237/3341

Abstract: A magnetically-enhanced, variable magnetic field, RIE mode plasma etch process for etching materials such as dielectrics and polycrystalline, is disclosed. The variable magnetic field permits optimization of selected characteristics such as etch rate, etch selectivity, ion bombardment and radiation damage, etch uniformity, and etch anisotropy.

Abstract translation: 公开了用于蚀刻诸如电介质和多晶的材料的磁增强型可变磁场RIE模式等离子体蚀刻工艺。 可变磁场允许优化所选择的特性，例如蚀刻速率，蚀刻选择性，离子轰击和辐射损伤，蚀刻均匀性和蚀刻各向异性。

公开(公告)号：US07361582B2

公开(公告)日：2008-04-22

申请号：US11670720

申请日：2007-02-02

Applicant: Tom Wu ,  Sasson Somekh ,  Chien Chiang

Inventor： Tom Wu ,  Sasson Somekh ,  Chien Chiang

IPC: H01L21/44

CPC classification number: H01L21/7684 ,  C25D3/02 ,  C25D3/38 ,  C25D5/22 ,  C25D5/34 ,  C25D7/123 ,  C25D17/001 ,  H01L21/3212 ,  H01L21/32125

Abstract: Methods are provided for forming a circuit component on a workpiece substrate. The methods comprise the steps of depositing a dielectric material over the substrate; etching a pattern through the dielectric material to expose a portion of the substrate; depositing a barrier metal over the dielectric material and the exposed portion of the substrate; depositing a conductive metal over the barrier metal, the deposited conductive metal having a thickness sufficient to fill the etched pattern; planarizing the conductive metal to form a planar metal layer; and polishing the metal layer and the barrier metal in a single polishing step using an abrasive-free polish until the dielectric material surrounding the pattern is exposed.

Abstract translation: 提供了用于在工件基板上形成电路部件的方法。 该方法包括以下步骤：在衬底上沉积电介质材料; 蚀刻通过介电材料的图案以暴露基底的一部分; 在介电材料和基板的暴露部分上沉积阻挡金属; 在阻挡金属上沉积导电金属，沉积的导电金属具有足以填充蚀刻图案的厚度; 平面化导电金属以形成平坦的金属层; 并且在单次抛光步骤中使用无研磨抛光剂抛光金属层和阻挡金属，直到暴露图案周围的电介质材料。