利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

37 条记录 (耗时 0.038 秒)

    Circuit and a method for controlling a backlight of a liquid crystal display in a portable computer
    31.
    发明授权
    Circuit and a method for controlling a backlight of a liquid crystal display in a portable computer 失效
    电路和控制便携式计算机中的液晶显示器的背光的方法

    公开(公告)号：US5854617A

    公开(公告)日：1998-12-29

    申请号：US647064

    申请日：1996-05-09

    申请人： Chang-Hum Lee ,  Yun-Ho Choi

    发明人： Chang-Hum Lee ,  Yun-Ho Choi

    IPC分类号： G02F1/1335 ,  G06F1/32 ,  G09G3/34 ,  H04M1/73 ,  H05B41/392 ,  G09G3/36

    CPC分类号： G06F1/3218 ,  G09G3/3406 ,  H05B41/3922 ,  G09G2320/0626 ,  G09G2320/0633 ,  G09G2330/02 ,  G09G2330/021 ,  G09G2360/145 ,  H04W52/027

    摘要： A backlight luminescence control device for use in a portable computer to control a backlight of a liquid crystal display. When an AC adaptor is not connected to the portable computer, the device senses the voltage level of a DC battery and generates an electrical signal that indicates the status of the battery. From the voltage level of the DC battery, the device ascertains the appropriate luminescence level of a cold-cathode fluorescent backlight lamp (CCFL), automatically controls the brightness of the CCFL through several levels of luminosity, and optimizes the luminescence of the CCFL according to the voltage level available in the DC battery.

    摘要翻译： 一种背光发光控制装置，用于便携式计算机中以控制液晶显示器的背光。 当交流适配器未连接到便携式计算机时，该装置感测直流电池的电压电平并产生指示电池状态的电信号。 根据直流电池的电压值，设备确定了冷阴极荧光背光灯（CCFL）的合适发光度，通过多个亮度自动控制CCFL的亮度，并根据CCFL的发光优化 直流电池中可用的电压电平。

    Data output buffer of a semiconductor memory device
    32.
    发明授权
    Data output buffer of a semiconductor memory device 失效
    半导体存储器件的数据输出缓冲器

    公开(公告)号：US5384735A

    公开(公告)日：1995-01-24

    申请号：US130131

    申请日：1993-10-04

    申请人： Churoo Park ,  Yun-Ho Choi

    发明人： Churoo Park ,  Yun-Ho Choi

    IPC分类号： C21C5/40 ,  G11C7/00 ,  G11C7/10 ,  G11C7/22 ,  G11C11/407 ,  G11C11/409 ,  H03K17/687

    CPC分类号： G11C7/1057 ,  G11C7/1051 ,  G11C7/106 ,  G11C7/22

    摘要： A semiconductor memory device using a clock of a constant period supplied from the exterior of a memory chip and a sense amplifier for reading out data from a memory cell designated by an address includes at least two different delay circuits for setting at least two delay time periods from the clock, a selecting circuit for receiving signals generated from the delay circuits and selecting one of said signals by a given control signal, and a data output buffer for receiving the data generated from the sense amplifier by a signal generated from the selecting circuit.

    摘要翻译： 使用从存储芯片的外部提供的恒定周期的时钟和用于从由地址指定的存储单元读出数据的读出放大器的半导体存储器件包括至少两个不同的延迟电路，用于设置至少两个延迟时间段 从时钟开始，用于接收从延迟电路产生的信号并通过给定的控制信号选择所述信号之一的选择电路，以及用于通过从选择电路产生的信号接收从读出放大器产生的数据的数据输出缓冲器。

    Chamber inserts and apparatuses for processing a substrate
    33.
    发明授权
    Chamber inserts and apparatuses for processing a substrate 有权
    腔体插入件和用于处理衬底的装置

    公开(公告)号：US08366827B2

    公开(公告)日：2013-02-05

    申请号：US11447933

    申请日：2006-06-07

    申请人： Jung-Hun Seo ,  Jin-Gi Hong ,  Kyung-Bum Koo ,  Yun-Ho Choi ,  Eun-Taeck Lee ,  Hyun Chul Kwun

    发明人： Jung-Hun Seo ,  Jin-Gi Hong ,  Kyung-Bum Koo ,  Yun-Ho Choi ,  Eun-Taeck Lee ,  Hyun Chul Kwun

    IPC分类号： C23C16/00 ,  C23F1/00 ,  H01L21/306

    CPC分类号： H01L21/68721 ,  C23C16/44 ,  C23C16/4408 ,  C23C16/45519 ,  C23C16/45591 ,  Y10T29/41

    摘要： Disclosed are chamber inserts and apparatuses using the chamber inserts. A chamber insert may include a cylindrical body portion including a top end portion and a bottom end portion, a first protruding portion extending outwardly from a first portion of the cylindrical body portion, the first portion positioned circumferentially along the cylindrical body portion and a second protruding portion extending outwardly from a second portion of the cylindrical body portion, the second portion positioned circumferentially along less than all of the cylindrical body portion. In another example, the chamber insert may include a cylindrical body portion including a top end portion and a bottom end portion, the cylindrical body portion including a slit and at least one hole, the slit and the at least one hole positioned circumferentially along the cylindrical body portion and a first protruding portion extending outwardly from a first portion of the cylindrical body portion.

    摘要翻译： 公开了使用腔室插入件的腔室插入件和装置。 腔室插入件可以包括包括顶端部分和底端部分的圆柱形主体部分，从圆柱形主体部分的第一部分向外延伸的第一突出部分，沿着圆柱形主体部分周向定位的第一部分和第二突出部分 该部分从圆柱形主体部分的第二部分向外延伸，第二部分沿着比圆柱形主体部分的全部圆周方向定位。 在另一示例中，腔室插入件可以包括包括顶端部分和底端部分的圆柱体部分，该圆柱形主体部分包括狭缝和至少一个孔，所述狭缝和至少一个孔沿着圆柱形 主体部分和从圆柱形主体部分的第一部分向外延伸的第一突出部分。

    Method of forming plasma and method of forming a layer using the same
    36.
    发明申请
    Method of forming plasma and method of forming a layer using the same 审中-公开
    形成等离子体的方法和使用其形成层的方法

    公开(公告)号：US20070042132A1

    公开(公告)日：2007-02-22

    申请号：US11450455

    申请日：2006-06-12

    申请人： Jung-Hun Seo ,  Young-Wook Park ,  JIn-Gi Hong ,  Kyung-Bum Koo ,  Eun-Taeck Lee ,  Yun-Ho Choi

    发明人： Jung-Hun Seo ,  Young-Wook Park ,  JIn-Gi Hong ,  Kyung-Bum Koo ,  Eun-Taeck Lee ,  Yun-Ho Choi

    IPC分类号： H05H1/24 ,  C03C15/00

    CPC分类号： C23C16/5096 ,  C23C16/14 ,  C23C16/34 ,  H01L21/28556 ,  H01L21/76841 ,  H01L21/76856

    摘要： A method of forming plasma used in a process of manufacturing a semiconductor device and a method of forming a layer for a semiconductor device using the plasma are disclosed. The plasma forming method includes forming a plasma region in a sealed space by supplying a plasma source gas into the sealed space at a first flow rate and maintaining the plasma region by supplying a plasma maintenance gas into the sealed space at a second flow rate higher than the first flow rate. The plasma source gas includes a first gas having a first atomic weight, and the plasma maintenance gas includes a second gas having a second atomic weight lower than the first atomic weight. The plasma source gas includes argon and the plasma maintenance gas includes helium. The method may further include forming the layer on a wafer by supplying a source gas into the sealed space.

    摘要翻译： 公开了一种在制造半导体器件的工艺中使用的形成等离子体的方法以及使用该等离子体形成半导体器件层的方法。 等离子体形成方法包括在密封空间中形成等离子体区域，通过以等于第一流量的方式将密封空间中的等离子体源气体以第一流量提供，并通过以等于或等于 第一流量。 等离子体源气体包括具有第一原子量的第一气体，等离子体维持气体包括具有比第一原子量低的第二原子量的第二气体。 等离子体源气体包括氩气，等离子体维持气体包括氦气。 该方法还可以包括通过将源气体供应到密封空间中在晶片上形成该层。

    Lift pin for used in semiconductor manufacturing facilities and method of manufacturing the same
    37.
    发明申请
    Lift pin for used in semiconductor manufacturing facilities and method of manufacturing the same 审中-公开
    用于半导体制造设备的升降销及其制造方法

    公开(公告)号：US20050150462A1

    公开(公告)日：2005-07-14

    申请号：US11030808

    申请日：2005-01-05

    申请人： Jung-Hun Seo ,  Yun-Ho Choi ,  Young-Wook Park ,  Jeong-Tae Kim

    发明人： Jung-Hun Seo ,  Yun-Ho Choi ,  Young-Wook Park ,  Jeong-Tae Kim

    IPC分类号： H01L21/205 ,  C23C16/00 ,  C23C16/44 ,  C23C16/458 ,  H01L21/687

    CPC分类号： C23C16/4586 ,  C23C16/4404 ,  C23C16/4581 ,  H01L21/68742 ,  Y10T29/49

    摘要： Provided are a lift pin capable of preventing aluminum from depositing on the lift pin when depositing a metallic layer on a wafer through chemical vapor deposition. a system using the lift pin, and a method of manufacturing the same. The lift pin is made of stainless steel and is oxidized at a predetermined temperature for a predetermined time, such that the lift pin is not deposited with aluminum during a CVD process. Since the CVD vacuum processing chamber utilizes the heater and the lift pin which are made of oxidized SUS material, aluminum does not deposit on the heater and the lift. Therefore, when the lift pin is lowered, the lift pin is not lowered by its own weight, thereby preventing a wafer from being broken. Also, the lift pin is prevented from being ruptured by a robot moving in and out of an opening of the CVD vacuum processing chamber.

    摘要翻译： 提供了一种提升销，其能够通过化学气相沉积在金属层上沉积金属层时能够防止铝沉积在升降销上。 使用升降销的系统及其制造方法。 提升销由不锈钢制成，并在预定温度下氧化预定时间，使得在CVD工艺期间提升销不被铝沉积。 由于CVD真空处理室利用由氧化的SUS材料制成的加热器和提升销，铝不会沉积在加热器和电梯上。 因此，当升降销降低时，提升销不会因其自重而下降，从而防止晶片破裂。 此外，防止升降销被机械人移入和移出CVD真空处理室的开口而破裂。