公开(公告)号：US20190027449A1

公开(公告)日：2019-01-24

申请号：US15652249

申请日：2017-07-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Albert Wan ,  Chao-Wen Shih ,  Shou-Zen Chang ,  Nan-Chin Chuang

IPC: H01L23/66 ,  H01L23/00 ,  H01L23/48 ,  H01L23/31 ,  H01L23/60 ,  H01L21/56 ,  H01L21/683 ,  H01Q1/22

Abstract: A package structure includes at least one die, an antenna element, and at least one through interlayer via. The antenna element is located on the at least one die. The at least one through interlayer via is located between the antenna element and the at least one die, wherein the antenna element is electrically connected to the at least one die through the at least one through interlayer via.

公开(公告)号：US10186492B1

公开(公告)日：2019-01-22

申请号：US15652249

申请日：2017-07-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Albert Wan ,  Chao-Wen Shih ,  Shou-Zen Chang ,  Nan-Chin Chuang

IPC: H01L23/66 ,  H01L23/00 ,  H01L23/48 ,  H01L23/31 ,  H01L23/60 ,  H01L21/56 ,  H01L21/683 ,  H01Q1/22 ,  H01L21/66

Abstract: A package structure includes at least one die, an antenna element, and at least one through interlayer via. The antenna element is located on the at least one die. The at least one through interlayer via is located between the antenna element and the at least one die, wherein the antenna element is electrically connected to the at least one die through the at least one through interlayer via.

公开(公告)号：US10157807B2

公开(公告)日：2018-12-18

申请号：US15235106

申请日：2016-08-12

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yung-Ping Chiang ,  Chao-Wen Shih ,  Shou-Zen Chang ,  Albert Wan ,  Yu-Sheng Hsieh

IPC: H01L23/31 ,  H01L21/768 ,  H01L23/48 ,  H01L23/528 ,  H01L23/66 ,  H01L23/00 ,  H01Q9/04 ,  H01L21/56

Abstract: Sensor packages and manufacturing methods thereof are disclosed. One of the sensor packages includes a semiconductor chip and a redistribution layer structure. The semiconductor chip has a sensing surface. The redistribution layer structure is arranged to form an antenna transmitter structure aside the semiconductor chip and an antenna receiver structure over the sensing surface of the semiconductor chip.

公开(公告)号：US20180269139A1

公开(公告)日：2018-09-20

申请号：US15638386

申请日：2017-06-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yung-Ping Chiang ,  Chao-Wen Shih ,  Min-Chien Hsiao ,  Nien-Fang Wu ,  Shou-Zen Chang ,  Yi-Che Chiang

IPC: H01L23/495 ,  H01L23/66 ,  H01L25/16 ,  H01P1/30 ,  H01P3/02 ,  H01L23/31 ,  H01L23/433

CPC classification number: H01L23/49548 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/4334 ,  H01L23/49575 ,  H01L23/49838 ,  H01L23/5389 ,  H01L23/66 ,  H01L25/162 ,  H01L25/165 ,  H01L2224/18 ,  H01P1/2005 ,  H01P1/30 ,  H01P3/026 ,  H01Q1/2283 ,  H01Q15/0086 ,  H01Q21/062

Abstract: A package structure comprising a die, a first molding compound encapsulating the die, an antenna structure and a reflector pattern disposed above the die is provided. Through vias penetrating through the first molding compound are disposed around the die. The reflector pattern is disposed on the die and the through vias. The antenna structure is disposed on the reflector pattern and electrically connected with the reflector pattern and the die. The antenna structure is wrapped by a second molding compound disposed on the reflector pattern.

公开(公告)号：US09818722B1

公开(公告)日：2017-11-14

申请号：US15229711

申请日：2016-08-05

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chuei-Tang Wang ,  Kai-Chiang Wu ,  Chieh-Yen Chen ,  Yen-Ping Wang ,  Shou-Zen Chang

IPC: H01L25/065 ,  H01L25/00

CPC classification number: H01L25/0652 ,  H01L21/565 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/19 ,  H01L24/20 ,  H01L25/03 ,  H01L25/50 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16227 ,  H01L2224/24137 ,  H01L2224/73267 ,  H01L2224/81005 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/06517 ,  H01L2225/06537 ,  H01L2225/06548 ,  H01L2225/06558 ,  H01L2225/06572 ,  H01L2225/06582 ,  H01L2924/15311 ,  H01L2924/1815 ,  H01L2924/3025 ,  H01L2224/81

Abstract: A package structure includes a package, at least one first molding material, and at least one second semiconductor device. The package includes at least one first semiconductor device therein. The package has a top surface. The first molding material is present on the top surface of the package and has at least one opening therein, in which at least a region of the top surface of the package is exposed by the opening of the first molding material. The second semiconductor device is present on the top surface of the package and is molded in the first molding material.