公开(公告)号：US4953125A

公开(公告)日：1990-08-28

申请号：US173749

申请日：1988-03-25

申请人： Yoshinori Okumura ,  Akihiko Ohsaki ,  Kazuyuki Sugahara ,  Tatsuhiko Ikeda

发明人： Yoshinori Okumura ,  Akihiko Ohsaki ,  Kazuyuki Sugahara ,  Tatsuhiko Ikeda

IPC分类号： H01L29/41 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108

CPC分类号： H01L27/10829

摘要： A semiconductor memory device includes a first trench serving as a memory cell formed in a p type semiconductor substrate, a first n type semiconductor region formed adjacent to the trench region and on the major surface of the semiconductor substrate, a conductive layer serving as an electron active region formed adjacent to the first n type region and on the major surface of the semiconductor substrate, a second n type semiconductor region formed adjacent to the electron active region and on the major surface of the semiconductor substrate, a second trench formed adjacent to the second n type semiconductor region in the major surface of the semiconductor substrate which is shallower than the first trench, an interconnection layer serving as a bit line formed in a self-aligning manner in the sidewall portion of the second trench which is shallower than the first trench and a gate electrode serving as a word line formed in the upper portion of the conductive layer through an oxide film.

摘要翻译： 半导体存储器件包括用作形成在p型半导体衬底中的存储单元的第一沟槽，与沟槽区相邻并且在半导体衬底的主表面上形成的第一n型半导体区，用作电子活性的导电层 形成在与第一n型区域相邻并且在半导体衬底的主表面上形成的第二n型半导体区域，形成在与电子有源区相邻并且在半导体衬底的主表面上，第二沟槽， 在半导体衬底的主表面上比第一沟槽浅的n型半导体区域，在第二沟槽的侧壁部分中以自对准的方式形成的位线的互连层比第一沟槽浅 以及用作通过氧化膜形成在导电层的上部的字线的栅电极 。

公开(公告)号：US4845537A

公开(公告)日：1989-07-04

申请号：US127138

申请日：1987-12-01

申请人： Tadashi Nishimura ,  Kazuyuki Sugahara ,  Shigeru Kusunoki ,  Akihiko Ohsaki

发明人： Tadashi Nishimura ,  Kazuyuki Sugahara ,  Shigeru Kusunoki ,  Akihiko Ohsaki

IPC分类号： H01L27/10 ,  H01L21/336 ,  H01L21/8242 ,  H01L27/108 ,  H01L29/78

CPC分类号： H01L27/10841 ,  H01L29/7827

摘要： A vertical MOS transistor having its channel length determined by the thickness of an insulating layer provided over a semiconductor substrate, rather than by the depth of a trench in which the transistor is formed. As a result, the characteristics of the transistor as relatively unaffected by doping and heat-treatment steps which are performed during formation. Also, the transistor may be formed so as to occupy very little surface area, making it suitable for application in high-density DRAMs. 0O048455372

摘要翻译： 一种垂直MOS晶体管，其沟道长度由设置在半导体衬底上的绝缘层的厚度确定，而不是由形成晶体管的沟槽的深度确定。 结果，晶体管的特性相对不受在形成期间进行的掺杂和热处理步骤的影响。 此外，晶体管可以形成为占据非常小的表面积，使其适用于高密度DRAM。 0048455372

公开(公告)号：US4822752A

公开(公告)日：1989-04-18

申请号：US022717

申请日：1987-03-06

申请人： Kazuyuki Sugahara ,  Tadashi Nishimura ,  Shigeru Kusunoki ,  Yasuo Inoue

发明人： Kazuyuki Sugahara ,  Tadashi Nishimura ,  Shigeru Kusunoki ,  Yasuo Inoue

IPC分类号： H01L21/20 ,  H01L21/268 ,  H01L21/822 ,  H01L29/04 ,  H01L21/306 ,  H01L21/326 ,  H01L21/479

CPC分类号： H01L21/8221 ,  H01L21/2026 ,  H01L21/268 ,  H01L29/045 ,  Y10S117/904 ,  Y10S148/09 ,  Y10S148/091 ,  Y10S148/093

摘要： Disclosed herein is a process for producing a single crystal layer of a semiconductor device, which comprises the steps of providing an oxide insulator layer separated by an opening part for seeding, on a major surface of a single crystal semiconductor substrate of the cubic system, providing a polycrystalline or amorphous semiconductor layer on the entire surface of the insulator layer inclusive of the opening part, then providing a protective layer comprising at least a reflective or anti-reflection film comprising strips of a predetermined width, in a predetermined direction relative to the opening part and at a predetermined interval, the protective layer capable of controlling the temperature distributions in the semiconductor layer at the parts corresponding to the stripes or the parts not corresponding to the stripes, thereby completing a base for producing a semiconductor device, thereafter the surface of the base is irradiated with an energy beam through the striped reflective or anti-reflection film to melt the polycrystalline or amorphous semiconductor and scanning the energy beam in a predetermined direction such that the direction of the crystal of the semiconductor re-solidified and converted into a single crystal accords with a {111} plane, to produce the single crystal of the semiconductor device. Also disclosed is a semiconductor device produced by the method, which comprises a single crystal layer having a wide range of a crystal in a predetermined direction relative to the facial orientation of the major surface of the substrate, and has a three-dimensional semiconductor circuit element construction.

摘要翻译： 本发明公开了一种制造半导体器件的单晶层的方法，其包括以下步骤：在立方晶系的单晶半导体衬底的主表面上提供由用于接种的开口部分开的氧化物绝缘体层，提供 在包括开口部分的绝缘体层的整个表面上的多晶或非晶半导体层，然后提供保护层，该保护层至少包括反射膜或防反射膜，该反射膜或抗反射膜包括相对于开口的预定方向的预定宽度的条 部分并且以预定间隔，保护层能够控制对应于条纹的部分或不对应于条纹的部分的半导体层中的温度分布，从而完成用于制造半导体器件的基底，之后， 用能量束通过条纹反射照射基座 或抗反射膜，以熔化多晶或非晶半导体并沿预定方向扫描能量束，使得半导体晶体的方向重新固化并转换成单晶符合{111}面，以产生 半导体器件的单晶。 还公开了一种通过该方法制造的半导体器件，该半导体器件包括相对于衬底的主表面的面取向在预定方向上具有宽范围的晶体的单晶层，并且具有三维半导体电路元件 施工。

公开(公告)号：US08334115B2

公开(公告)日：2012-12-18

申请号：US13088228

申请日：2011-04-15

申请人： Kazuyuki Sugahara ,  Hiroshi Kitagawa

发明人： Kazuyuki Sugahara ,  Hiroshi Kitagawa

IPC分类号： C12P19/26 ,  C12P19/18 ,  C12P19/04 ,  C12N9/10 ,  C07H21/04

CPC分类号： C12N9/1051 ,  C12P19/26

摘要： A vector of the present invention has DNA encoding a protein or a product having the same effect as the protein, the protein containing an amino acid sequence from amino acid numbers 47 to 802 in SEQ. ID. NO:2. Expression of the DNA gives human chondroitin synthase. By using human chondroitin synthase, it is possible to produce a saccharide chain having a repeating disaccharide unit of chondroitin. The DNA or part thereof may be used as a probe for hybridization for the human chondroitin synthase.

摘要翻译： 本发明的载体具有编码蛋白质或具有与蛋白质相同效果的产物的DNA，该蛋白质含有SEQ ID NO：47至802的氨基酸序列。 ID。 NO：2。 DNA的表达给人软骨素合成酶。 通过使用人软骨素合成酶，可以生成具有软骨素重复二糖单元的糖链。 DNA或其部分可以用作人类软骨素合酶杂交的探针。

公开(公告)号：US08080450B2

公开(公告)日：2011-12-20

申请号：US12596453

申请日：2007-12-05

申请人： Kazuyuki Sugahara ,  Naoki Nakagawa ,  Shinsuke Yura ,  Toru Takeguchi ,  Tomoyuki Irizumi ,  Kazushi Yamayoshi ,  Atsuhiro Sono

发明人： Kazuyuki Sugahara ,  Naoki Nakagawa ,  Shinsuke Yura ,  Toru Takeguchi ,  Tomoyuki Irizumi ,  Kazushi Yamayoshi ,  Atsuhiro Sono

IPC分类号： H01L21/84 ,  H01L21/00 ,  H01L21/205

CPC分类号： H01L21/02675 ,  H01L21/02532 ,  H01L27/1285 ,  H01L27/1296 ,  H01L29/04 ,  H01L29/0657

摘要： On a translucent substrate, an insulating film having a refractive index n and an amorphous silicon film are deposited successively. By irradiating the amorphous silicon film with a laser beam having a beam shape of a band shape extending along a length direction with a wavelength λ, a plurality of times from a side of amorphous silicon film facing the insulating film, while an irradiation position of the laser beam is shifted each of the plurality of times in a width direction of the band shape by a distance smaller than a width dimension of the band shape, a polycrystalline silicon film is formed from the amorphous silicon film. Forming the polycrystalline silicon film forms crystal grain boundaries which extend in the width direction and are disposed at a mean spacing measured along the length direction and ranging from (λ/n)×0.95 to (λ/n)×1.05 inclusive, and crystal grain boundaries which, in a region between crystal grain boundaries adjacent to each other and extending in the width direction, extend in the length direction and are disposed at a mean spacing measured along the width direction and ranging from (λ/n)×0.95 to (λ/n)×1.05 inclusive.

摘要翻译： 在半透明基板上，依次沉积具有折射率n的绝缘膜和非晶硅膜。 通过从具有波长λ方向的波长形状的波束形状的激光束照射非晶硅膜，从非晶硅膜的与绝缘膜相对的侧面多次， 激光束在带状的宽度方向上多次移动距离小于带状的宽度尺寸的距离，由非晶硅膜形成多晶硅膜。 形成多晶硅膜形成在宽度方向上延伸的晶粒边界，并且以沿长度方向测量的平均间隔设置，范围为（λ/ n）×0.95〜（λ/ n）×1.05， 在彼此相邻并且在宽度方向上延伸的晶粒边界之间的区域中，在长度方向上延伸并沿宽度方向测量的平均间隔设置在（λ/ n）×0.95〜（ λ/ n）×1.05（含）。

公开(公告)号：US20110262972A1

公开(公告)日：2011-10-27

申请号：US13088228

申请日：2011-04-15

申请人： Kazuyuki Sugahara ,  Hiroshi Kitagawa

发明人： Kazuyuki Sugahara ,  Hiroshi Kitagawa

IPC分类号： C12P19/26

CPC分类号： C12N9/1051 ,  C12P19/26

摘要： A vector of the present invention has DNA encoding a protein or a product having the same effect as the protein, the protein containing an amino acid sequence from amino acid numbers 47 to 802 in SEQ. ID. NO:2. Expression of the DNA gives human chondroitin synthase. By using human chondroitin synthase, it is possible to produce a saccharide chain having a repeating disaccharide unit of chondroitin. The DNA or part thereof may be used as a probe for hybridization for the human chondroitin synthase.

摘要翻译： 本发明的载体具有编码蛋白质或具有与蛋白质相同效果的产物的DNA，该蛋白质含有SEQ ID NO：47至802的氨基酸序列。 ID。 NO：2。 DNA的表达给人软骨素合成酶。 通过使用人软骨素合成酶，可以生成具有软骨素重复二糖单元的糖链。 DNA或其部分可以用作人类软骨素合酶杂交的探针。

公开(公告)号：US07396707B2

公开(公告)日：2008-07-08

申请号：US11565429

申请日：2006-11-30

申请人： Yoshihiko Toyoda ,  Takao Sakamoto ,  Kazuyuki Sugahara

发明人： Yoshihiko Toyoda ,  Takao Sakamoto ,  Kazuyuki Sugahara

IPC分类号： H01L29/47

CPC分类号： H01L27/1222 ,  H01L27/1214 ,  H01L27/127 ,  H01L29/66757 ,  H01L29/78624 ,  H01L2029/7863

摘要： A silicon nitride film and a silicon oxide film are formed on a glass substrate. On the silicon oxide film is formed a thin film transistor T including a source region, a drain region, a channel region having a predetermined channel length, a first GOLD region having an impurity concentration lower than the impurity concentration of the source region, a second GOLD region having an impurity concentration lower than the impurity concentration of the drain region, a gate insulation film, and a gate electrode. The length of an overlapping portion in plane between the gate electrode and the second GOLD region in the direction of the channel length is set longer than the length in the direction of the channel region of an overlapping portion in plane between the gate electrode and the first GOLD region.

摘要翻译： 在玻璃基板上形成氮化硅膜和氧化硅膜。 在氧化硅膜上形成薄膜晶体管T，该薄膜晶体管T包括源极区，漏极区，具有预定沟道长度的沟道区，具有低于源区杂质浓度的杂质浓度的第一GOLD区， GOLD区域的杂质浓度低于漏极区域的杂质浓度，栅极绝缘膜和栅电极。 在沟道长度方向上的栅电极和第二GOLD区之间的平面重叠部分的长度被设定为长于栅电极和第一栅极之间的平面重叠部分的沟道区域的方向上的长度 金地区。

公开(公告)号：US5480826A

公开(公告)日：1996-01-02

申请号：US383539

申请日：1995-02-03

申请人： Kazuyuki Sugahara ,  Hideaki Arima

发明人： Kazuyuki Sugahara ,  Hideaki Arima

IPC分类号： H01L27/04 ,  H01L21/02 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108 ,  H01L29/16 ,  H01L29/94 ,  H01L21/70 ,  H01L27/00

CPC分类号： H01L27/10852 ,  H01L27/10817 ,  H01L28/91 ,  H01L29/16 ,  H01L29/94

摘要： A semiconductor device includes a capacitor, of which insulator has an improved durability. In the semiconductor device, a capacitor lower electrode 11 of the cylindrical capacitor includes a standing wall portion 11b, which is formed of a polysilicon layer having a large crystal grain diameter (1000 .ANG.-10000 .ANG.).

摘要翻译： 半导体器件包括其绝缘体具有改善的耐久性的电容器。 在半导体装置中，圆筒形电容器的电容器下部电极11包括由具有大晶粒直径（1000安培-10000昂贵）的多晶硅层形成的立壁部11b。

公开(公告)号：US5401683A

公开(公告)日：1995-03-28

申请号：US243706

申请日：1988-09-13

申请人： Kazuyuki Sugahara

发明人： Kazuyuki Sugahara

IPC分类号： H01L21/20 ,  H01L21/263

CPC分类号： H01L21/2026 ,  Y10S117/904

摘要： A method of manufacturing a multi-layered semiconductor substrate comprising:a step of forming a first insulation film on the main surface of a semiconductor substrate composed of single crystals,a step of forming a first linear opening of a predetermined size reaching the semiconductor substrate at a predetermined position of the first insulation film,a step of forming second opening with the opening area of 25 .mu.m.sup.2 or less and reaching the semiconductor substrate along the first opening to the first insulation film at a position a spaced apart at least by 10 .mu.m from the outer edge of the first opening,a step of forming a semiconductor layer composed of non-single crystals on the first insulation film also including the inside of the first and the second openings,a step of forming a second insulation film on the semiconductor layer,a step of supplying heat energy to the semiconductor layer by scanning in the direction from the first opening toward the second opening, and melting the semiconductor layer with the heat energy thereby single-crystallizing the semiconductor layer, anda step of removing the second insulation film.

摘要翻译： 一种制造多层半导体衬底的方法，包括：在由单晶构成的半导体衬底的主表面上形成第一绝缘膜的步骤，形成到达半导体衬底的预定尺寸的第一线性开口的步骤 第一绝缘膜的预定位置，形成具有25μm2或更小的开口面积的第二开口的步骤，并且沿着第一开口到达第一绝缘膜的半导体衬底至间隔至少10μ的位置 m，在包括第一和第二开口的内部的第一绝缘膜上形成由非单晶构成的半导体层的步骤，在第一绝缘膜上形成第二绝缘膜的步骤 半导体层，通过沿着从第一开口朝向第二开口的方向扫描而向半导体层提供热能并熔化的步骤 使半导体层具有热能从而使半导体层单结晶，以及去除第二绝缘膜的步骤。

公开(公告)号：US4990991A

公开(公告)日：1991-02-05

申请号：US115049

申请日：1987-10-30

申请人： Tatsuhiko Ikeda ,  Kazuyuki Sugahara ,  Shigeru Kusunoki ,  Kyusaku Nishioka

发明人： Tatsuhiko Ikeda ,  Kazuyuki Sugahara ,  Shigeru Kusunoki ,  Kyusaku Nishioka

IPC分类号： H01L21/285 ,  H01L21/331 ,  H01L29/73

CPC分类号： H01L29/7317 ,  H01L21/28525 ,  Y10S148/011

摘要： Disclosed herein is a bipolar transistor and a method of manufacturing the same. The present invention provides a biolar transistor in which a collector layer, a base layer and an emitter layer are transversely arranged in sequence through a monocrystal silicon layer formed on an insulation layer of a semiconductor substrate and a method of manufacturing the same. According to the present invention, parasitic capacity between a base and a collector can be reduced and p-n junction capacity between the collector and the substrate can be removed, thereby to achieve high-speed operation.

摘要翻译： 本文公开了一种双极晶体管及其制造方法。 本发明提供一种双极晶体管及其制造方法，其中集电极层，基极层和发射极层依次形成在半导体衬底的绝缘层上形成的单晶硅层。 根据本发明，可以降低基极和集电极之间的寄生电容，并且可以去除集电极和基板之间的p-n结电容，从而实现高速操作。