摘要:
A semiconductor device comprising a peripheral circuit portion and a memory cell portion including a plurality of memory cells. Each memory cell has first and second gate-gate connecting layers, first and second drain-drain connecting layers, and first and second drain-gate connecting layers. The first and second gate-gate connecting layers respectively connect the gates of driver transistors to the gates of load transistors. The first and second drain-drain connecting layers are formed over a first interlayer dielectric and respectively connect the drains of driver transistors to the drains of load transistors. The first and second drain-gate connecting layers are formed over a second interlayer dielectric and respectively connect the first drain-drain connecting layer to the second gate-gate connecting layer and the second drain-drain connecting layer to the first gate-gate connecting layer.
摘要:
In order to manufacture a surface emission type semiconductor laser, a plurality of semiconductor layers including a multilayered semiconductor mirror, a cladding layer, an active layer and other layers are sequentially formed on a substrate through the organic metal vapor growth method. A photoresist mask is then formed on the semiconductor layers. At least the cladding layer in the semiconductor layers is anisotropically etched by the use of the photoresist mask. At least one column-like portion is thus formed to have sidewalls extending perpendicular to the substrate and to guide the light in a direction perpendicular to the substrate. Thereafter, a buried layer including a single layer formed therein at an area covering at least the sidewalls of the column-like portion is formed around the column-like portion. A multilayered dielectric mirror is deposited in the column-like portion on the light exit end thereof. The multilayered dielectric mirror is disposed at the light exit port of a light exit side electrode. To increase the reflectivity below the light exit side electrode, a multilayered semiconductor mirror may be formed in the column-like portion at a position nearer the light exit side than the cladding layer.
摘要:
A surface emission type semiconductor laser includes a plurality of semiconductor layers defining at least one resonator in a direction perpendicular to the semiconductor substrate of the laser, the layers including at least a cladding layer in the semiconductor layers being formed into at least one column-like portion extending in a direction perpendicular to the semiconductor substrate, and a II-VI group compound semiconductor epitaxial layer buried around the column-like portion. The column-like portion is of rectangular cross-section in a plane parallel to the semiconductor substrate and having longer and shorter sides, whereby the polarization plane of said emitted laser beam is parallel to the direction of said shorter sides.
摘要:
A method for dismantling a furnace having a multilayered refractory structure including: a furnace shell; a containing layer that is formed of a containing refractory that contains asbestos, and covers the inner side of the furnace shell; and a multilayered non-containing layer that is formed of a non-containing refractory that contains no asbestos, and covers the inner side of the containing layer, the method includes: a primary dismantling process; and a secondary dismantling process conducted after the primary dismantling process. In the primary dismantling process, the non-containing layer is dismantled from a furnace-core side thereof but the containing layer and at least one layer of the layers forming the non-containing layer, which is in contact with the containing layer, are left as a remnant. In the secondary dismantling process, the remnant is dismantled while asbestos measures are implemented.
摘要:
A housing has a cylinder and a compression chamber. A plunger is slidable in the cylinder and configured to pressurize fuel in the compression chamber. A cam is eccentric with respect to a shaft center axis of a camshaft and integrally rotatable with the camshaft. A sliding member is slidable around an outer circumferential periphery of the cam and configured to revolve around the shaft center axis in conjunction with rotation of the camshaft. The plunger is slidable on the sliding member and configured to convert the revolution into a linear movement. The cam and the sliding member are accommodated in the housing. The sliding member has an opening through which the outer circumferential periphery is partially exposed.
摘要:
A fuel filter is located downstream of a feed pump to filter fuel discharged from the feed pump. An orifice is located between the fuel filter and a suction quantity control valve to restrict a flow rate of the fuel passing through the fuel filter. A positive pressure of the feed pump is applied to the fuel filter, and a passing pressure at the fuel filter increases. Even if viscosity of the fuel increases and the fuel becomes wax-like at low temperature, clogging of the fuel filter or an insufficient flow rate can be inhibited. The orifice restricts the flow rate of the fuel passing through the fuel filter. Accordingly, an increase in size of the fuel filter can be prevented even if the fuel filter is located downstream of the feed pump.
摘要:
A semiconductor device has first wiring layers 30 and a plurality of dummy wiring layers 32 that are provided on the same level as the first wiring layers 30. The semiconductor device defines a row direction, and first virtual linear lines L1 extending in a direction traversing the row direction. The row direction and the first virtual linear lines L1 define an angle of 2-40 degrees, and the dummy wiring layers 32 are disposed in a manner to be located on the first virtual linear lines L1. The semiconductor device also defines a column direction perpendicular to the row direction, and second virtual linear lines L2 extending in a direction traversing the column direction. The column direction and the second virtual linear lines L2 define an angle of 2-40 degrees, and the dummy wiring layers 32 are disposed in a manner to be located on the second virtual linear lines L2.
摘要:
A method for generating mask data that is used for a method of manufacturing semiconductor devices is provided. The semiconductor device includes wiring layers disposed in a specified pattern on a base and stress relieving layers disposed in a specified pattern over the base. The method for generating mask data comprises a step of forming resized patterns 130 by resizing wiring layer patterns 120 with a positive (+) resizing amount, a step of deleting, among the resized patterns 130, resized patterns having portions that mutually overlap, and a step of forming stress relieving layer patterns having a specified width outside the resized patterns.
摘要:
A semiconductor storage device showing a good memory characteristic, and a manufacturing method thereof, includes a semiconductor layer, a stacked body including a first insulating layer, a charge trapping layer, and a second insulating layer that are provided above the semiconductor layer, a gate electrode provided above the stacked body, a side wall insulating layer provided at the side of the gate electrode, and impurity regions and provided in the semiconductor layer. The end surface of the stacked body is positioned outside the end surface of the gate electrode.
摘要:
A method for manufacturing a semiconductor device that maintains good embedding property of plug metal, and expands the short margin of upper wiring layers to be connected to plugs, may include enlarging an end region 18 of a hole 12, such that embedding of a barrier metal 13 and a plug metal 14 in the hole 12 that is given a high aspect ratio is facilitated. Next, a planarization step is conducted against deposited surfaces of the plug metal 14 by a chemical mechanical polishing (CMP) process. In this step, a part of the interlayer dielectric layer 11 is removed together with an unnecessary portion of the plug metal 14 to a level where the end region (having a diameter d2) that is greater than a practical diameter d1 of the hole 12 disappears. Then, an upper wiring layer 15 is patterned, using a lithography technique, on the planarized interlayer dielectric layer 11 having an exposed portion of the plug metal 14 that has the practical diameter of the hole.