公开(公告)号：US20240320013A1

公开(公告)日：2024-09-26

申请号：US18731784

申请日：2024-06-03

Applicant: Texas Instruments Incorporated

Inventor： Mark Edward Wentroble ,  Anant Shankar Kamath ,  Rakesh Hariharan ,  Prajwala P ,  Suzanne Mary Vining

IPC: G06F9/4401 ,  G06F1/3215 ,  G06F13/38 ,  G06F13/42

CPC classification number: G06F9/4411 ,  G06F1/3215 ,  G06F13/382 ,  G06F13/4282 ,  G06F2213/0042

Abstract: A serial bus repeater includes first and second ports adapted to be coupled to respective devices. A first termination resistor network couples to the first port. A second termination resistor network couples to the second port. A squelch detect circuit couples to the first bus port and is configured to detect activity on the first bus and to generate a squelch signal responsive to detection of activity on the first port. A first state machine is configured to: determine an elapsed time during which the squelch signal indicates activity on the first port; determine that the elapsed time exceeds a first threshold; and, responsive to the determination that the elapsed time exceeds the first threshold, assert configuration signals to reconfigure the first and second termination resistor networks.

公开(公告)号：US12051978B2

公开(公告)日：2024-07-30

申请号：US17813366

申请日：2022-07-19

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Dushmantha Bandara Rajapaksha ,  Roland Sperlich ,  Anant Shankar Kamath ,  Vijayalakshmi Devarajan ,  Wesley Ray

IPC: H02M3/335 ,  H01F27/28 ,  H02M1/42 ,  H02M3/155 ,  H04L13/02 ,  H02M3/00

CPC classification number: H02M3/33523 ,  H01F27/288 ,  H02M1/4258 ,  H02M3/155 ,  H02M3/33569 ,  H02M3/33573 ,  H04L13/02 ,  H02M3/01

Abstract: A semiconductor package includes a transformer having a primary winding and a secondary winding. The primary winding has first and second terminals and a pair of taps. The secondary winding has first and second terminals and a pair of taps. The semiconductor package includes first and second data transfer circuits, a bridge, and a rectifier. The first data transfer circuit is coupled to the pair of taps of the primary winding. The second data transfer circuit is coupled to the pair of taps of the secondary winding. The bridge is coupled to the first and second terminals of the primary winding. The rectifier is coupled to the first and second terminals of the secondary winding.

公开(公告)号：US20230069663A1

公开(公告)日：2023-03-02

申请号：US17446132

申请日：2021-08-26

Applicant: Texas Instruments Incorporated

Inventor： Kishalay Datta ,  Anant Shankar Kamath ,  Kumar Anurag Shrivastava ,  Swaminathan Sankaran

IPC: G05F1/56 ,  H03F1/02

Abstract: An example apparatus includes: a compensation circuit including: a current compensation output, a first transistor with a first current terminal and a first control terminal, the first current terminal coupled to the current compensation output, and a resistor ladder with a tap terminal coupled to the first control terminal, a current mirror circuit having a mirror input and a mirror output, the mirror input coupled to the current compensation output, and a rectification circuit having an input coupled to the mirror output.

公开(公告)号：US11255901B2

公开(公告)日：2022-02-22

申请号：US16734624

申请日：2020-01-06

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Anant Shankar Kamath

IPC: G01R31/00 ,  G01R31/28 ,  G01R31/52 ,  G01R31/54 ,  H03K17/795

Abstract: An optocoupler is placed in series between the field ground pin of digital input circuitry and the field ground of an industrial controller. A capacitor to field ground is provided for each digital input. A resistor is provided to the input pin of the digital input circuitry. To detect a broken wire a test pulse is provided to the optocoupler connected in the ground path. This test pulse isolates the digital input circuitry from field ground. As current is always being provided from the field when the wire is not broken, the capacitor connected between the input and ground charges. After the test pulse has completed, the output signal of the digital input circuitry is examined. If the level indicates the input is high, the wire is not broken. If, however, the output remains low indicating that the input is low, the wire has broken.

公开(公告)号：US11119971B1

公开(公告)日：2021-09-14

申请号：US17071902

申请日：2020-10-15

Applicant: Texas Instruments Incorporated

Inventor： Tarunvir Singh ,  Anant Shankar Kamath

IPC: G06F13/00 ,  G06F13/42 ,  G06F13/40

Abstract: Disclosed embodiments include a serial buffer device comprising first and second serial input/output (I/O) ports, first and second comparators, and a multiplexer having a first input coupled to the output of the first comparator and a second input coupled to the output of the second comparator. There is also a transistor, a third comparator having first and second inputs and an output, wherein the first input is coupled to the second serial I/O port, the second input is coupled to a third reference voltage source, and the output is coupled to the control terminal of the multiplexer. Additionally, the embodiment includes an impedance controlled driver circuit having an input and an output, wherein the input is coupled to the output of the third comparator and the output is coupled to the first serial I/O port.

公开(公告)号：US20210211039A1

公开(公告)日：2021-07-08

申请号：US16736235

申请日：2020-01-07

Applicant: Texas Instruments Incorporated

Inventor： Yihuang Lin ,  Abhijeeth Aarey Premanath ,  Anant Shankar Kamath

IPC: H02M1/32 ,  H02M7/06

Abstract: A circuit for providing input surge protection in a digital input module, the circuit comprising a surge protection input stage, including a bridge rectifier coupled to receive the bidirectional input signal, and coupled to the unidirectional input of the digital input module. The bridge rectifier comprises TVS rectifiers TVS1 and TVS2, and diode rectifiers D2 and D3, intercoupled in a bridge rectifier configuration in which: TVS1 and TVS4 are transient voltage suppression diodes; and rectifiers D2 and D3 are rectifier diodes. Diodes TVS1 and TVS4 can be implemented as either respective unidirectional TVS diodes; or a single bidirectional TVS diode. The digital input module can be a digital input receiver, or a opto-isolator/coupler, or other digital input module.

公开(公告)号：US10557884B2

公开(公告)日：2020-02-11

申请号：US15832968

申请日：2017-12-06

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Anant Shankar Kamath

IPC: G01R31/00 ,  G01R31/02 ,  H03K17/795

Abstract: An optocoupler is placed in series between the field ground pin of digital input circuitry and the field ground of an industrial controller. A capacitor to field ground is provided for each digital input. A resistor is provided to the input pin of the digital input circuitry. To detect a broken wire a test pulse is provided to the optocoupler connected in the ground path. This test pulse isolates the digital input circuitry from field ground. As current is always being provided from the field when the wire is not broken, the capacitor connected between the input and ground charges. After the test pulse has completed, the output signal of the digital input circuitry is examined. If the level indicates the input is high, the wire is not broken. If, however, the output remains low indicating that the input is low, the wire has broken.

公开(公告)号：US10363861B2

公开(公告)日：2019-07-30

申请号：US16151410

申请日：2018-10-04

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Anant Shankar Kamath ,  Divyasree J.

IPC: B60Q1/04 ,  H04L7/00 ,  H04L25/02 ,  H04L25/08 ,  F21S45/43 ,  F21S45/49 ,  B60Q1/00 ,  H01L23/40

Abstract: One example includes a communication system. The system includes a data transmitter configured to generate a digital communication signal and a data receiver configured to receive the digital communication signal. The system also includes a pulse-width distortion (PWD) correction circuit arranged between the data transmitter and the data receiver and being configured to adjust at least one timing parameter associated with the communication signal.

公开(公告)号：US20190077302A1

公开(公告)日：2019-03-14

申请号：US16151410

申请日：2018-10-04

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Anant Shankar Kamath ,  Divyasree J.

IPC: B60Q1/04 ,  B60Q1/00 ,  F21S45/49 ,  H01L23/40 ,  F21S45/43

CPC classification number: B60Q1/0483 ,  B60Q1/0029 ,  B60Q1/0094 ,  F21S45/43 ,  F21S45/49 ,  H01L23/4093 ,  H04L7/0037 ,  H04L7/0087 ,  H04L25/0266 ,  H04L25/0292 ,  H04L25/085

Abstract: One example includes a communication system. The system includes a data transmitter configured to generate a digital communication signal and a data receiver configured to receive the digital communication signal. The system also includes a pulse-width distortion (PWD) correction circuit arranged between the data transmitter and the data receiver and being configured to adjust at least one timing parameter associated with the communication signal.

公开(公告)号：US10122524B2

公开(公告)日：2018-11-06

申请号：US15899658

申请日：2018-02-20

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Anant Shankar Kamath ,  Divyasree J.

IPC: H04L7/00 ,  H04L25/02 ,  H04L25/08

Abstract: One example includes a communication system. The system includes a data transmitter configured to generate a digital communication signal and a data receiver configured to receive the digital communication signal. The system also includes a pulse-width distortion (PWD) correction circuit arranged between the data transmitter and the data receiver and being configured to adjust at least one timing parameter associated with the communication signal.