摘要:
A 10.sup.-6 ohm cm.sup.2 ohmic contact is provided by formation of a 20-50 Angstroms deep surface region with a net donor density of higher than 5.times.10.sup.19 /cc. An amphoteric dopant of Si or Ge is incorporated in a pinned Fermi level condition so that an enhanced surface donor concentration occurs.
摘要:
A submicron conductor is formed by placing a metal member over an insulator both terminating at a common defined edge. An angularly deposited metal against the edge provides a broad metal conductor attached along the entire edge of a thin metal member which is positioned on the substrate on a narrow line with the width defined by the horizontal component of the angular deposition. A removal operation removes with respect to the vertical component of the angular deposition the excess angularly deposited metal and leaves a vertical, very narrow metal conductor having a horizontal metal over the dielectric in electrical and supporting contact along the entire length. The asymmetry of the conductor provides field effect transistor advantages.
摘要:
A ballistic conduction majority carrier type semiconductor device structure can be fabricated with a built-in difference in barrier height between the emitter and collector interfaces by employing surface fermi level pinning in a crystalline structure with three copolanar regions of different semiconductor materials. The center region between the interfaces with the external zones of the structure has a thickness of the order of the mean free path of an electron. The materials of the external regions are such that there is a mismatch between the crystal spacing of the external regions and the central region which causes the fermi level of the material in the central zone to be pinned in the region of the conduction band at the interfaces with the external regions and the material of the external regions is selected so that the surface fermi level is pinned in the forbidden region. A monocrystalline structure having an emitter region of GaAs, a central or base region of InAs or W 100 .ANG. to 500 .ANG. thick, and a collector region of GaInAs provides switching in the range of 10.sup.-12 seconds.
摘要:
Ion implanted impurity activation in a multi-element compound semiconductor crystal such as gallium arsenide, GaAs, over a broad integrated circuit device area, is accomplished using a short time anneal, in the proximity of a uniform concentration of the most volatile element of said crystal, in solid form, over the broad integrated circuit device area surface. A GaAs integrated circuit wafer having ion implanted impurities in the surface for an integrated circuit is annealed in the vicinity of 800.degree.-900.degree. C. for a time of the order of 1-20 seconds in the proximity of a uniform layer of solid arsenic.