公开(公告)号：US20130285201A1

公开(公告)日：2013-10-31

申请号：US13458947

申请日：2012-04-27

申请人： Zhihong Zhang ,  Xu Cheng ,  Todd C. Roggenbauer ,  Jiang-Kai Zuo

发明人： Zhihong Zhang ,  Xu Cheng ,  Todd C. Roggenbauer ,  Jiang-Kai Zuo

IPC分类号： H01L29/02 ,  H01L21/02

CPC分类号： H01L28/92 ,  H01L29/92

摘要： Metal-insulator metal (MIM) capacitors are formed by providing a substrate having a first surface, forming thereon a first electrode having conductive and insulating regions wherein the conductive regions desirably have an area density DA less than 100%. A first dielectric is formed over the first electrode. A cavity is formed in the first dielectric, having a sidewall extending to the first electrode and exposing thereon some of the first electrode conductive and insulating regions. An electrically conductive barrier layer is formed covering the sidewall and the some of the first electrode conductive and insulating regions. A capacitor dielectric layer is formed in the cavity covering the barrier layer. A counter electrode is formed in the cavity covering the capacitor dielectric layer. External connections are formed to a portion of the first electrode laterally outside the cavity and to the counter electrode within the cavity.

摘要翻译： 通过提供具有第一表面的基板形成金属绝缘体金属（MIM）电容器，在其上形成具有导电和绝缘区域的第一电极，其中导电区域希望具有小于100％的面密度DA。 第一电介质形成在第一电极上。 在第一电介质中形成空腔，其具有延伸到第一电极并在其上暴露第一电极导电和绝缘区域的一些的侧壁。 形成覆盖侧壁和一些第一电极导电绝缘区域的导电阻挡层。 在覆盖阻挡层的空腔中形成电容器电介质层。 在覆盖电容器介电层的空腔中形成对电极。 外部连接形成在腔的横向外侧的第一电极的一部分和腔内的对电极。

公开(公告)号：US20130299939A1

公开(公告)日：2013-11-14

申请号：US13469386

申请日：2012-05-11

申请人： Yoba Amoah ,  John J. Ellis-Monaghan ,  Roger C. Kuo ,  Molly J. Leitch ,  Zhihong Zhang

发明人： Yoba Amoah ,  John J. Ellis-Monaghan ,  Roger C. Kuo ,  Molly J. Leitch ,  Zhihong Zhang

IPC分类号： H01L27/06 ,  H01L21/26

CPC分类号： H01L23/544 ,  H01L27/08 ,  H01L2223/5444 ,  H01L2223/5446 ,  H01L2223/54473 ,  H01L2924/0002 ,  H01L2924/00

摘要： Various embodiments disclosed include methods of performing a double exposure process on a level of an integrated circuit (IC) chip to form an IC chip having an embedded electrically measurable identifier. In some cases, the method includes: exposing a level of an integrated circuit (IC) chip using a first mask orientation; subsequently exposing the level of the IC chip using a second mask orientation distinct from the first mask orientation; and developing the level of the IC chip to form an electrically measurable identifier on the IC chip.

摘要翻译： 公开的各种实施例包括在集成电路（IC）芯片的电平上执行双重曝光处理以形成具有嵌入的可电测量标识符的IC芯片的方法。 在一些情况下，该方法包括：使用第一掩模取向曝光集成电路（IC）芯片的电平; 随后使用与第一掩模取向不同的第二掩模取向暴露IC芯片的电平; 并且开发IC芯片的电平以在IC芯片上形成可电测量的标识符。

公开(公告)号：US20130265068A1

公开(公告)日：2013-10-10

申请号：US13443450

申请日：2012-04-10

申请人： Yoba Amoah ,  John J. Ellis-Monaghan ,  Roger C. Kuo ,  Molly J. Leitch ,  Zhihong Zhang

发明人： Yoba Amoah ,  John J. Ellis-Monaghan ,  Roger C. Kuo ,  Molly J. Leitch ,  Zhihong Zhang

IPC分类号： G01R31/3187

CPC分类号： G01R31/318511 ,  G01R31/2856 ,  G11C29/006 ,  G11C29/12 ,  G11C2029/1206

摘要： A method of testing a semiconductor wafer and a related structure. In various embodiments, a method includes: placing a probe on a first chip on the semiconductor wafer; testing a scribe line automatic built-in self-test (ABIST) for the first chip to search for a fault; progressively testing a subsequent scribe line ABIST for a subsequent chip on the semiconductor wafer in response to determining the ABIST for the first chip does not indicate the fault; moving the probe point to the subsequent chip and retesting the subsequent scribe line ABIST in response to determining the ABIST for the subsequent chip indicates a fault; and testing a further subsequent scribe line ABIST for a further subsequent chip on the semiconductor wafer in response to determining the retesting of the subsequent scribiline ABIST does not indicate a fault in the subsequent scribe line ABIST.

摘要翻译： 一种半导体晶片的测试方法及相关结构。 在各种实施例中，一种方法包括：将探针放置在半导体晶片上的第一芯片上; 测试划线自动内置自检（ABIST）为第一芯片寻找故障; 响应于确定第一芯片的ABIST而对半导体晶片上的后续芯片进行随后的划线ABIST的逐步测试不表示故障; 将探针点移动到随后的芯片，并且响应于确定随后芯片的ABIST指示故障，重新测试随后的划线ABIST; 以及响应于确定随后的scribiline的重新测试，测试另一后续划线ABIST用于半导体晶片上的另外的后续芯片，ABIST不指示后续划线ABIST中的故障。

公开(公告)号：US08491802B1

公开(公告)日：2013-07-23

申请号：US13042819

申请日：2011-03-08

申请人： Wei Gao ,  Dujiang Wan ,  Zhihong Zhang ,  Lijun Tong

发明人： Wei Gao ,  Dujiang Wan ,  Zhihong Zhang ,  Lijun Tong

IPC分类号： B29D11/00 ,  C03C15/00

CPC分类号： G11B5/6088 ,  G11B5/3133 ,  G11B2005/0021

摘要： A method of forming an energy assisted magnetic recording (EAMR) writer is disclosed. A structure comprising a bottom cladding layer and a near field transducer (NFT) is provided. A patterned sacrificial layer is formed over the structure. A top cladding layer is deposited over the patterned sacrificial layer and a remaining region of the structure not covered by the patterned sacrificial layer. A patterned resist is formed over the top cladding layer. A first etching operation is performed on the top cladding layer via the patterned resist, whereby a top cladding having a sloped region is formed. The patterned sacrificial layer provides an etch stop for the first etching operation.

摘要翻译： 公开了一种形成能量辅助磁记录（EAMR）写入器的方法。 提供包括底部包层和近场换能器（NFT）的结构。 在该结构上形成图案化的牺牲层。 顶部覆层沉积在图案化的牺牲层上，并且该结构的剩余区域未被图案化的牺牲层覆盖。 在顶部包层上形成图案化的抗蚀剂。 通过图案化的抗蚀剂在顶部包层上进行第一蚀刻操作，从而形成具有倾斜区域的顶部包层。 图案化的牺牲层为第一蚀刻操作提供蚀刻停止。

公开(公告)号：US08120402B2

公开(公告)日：2012-02-21

申请号：US12425366

申请日：2009-04-16

申请人： Zhihong Zhang ,  Xujiang Huang

发明人： Zhihong Zhang ,  Xujiang Huang

IPC分类号： H03K3/017 ,  H03K5/04 ,  H03K7/08

CPC分类号： H03K5/1565 ,  H02M3/156 ,  H03K3/017 ,  H03K7/08

摘要： A pulse width modulated (PWM) controller includes a triangle wave generation circuit generating a triangle wave signal to oscillate between an upper limit voltage and a lower limit voltage. The upper limit voltage and the lower limit voltage are adjustable in response to changes in the power supply voltage. A pulse generation circuit is coupled to the triangle wave generation circuit and a minimum duty cycle setting voltage, and is configured to generate a PWM pulse signal with a minimum duty cycle determined by the relative magnitude of the triangle wave signal and the minimum duty cycle reference voltage. In an embodiment, the minimum duty cycle is increased when the power supply voltage is lower than a predetermined reference voltage.

摘要翻译： 脉宽调制（PWM）控制器包括产生三角波信号的三角波产生电路，以在上限电压和下限电压之间振荡。 上限电压和下限电压可根据电源电压的变化而调节。 脉冲发生电路耦合到三角波产生电路和最小占空比设置电压，并且被配置为产生具有由三角波信号的相对幅度和最小占空比基准确定的最小占空比的PWM脉冲信号 电压。 在一个实施例中，当电源电压低于预定参考电压时，最小占空比增加。

公开(公告)号：US20110020242A1

公开(公告)日：2011-01-27

申请号：US12747815

申请日：2008-12-12

申请人： Gang Zheng ,  Zhihong Zhang ,  Ian Corbin ,  Juan Chen

发明人： Gang Zheng ,  Zhihong Zhang ,  Ian Corbin ,  Juan Chen

IPC分类号： A61K49/14 ,  C07K17/02 ,  A61K49/00 ,  A61K9/14 ,  A61P35/00

CPC分类号： A61K49/0082 ,  A61K47/6917 ,  A61K47/6919 ,  A61K49/0002 ,  A61K49/0032 ,  A61K49/0056 ,  B82Y5/00 ,  G01N33/54346 ,  G01N33/587 ,  G01N2800/00

摘要： The present invention provides a non-naturally occurring High-Density Lipoprotein-like peptide-phospholipid scaffold (“HPPS”) nanoparticle. More particularly, the invention provides a non-naturally occurring peptide-lipid nanoscaffold comprising: (a) at least one phospholipid; (b) at least one unsaturated lipid, preferably an unsaturated sterol ester, further preferably an unsaturated cholesterol ester, further preferably cholsteryl oleate; and (c) at least one peptide, the peptide comprising an amino acid sequence capable of forming at least one amphipathic a-helix; wherein the components a), b) and c) associate to form the peptide-phospholipid nanoscaffold. In embodiments of the present invention, a cell surface receptor ligand is incorporated into the HPPS. In one embodiment, the cell surface receptor ligand is covalently bonded to the peptide scaffold of the HPPS nanoparticles. In other embodiments, a cell surface receptor ligand is coupled to a lipid anchor and is displayed on the surface of the HPPS nanoparticles by incorporation of the lipid anchor into the phospholipids monolayer of the HPPS nanoparticle. The present invention also provides pharmaceutical formulations comprising HPPS nanoparticles and methods of making the HPPS nanoparticles.

摘要翻译： 本发明提供非天然存在的高密度脂蛋白样肽 - 磷脂支架（“HPPS”）纳米颗粒。 更具体地，本发明提供非天然存在的肽 - 脂质纳米支架，其包含：（a）至少一种磷脂; （b）至少一种不饱和脂质，优选不饱和甾醇酯，更优选不饱和胆固醇酯，更优选油酸胆甾醇酯; 和（c）至少一种肽，所述肽包含能够形成至少一种两亲性α-螺旋的氨基酸序列; 其中组分a），b）和c）缔合形成肽 - 磷脂纳米支架。 在本发明的实施方案中，将细胞表面受体配体掺入HPPS中。 在一个实施方案中，细胞表面受体配体共价键合到HPPS纳米颗粒的肽支架上。 在其它实施方案中，将细胞表面受体配体偶联到脂质锚定物上，并通过将脂质锚点掺入HPPS纳米颗粒的磷脂单层中而显示在HPPS纳米颗粒的表面上。 本发明还提供了包含HPPS纳米颗粒的药物制剂和制备HPPS纳米颗粒的方法。

公开(公告)号：US07603700B2

公开(公告)日：2009-10-13

申请号：US11023649

申请日：2004-12-29

申请人： Yan Cheng ,  Zhihong Zhang

发明人： Yan Cheng ,  Zhihong Zhang

IPC分类号： G06F7/04 ,  H04L9/32

CPC分类号： H04L63/08 ,  G06F21/41 ,  H04L9/3271 ,  H04L63/0428 ,  H04L63/18

摘要： Techniques are provided for improving security in a single-sign-on context by providing, to a user's client system, two linked authentication credentials in separate logical communication sessions and requiring that both credentials be presented to a host system. Only after presentation of both credentials is the user authenticated and permitted to access applications on the host system.

摘要翻译： 提供技术用于通过在单独的逻辑通信会话中向用户的客户端系统提供两个链接的认证凭证并且要求将这两个凭证提供给主机系统来提高单点登录上下文中的安全性。 只有在显示两个凭据之后，用户才能通过身份验证并允许访问主机系统上的应用程序。

公开(公告)号：US09331991B2

公开(公告)日：2016-05-03

申请号：US12575121

申请日：2009-10-07

申请人： Yan Cheng ,  Zhihong Zhang

发明人： Yan Cheng ,  Zhihong Zhang

IPC分类号： H04L29/06 ,  G06F21/41 ,  H04L9/32

CPC分类号： H04L63/08 ,  G06F21/41 ,  H04L9/3271 ,  H04L63/0428 ,  H04L63/18

摘要： Techniques are provided for improving security in a single-sign-on context by providing, to a user's client system, two linked authentication credentials in separate logical communication sessions and requiring that both credentials be presented to a host system. Only after presentation of both credentials is the user authenticated and permitted to access applications on the host system.

公开(公告)号：US08890557B2

公开(公告)日：2014-11-18

申请号：US13443450

申请日：2012-04-10

申请人： Yoba Amoah ,  John J. Ellis-Monaghan ,  Roger C. Kuo ,  Molly J. Leitch ,  Zhihong Zhang

发明人： Yoba Amoah ,  John J. Ellis-Monaghan ,  Roger C. Kuo ,  Molly J. Leitch ,  Zhihong Zhang

IPC分类号： G01R31/3187

CPC分类号： G01R31/318511 ,  G01R31/2856 ,  G11C29/006 ,  G11C29/12 ,  G11C2029/1206

摘要： A method of testing a semiconductor wafer and a related structure. In various embodiments, a method includes: placing a probe on a first chip on the semiconductor wafer; testing a scribe line automatic built-in self-test (ABIST) for the first chip to search for a fault; progressively testing a subsequent scribe line ABIST for a subsequent chip on the semiconductor wafer in response to determining the ABIST for the first chip does not indicate the fault; moving the probe point to the subsequent chip and retesting the subsequent scribe line ABIST in response to determining the ABIST for the subsequent chip indicates a fault; and testing a further subsequent scribe line ABIST for a further subsequent chip on the semiconductor wafer in response to determining the retesting of the subsequent scribiline ABIST does not indicate a fault in the subsequent scribe line ABIST.

摘要翻译： 一种半导体晶片的测试方法及相关结构。 在各种实施例中，一种方法包括：将探针放置在半导体晶片上的第一芯片上; 测试划线自动内置自检（ABIST）为第一芯片寻找故障; 响应于确定第一芯片的ABIST而对半导体晶片上的后续芯片进行随后的划线ABIST的逐步测试不表示故障; 将探针点移动到随后的芯片，并且响应于确定随后芯片的ABIST指示故障，重新测试随后的划线ABIST; 以及响应于确定随后的scribiline的重新测试，测试另一后续划线ABIST用于半导体晶片上的另外的后续芯片，ABIST不指示后续划线ABIST中的故障。

公开(公告)号：US08674641B2

公开(公告)日：2014-03-18

申请号：US12880735

申请日：2010-09-13

申请人： Zhihong Zhang ,  XuJiang Huang

发明人： Zhihong Zhang ,  XuJiang Huang

IPC分类号： H05K7/20

CPC分类号： H02P6/08 ,  H02P6/16 ,  H03K4/06

摘要： The present invention relates to a system and method controlling motor rotation speed and provides a cooling system and method configured to control a temperature associated with an integrated circuit. The cooling system includes a brushless motor, a temperature monitoring input, a clock input, and a motor controller. The motor controller is configured to control the rotational speed of the motor using at least a speed control method by comparing the environmental temperature signal to a predetermined threshold: if the environmental temperature signal is less than the predetermined threshold T1 or higher than T2, controlling the rotational speed of the motor uses the speed control method and only one of the environmental temperature signal and the clock signal; and if the environmental temperature signal is greater than the predetermined threshold T1 and less than T2, controlling the rotational speed of the motor uses the speed control method and both of the environmental temperature signal and the clock signal.

摘要翻译： 本发明涉及一种控制电机转速的系统和方法，并提供一种配置成控制与集成电路相关的温度的冷却系统和方法。 冷却系统包括无刷电机，温度监控输入，时钟输入和电机控制器。 电动机控制器被配置为通过将环境温度信号与预定阈值相比较来使用至少一种速度控制方法来控制电动机的转速：如果环境温度信号小于预定阈值T1或高于T2，则控制 电机的转速采用速度控制方式，只有环境温度信号和时钟信号之一; 并且如果环境温度信号大于预定阈值T1且小于T2，则控制电动机的转速使用速度控制方法以及环境温度信号和时钟信号两者。