公开(公告)号：US20070102770A1

公开(公告)日：2007-05-10

申请号：US11619451

申请日：2007-01-03

申请人： Woo-Geun Lee ,  Beom-Seok Cho ,  Je-Hun Lee ,  Chang-Oh Jeong ,  Sang-Gab Kim ,  Min-Seok Oh ,  Young-Wook Lee ,  Hee-Hwan Choe

发明人： Woo-Geun Lee ,  Beom-Seok Cho ,  Je-Hun Lee ,  Chang-Oh Jeong ,  Sang-Gab Kim ,  Min-Seok Oh ,  Young-Wook Lee ,  Hee-Hwan Choe

IPC分类号： H01L29/76

CPC分类号： H01L27/1288 ,  G02F2001/136236 ,  H01L21/31144 ,  H01L21/32139 ,  H01L27/1214 ,  H01L27/124 ,  H01L29/41733

摘要： A method of manufacturing a thin film transistor array panel including forming a gate line on a substrate, forming a gate insulating layer on the gate line, forming a semiconductor layer on the gate insulating layer, forming a data line and a drain electrode on the semiconductor layer, depositing a passivation layer on the data line and the drain electrode, forming a photoresist including a first portion and a second portion, which is thinner than the first portion, on the passivation layer, etching the passivation layer using the photoresist as a mask to expose a portion of the drain electrode, removing the second portion of the photoresist, depositing a conductive film, and removing the first portion of the photoresist to form a pixel electrode on the exposed portion of the drain electrode.

摘要翻译： 一种制造薄膜晶体管阵列面板的方法，包括在衬底上形成栅极线，在栅极线上形成栅极绝缘层，在栅极绝缘层上形成半导体层，在半导体上形成数据线和漏电极 在所述数据线和所述漏电极上沉积钝化层，在所述钝化层上形成包含比所述第一部分薄的第一部分和第二部分的光致抗蚀剂，使用所述光致抗蚀剂作为掩模蚀刻所述钝化层 露出漏极的一部分，去除光致抗蚀剂的第二部分，沉积导电膜，以及去除光致抗蚀剂的第一部分，以在漏电极的暴露部分上形成像素电极。

公开(公告)号：US20060048530A1

公开(公告)日：2006-03-09

申请号：US10538077

申请日：2003-10-02

申请人： Young-Hoan Jun ,  Dong-Hee Shin ,  Gyoo-Jong Bae ,  Woo-Geun Lee

发明人： Young-Hoan Jun ,  Dong-Hee Shin ,  Gyoo-Jong Bae ,  Woo-Geun Lee

IPC分类号： F25B49/00 ,  F25B1/00

CPC分类号： F04B35/045 ,  F04B2203/0401 ,  F04B2203/0402

摘要： In an operation control apparatus and a method thereof, the compressor can be protected from overloading through a current control device instead of an OLP (Over Load Protector) and a PTC thermistor (Positive Temperature Coefficient thermistor). The operation control apparatus includes: a stroke estimated unit for estimating a stroke of the compressor on the basis of a current and a voltage applied to an interior motor of the compressor and a motor constant of the interior motor; a control unit for generating a control signal for varying a stroke of the compressor on the basis of the estimated stroke value and a preset stroke reference value; and a current control means being turned on/off so as to vary a stroke voltage applied to the interior motor of the compressor.

摘要翻译： 在操作控制装置及其方法中，可以通过电流控制装置代替OLP（过载保护器）和PTC热敏电阻（正温度系数热敏电阻）来保护压缩机免于过载。 操作控制装置包括：行程估计单元，用于基于施加到压缩机的内部电动机的电流和电压以及内部电动机的电动机常数来估计压缩机的行程; 控制单元，用于基于估计的行程值和预设行程参考值产生用于改变压缩机行程的控制信号; 并且电流控制装置被开/关以改变施加到压缩机的内部马达的行程电压。

公开(公告)号：US20050221546A1

公开(公告)日：2005-10-06

申请号：US11082967

申请日：2005-03-18

申请人： Woo-Geun Lee ,  Beom-Seok Cho ,  Je-Hun Lee ,  Chang-Oh Jeong ,  Sang-Gab Kim ,  Min-Seok Oh ,  Young-Wook Lee ,  Hee-Hwan Choe

发明人： Woo-Geun Lee ,  Beom-Seok Cho ,  Je-Hun Lee ,  Chang-Oh Jeong ,  Sang-Gab Kim ,  Min-Seok Oh ,  Young-Wook Lee ,  Hee-Hwan Choe

IPC分类号： G02F1/1368 ,  G09F9/30 ,  G09G3/36 ,  G09G3/38 ,  H01L21/00 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L29/786

CPC分类号： H01L27/1288 ,  G02F2001/136236 ,  H01L21/31144 ,  H01L21/32139 ,  H01L27/1214 ,  H01L27/124 ,  H01L29/41733

摘要： A method of manufacturing a thin film transistor array panel including forming a gate line on a substrate, forming a gate insulating layer on the gate line, forming a semiconductor layer on the gate insulating layer, forming a data line and a drain electrode on the semiconductor layer, depositing a passivation layer on the data line and the drain electrode, forming a photoresist including a first portion and a second portion, which is thinner than the first portion, on the passivation layer, etching the passivation layer using the photoresist as a mask to expose a portion of the drain electrode, removing the second portion of the photoresist, depositing a conductive film, and removing the first portion of the photoresist to form a pixel electrode on the exposed portion of the drain electrode.

摘要翻译： 一种制造薄膜晶体管阵列面板的方法，包括在衬底上形成栅极线，在栅极线上形成栅极绝缘层，在栅极绝缘层上形成半导体层，在半导体上形成数据线和漏电极 在所述数据线和所述漏电极上沉积钝化层，在所述钝化层上形成包含比所述第一部分薄的第一部分和第二部分的光致抗蚀剂，使用所述光致抗蚀剂作为掩模蚀刻所述钝化层 露出漏极的一部分，去除光致抗蚀剂的第二部分，沉积导电膜，以及去除光致抗蚀剂的第一部分，以在漏电极的暴露部分上形成像素电极。

公开(公告)号：US09184090B2

公开(公告)日：2015-11-10

申请号：US13151102

申请日：2011-06-01

申请人： Seung-Ha Choi ,  Kyoung-Jae Chung ,  Woo-Geun Lee

发明人： Seung-Ha Choi ,  Kyoung-Jae Chung ,  Woo-Geun Lee

IPC分类号： H01L21/00 ,  H01L21/768 ,  G02F1/1333 ,  G02F1/1362 ,  H01L27/12 ,  H01L29/49 ,  H01L29/786 ,  H01L29/66

CPC分类号： H01L21/76804 ,  G02F1/133345 ,  G02F1/136227 ,  G02F1/136286 ,  H01L21/76816 ,  H01L27/1225 ,  H01L27/1244 ,  H01L27/1248 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869

摘要： A TFT display panel having a high charge mobility and making it possible to obtain uniform electric characteristics with respect to a large-area display is provided as well as a manufacturing method thereof. A TFT display panel includes a gate electrode formed on an insulation substrate, a first gate insulting layer formed of SiNx on the gate electrode, a second gate insulting layer formed of SiOx on the first gate insulting layer, an oxide semiconductor layer formed to overlap the gate electrode and having a channel part, and a passivation layer formed of SiOx on the oxide semiconductor layer and the gate electrode, and the passivation layer includes a contact hole exposing the drain electrode. The contact hole has a shape in which the passivation layer of a portion directly exposed together with a metal occupies an area smaller than the upper passivation layer.

摘要翻译： 提供具有高电荷迁移率并且可以获得相对于大面积显示器的均匀电特性的TFT显示面板及其制造方法。 TFT显示面板包括形成在绝缘基板上的栅极电极，栅极上由SiNx形成的第一栅极绝缘层，在第一栅极绝缘层上由SiOx形成的第二栅极绝缘层，形成为与栅极电极重叠的氧化物半导体层 栅电极，并具有通道部分，以及由氧化物半导体层和栅电极上的SiO x形成的钝化层，钝化层包括暴露漏电极的接触孔。 接触孔具有直接与金属一起暴露的部分的钝化层占据比上钝化层小的形状。

公开(公告)号：US08476627B2

公开(公告)日：2013-07-02

申请号：US13046130

申请日：2011-03-11

申请人： Pil-Sang Yun ,  Young-Wook Lee ,  Woo-Geun Lee

发明人： Pil-Sang Yun ,  Young-Wook Lee ,  Woo-Geun Lee

IPC分类号： H01L29/786

CPC分类号： H01L21/467 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/41733 ,  H01L29/7869

摘要： Provided is an oxide thin-film transistor (TFT) substrate that may enhance the display quality of a display device and a method of fabricating the same via a simple process. The oxide TFT substrate includes: a substrate, a gate line, a data line, an oxide TFT, and a pixel electrode. An oxide layer of the oxide TFT includes a first region that has semiconductor characteristics and a channel, and a second region that is conductive and surrounds the first region. A portion of the first region is electrically connected to the pixel electrode, and the second region is electrically connected to the data line.

摘要翻译： 提供了可以通过简单的处理来提高显示装置的显示质量的氧化物薄膜晶体管（TFT）基板及其制造方法。 氧化物TFT基板包括：基板，栅极线，数据线，氧化物TFT和像素电极。 氧化物TFT的氧化物层包括具有半导体特性的第一区域和沟道，以及导电并围绕第一区域的第二区域。 第一区域的一部分电连接到像素电极，并且第二区域电连接到数据线。

公开(公告)号：US08450736B2

公开(公告)日：2013-05-28

申请号：US13006591

申请日：2011-01-14

申请人： Young-Wook Lee ,  Woo-Geun Lee ,  Ki-Won Kim ,  Hyun-Jung Lee ,  Ji-Soo Oh

发明人： Young-Wook Lee ,  Woo-Geun Lee ,  Ki-Won Kim ,  Hyun-Jung Lee ,  Ji-Soo Oh

IPC分类号： H01L29/786

CPC分类号： H01L27/124 ,  H01L21/76834 ,  H01L27/1225 ,  H01L27/1255 ,  H01L27/1262 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/7869 ,  H01L29/78693

摘要： A thin film transistor (TFT) array substrate and a manufacturing method thereof are provided. The TFT array substrate may include a gate line disposed on a substrate and including a gate line and a gate electrode, an oxide semiconductor layer pattern disposed on the gate electrode, a data line disposed on the oxide semiconductor layer pattern and including a source electrode and a drain electrode of a thin film transistor (TFT) together with the gate electrode, and a data line extending in a direction intersecting the gate line, and etch stop patterns disposed at an area where the TFT is formed between the source/drain electrodes and the oxide semiconductor layer pattern and at an area where the gate line and the data line overlap each other between the gate line and the data line.

公开(公告)号：US08445301B2

公开(公告)日：2013-05-21

申请号：US13027453

申请日：2011-02-15

申请人： Kap-Soo Yoon ,  Woo-Geun Lee ,  Bong-Kyun Kim ,  Sung-Hoon Yang ,  Ki-Won Kim ,  Hyun-Jung Lee

发明人： Kap-Soo Yoon ,  Woo-Geun Lee ,  Bong-Kyun Kim ,  Sung-Hoon Yang ,  Ki-Won Kim ,  Hyun-Jung Lee

IPC分类号： H01L21/00

CPC分类号： H01L29/78693 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/1288 ,  H01L27/3248 ,  H01L27/3262 ,  H01L51/5203

摘要： Provided are a thin-film transistor (TFT) substrate, a method of manufacturing the same, and a display device including the same. The TFT substrate includes a gate electrode formed on a substrate, a gate insulating layer formed on the gate electrode, an oxide semiconductor pattern formed on the gate insulating layer, a source electrode formed on the oxide semiconductor pattern, a drain electrode formed on the oxide semiconductor pattern to face the source electrode, and a pixel electrode formed on the gate insulating layer.

摘要翻译： 提供了一种薄膜晶体管（TFT）基板，其制造方法和包括该薄膜晶体管的显示装置。 TFT基板包括形成在基板上的栅电极，形成在栅电极上的栅极绝缘层，形成在栅极绝缘层上的氧化物半导体图案，形成在氧化物半导体图案上的源电极，形成在氧化物上的漏电极 面对源电极的半导体图案，以及形成在栅极绝缘层上的像素电极。

公开(公告)号：US08203662B2

公开(公告)日：2012-06-19

申请号：US12571345

申请日：2009-09-30

申请人： Hoon Kang ,  Yun-Seok Lee ,  Jae-Sung Kim ,  Yang-Ho Jung ,  Young-Je Cho ,  Cheon-Jae Maeng ,  Woo-Geun Lee

发明人： Hoon Kang ,  Yun-Seok Lee ,  Jae-Sung Kim ,  Yang-Ho Jung ,  Young-Je Cho ,  Cheon-Jae Maeng ,  Woo-Geun Lee

IPC分类号： G02F1/136 ,  H01L29/04 ,  H01L29/10 ,  H01L31/00 ,  H01L27/14 ,  H01L29/15 ,  H01L31/036

CPC分类号： H01L29/78642 ,  H01L27/12 ,  H01L29/42384

摘要： Provided is a thin-film transistor (TFT) substrate. The TFT substrate includes: an insulating substrate; a semiconductor pattern which is formed on the insulating substrate, the semiconductor pattern having a top surface and a bottom surface; a source electrode and a drain electrode which are disposed on the top and bottom surfaces of the semiconductor pattern, respectively; a gate electrode which is disposed alongside the semiconductor pattern with a gate insulating film interposed therebetween; a data line which is connected to the source electrode and extends in a first direction; a gate line which is connected to the gate electrode and extends in a second direction; and a pixel electrode which is connected to the drain electrode and is formed in a pixel region.

摘要翻译： 提供了薄膜晶体管（TFT）基板。 TFT基板包括：绝缘基板; 形成在所述绝缘基板上的半导体图案，所述半导体图案具有顶面和底面; 源电极和漏电极，分别设置在半导体图案的顶表面和底表面上; 栅极电极，其间设置有栅极绝缘膜并且位于半导体图案的旁边; 数据线，其连接到所述源电极并沿第一方向延伸; 栅极线，其连接到所述栅电极并沿第二方向延伸; 以及连接到漏电极并形成在像素区域中的像素电极。

公开(公告)号：US20120113346A1

公开(公告)日：2012-05-10

申请号：US13277114

申请日：2011-10-19

申请人： Seung-Ha CHOI ,  Kyoung-Jae Chung ,  Woo-Geun Lee

发明人： Seung-Ha CHOI ,  Kyoung-Jae Chung ,  Woo-Geun Lee

IPC分类号： G02F1/136 ,  H01L33/08

CPC分类号： H01L21/3086 ,  G02F1/136227 ,  H01L27/1225 ,  H01L27/1288 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/7869

摘要： Provided are a display substrate, a display device, and a method of manufacturing the display substrate. The display substrate includes: a substrate in which a pixel region is defined; a gate electrode and a gate pad are formed on the substrate; a gate insulating layer formed on the gate electrode and the gate pad; a buffer layer pattern overlaps the gate electrode and is formed on the gate insulating layer; an insulating film pattern formed on the buffer layer pattern; an oxide semiconductor pattern formed on the insulating film pattern; a source electrode formed on the oxide semiconductor pattern; and a drain electrode formed on the oxide semiconductor pattern and is separated from the source electrode.

摘要翻译： 提供了显示基板，显示装置和制造显示基板的方法。 显示基板包括：限定像素区域的基板; 在基板上形成栅电极和栅极焊盘; 形成在栅极电极和栅极焊盘上的栅极绝缘层; 缓冲层图案与栅电极重叠并形成在栅极绝缘层上; 形成在缓冲层图案上的绝缘膜图案; 形成在所述绝缘膜图案上的氧化物半导体图案; 形成在所述氧化物半导体图案上的源电极; 以及形成在氧化物半导体图案上并与源电极分离的漏电极。

公开(公告)号：US08173493B2

公开(公告)日：2012-05-08

申请号：US12765698

申请日：2010-04-22

申请人： Sang-Gab Kim ,  Woo-Geun Lee ,  Shi-Yul Kim ,  Jin-Ho Ju ,  Jang-Soo Kim ,  Sang-Woo Whangbo ,  Min-Seok Oh ,  Hye-Young Ryu ,  Hong-Kee Chin

发明人： Sang-Gab Kim ,  Woo-Geun Lee ,  Shi-Yul Kim ,  Jin-Ho Ju ,  Jang-Soo Kim ,  Sang-Woo Whangbo ,  Min-Seok Oh ,  Hye-Young Ryu ,  Hong-Kee Chin

IPC分类号： H01L21/00 ,  H01L21/84

CPC分类号： H01L27/124 ,  G02F2001/13629 ,  H01L29/458

摘要： The present invention provides a manufacturing method of a thin film transistor array panel, which includes forming a gate line on a substrate; forming a gate insulating layer, a semiconductor layer, and an ohmic contact on the gate line; forming a first conducting film including Mo, a second conducting film including Al, and a third conducting film including Mo on the ohmic contact; forming a first photoresist pattern on the third conducting film; etching the first, second, and third conducting films, the ohmic contact, and the semiconductor layer using the first photoresist pattern as a mask; removing the first photoresist pattern by a predetermined thickness to form a second photoresist pattern; etching the first, second, and third conducting films using the second photoresist pattern as a mask to expose a portion of the ohmic contact; and etching the exposed ohmic contact using a Cl-containing gas and a F-containing gas.

摘要翻译： 本发明提供一种薄膜晶体管阵列面板的制造方法，其包括在基板上形成栅极线; 在栅极线上形成栅极绝缘层，半导体层和欧姆接触; 形成包括Mo的第一导电膜，包括Al的第二导电膜和在欧姆接触上包含Mo的第三导电膜; 在所述第三导电膜上形成第一光致抗蚀剂图案; 使用第一光致抗蚀剂图案作为掩模蚀刻第一，第二和第三导电膜，欧姆接触和半导体层; 将第一光致抗蚀剂图案去除预定厚度以形成第二光致抗蚀剂图案; 使用第二光致抗蚀剂图案作为掩模蚀刻第一，第二和第三导电膜以暴露欧姆接触的一部分; 并使用含Cl气体和含F气体蚀刻暴露的欧姆接触。