PHOTOELECTRIC SENSING DEVICE FOR CANCELLATE CROSSTALK

    公开(公告)号:US20240333264A1

    公开(公告)日:2024-10-03

    申请号:US18507118

    申请日:2023-11-13

    CPC classification number: H03K3/013 H03K3/02337 H03K19/018514

    Abstract: A photoelectric sensing device for cancelling crosstalk includes a first capacitor; a first switch, coupled between a current source and the first capacitor, is turned on according to a driving signal, and enables the current source to charge the first capacitor to generate a first capacitor voltage; a second switch, coupled between the first capacitor and an input terminal, is turned on according to a cancellation signal; a current-voltage conversion circuit, coupled to the second switch, receiving an input current corresponding to a crosstalk signal, and generating a crosstalk voltage corresponding to the input current. Wherein, when the second switch is turned on, the crosstalk voltage is subtracted from the first capacitor voltage to cancellate the crosstalk signal, so as to output a correct sensing voltage.

    Capacitance measurement circuit
    32.
    发明授权

    公开(公告)号:US12092672B2

    公开(公告)日:2024-09-17

    申请号:US17964847

    申请日:2022-10-12

    Inventor: Yi-Chou Huang

    Abstract: A capacitance measure circuit includes a charge to voltage converter (CVC), and the CVC includes an excitation signal generation circuit that is arranged to generate and connect an excitation signal to a first terminal of a capacitance sensor, a differential amplifier, a first switch circuit, and at least one first variable capacitor. The inverting input terminal of the differential amplifier is arranged to receive a sensing capacitance value from a second terminal of the capacitance sensor. The first switch circuit is coupled between the inverting input terminal and the non-inverting output terminal of the differential amplifier, and is connected in parallel with the at least one first variable capacitor at the inverting input terminal and the non-inverting output terminal of the differential amplifier.

    Audio amplifier with duty ratio control

    公开(公告)号:US12088267B2

    公开(公告)日:2024-09-10

    申请号:US17585606

    申请日:2022-01-27

    CPC classification number: H03G3/3015 H02M3/1582 H03F3/2178 H03F2200/351

    Abstract: An audio amplifier with duty ratio control is provided. The audio amplifier comprises a pulse width modulation modulator, a power stage, and a voltage converter. The pulse width modulation modulator is configured to receive an input signal for generating a pulse width modulation signal. The power stage is configured to output an output signal according to a supply voltage and the pulse width modulation signal. The voltage converter is configured to adjust voltage level of the supply voltage according to the pulse width modulation signal. The audio amplifier is configured to adjust the voltage level of the supply voltage when duty ratio of the pulse width modulation signal is greater than a duty ratio threshold.

    Input clock buffer and clock signal buffereing method

    公开(公告)号:US11942950B2

    公开(公告)日:2024-03-26

    申请号:US17847225

    申请日:2022-06-23

    Inventor: Shu-Han Nien

    CPC classification number: H03K5/135 H03K5/2418 H03K5/2427 H03K2005/00176

    Abstract: An input clock buffer, comprising: a first capacitor; a second capacitor; a first amplifier, configured to generate a first output signal, comprising input terminals coupled to the first capacitor and the second capacitor, wherein the first capacitor and the second capacitor receives a differential input signal; a second amplifier, configured to generate a second output signal according to the differential input signal; a frequency detection circuit, configured to generate a frequency detection signal according to a frequency of the differential input signal; and a switch, located between an output of the first amplifier and an output of the second amplifier, configured to turn on and turn off according to the frequency detection signal.

    Semiconductor device with contact check circuitry

    公开(公告)号:US11892521B2

    公开(公告)日:2024-02-06

    申请号:US17406121

    申请日:2021-08-19

    Inventor: Tse-Hua Yao

    CPC classification number: G01R31/68 G01R1/06794 H01L23/5256

    Abstract: A semiconductor device with contact check circuitry is provided. The semiconductor device includes a plurality of pads, an internal circuit, and a contact check circuit. The plurality of pads includes a first pad and a second pad. The internal circuit is coupled to the plurality of pads. The contact check circuit, at least coupled to the first pad and the second pad, is used for checking, when the semiconductor device is under test, contact connections to the first pad and the second pad to generate a check result signal according to comparison of a first test signal and a second test signal received from the first pad and the second pad with at least one reference signal.

    CONTROL CIRCUIT WITH AUTOMATIC FREQUENCY MODULATION FOR DC-DC CONVERTER

    公开(公告)号:US20240030799A1

    公开(公告)日:2024-01-25

    申请号:US17872024

    申请日:2022-07-25

    Inventor: YAO-WEI YANG

    CPC classification number: H02M1/0009 H02M3/156

    Abstract: A control circuit for controlling a DC-DC converter is provided. The control circuit comprises a first sensor, second sensor, error amplifier, signal conditioning circuit, first comparison circuit, second comparison circuit, and driver circuit. The error amplifier is configured to receive a feedback voltage and a reference voltage for generating a first voltage. The signal conditioning circuit is configured to receive the first voltage for generating a second voltage and a third voltage. The first comparison circuit is configured to make a comparison based on a first sensing signal from the first sensor and the second voltage for generating a first comparison signal. The second comparison circuit is configured to make a comparison based on a second sensing signal from the second sensor and the third voltage for generating a second comparison signal. The driver circuit is for driving a power stage according to the first and second comparison signals.

    Method for equalizing input signal to generate equalizer output signal and associated parametric equalizer

    公开(公告)号:US11601753B2

    公开(公告)日:2023-03-07

    申请号:US17344907

    申请日:2021-06-10

    Abstract: A parametric equalizer includes an equalizer circuit, a first protection circuit, a second protection circuit, and a first addition circuit. The equalizer circuit is arranged to receive an input signal, and process the input signal to generate an output signal. The first protection circuit is arranged to generate a first protection signal according to the output signal, the input signal, and a first processed signal. The second protection circuit is arranged to generate a second protection signal according to the input signal and a second processed signal. The first addition circuit is coupled to the first protection circuit and the second protection circuit, and is arranged to combine the first protection signal and the second protection signal to generate an equalizer output signal.

    Circuit and method for switching between ternary modulation and quaternary modulation

    公开(公告)号:US11489499B1

    公开(公告)日:2022-11-01

    申请号:US17396853

    申请日:2021-08-09

    Abstract: A switch circuit provides a first output signal and a second output signal for switching between ternary modulation and quaternary modulation for a target device. A first output signal is provided from one of a first signal, a second signal and a ground signal according to an input signal and a duty signal, wherein the first signal is generated through performing a one-bit left-shift operation for the input signal, and the second signal is generated through adding the input signal and the duty signal. A second output signal is provided from one of a third signal, a fourth signal and the ground signal according to the input signal and the duty signal, wherein the third signal is generated through subtracting the input signal from the duty signal, and the fourth signal is generated through performing a two's-complement transformation and the one-bit left-shift operation for the input signal.

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