公开(公告)号：US06525609B1

公开(公告)日：2003-02-25

申请号：US09547968

申请日：2000-04-12

Applicant: Arya R. Behzad

Inventor： Arya R. Behzad

IPC: H03F345

CPC classification number: H03F1/3211 ,  H01F17/0006 ,  H01F17/0013 ,  H01F2017/0026 ,  H01F2017/0053 ,  H01F2021/125 ,  H01L23/5227 ,  H01L27/0248 ,  H01L27/08 ,  H01L2924/0002 ,  H01L2924/3011 ,  H03B5/364 ,  H03B2201/025 ,  H03B2201/0266 ,  H03D7/161 ,  H03D7/18 ,  H03G1/0029 ,  H03H11/1291 ,  H03J1/0075 ,  H03J3/04 ,  H03J3/08 ,  H03J3/185 ,  H03J2200/10 ,  H03L1/023 ,  H03L7/10 ,  H03L7/23 ,  H01L2924/00

Abstract: An integrated receiver with channel selection and image rejection is substantially implemented on a single CMOS integrated circuit. A receiver front end provides programable attenuation and a programable gain low noise amplifier. LC filters integrated onto the substrate in conjunction with image reject mixers provide image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. Active filters utilize multi track spiral inductors with shields to increase circuit Q. Frequency planning provides additional image rejection. Local oscillator signal generation methods on chip reduce distortion. A PLL generates needed out of band LO signals. Direct synthesis generates in band LO signals. PLL VCOs are centered automatically. A differential crystal oscillator provides a frequency reference. Differential signal transmission throughout the receiver is used. ESD protection is provided by a pad ring and ESD clamping structure. Shunts utilize a gate boosting at each pin to discharge ESD build up. An IF VGA utilizes distortion cancellation achieved with cross coupled differential pair amplifiers having their Vds dynamically modified in conjunction with current steering of the differential pairs sources.

Abstract translation: 具有通道选择和图像抑制的集成接收器基本上在单个CMOS集成电路上实现。 接收机前端提供可编程衰减和可编程增益低噪声放大器。 与图像抑制混合器一起集成到衬底上的LC滤波器提供图像频率抑制。 过滤器调谐和电感Q补偿温度在芯片上执行。 有源滤波器利用具有屏蔽的多轨螺旋电感器来增加电路Q.频率规划提供额外的图像抑制。 本地振荡器信号产生方法在芯片上减少失真。 PLL产生所需的带外LO信号。 直接合成产生带内LO信号。 PLL VCO自动居中。 差分晶体振荡器提供频率参考。 使用整个接收机的差分信号传输。 ESD保护由衬垫环和ESD夹紧结构提供。 分流器利用每个引脚上的门极升压来放电ESD积聚。 IF VGA利用交叉耦合差分对放大器实现的失真消除，其具有与差分对源的电流转向结合动态修改的Vds。

公开(公告)号：US20020168038A1

公开(公告)日：2002-11-14

申请号：US09823316

申请日：2001-03-30

Inventor： Morten Damgaard ,  William J. Domino ,  Rahul Magoon ,  Alyosha C. Molnar ,  Jeff Zachan

IPC: H04L027/06 ,  H03D003/24

CPC classification number: H03L7/099 ,  H03B2201/025 ,  H03B2201/0291 ,  H03J2200/10 ,  H03L5/00 ,  H03L7/087 ,  H03L7/113

Abstract: Systems for controlling the frequency of the output signal of a controllable oscillator in a frequency synthesizer are provided. One such system comprises a controllable oscillator and a frequency control circuit. The controllable oscillator is configured to generate an output signal that has a predefined frequency. The controllable oscillator is also configured with a plurality of operational states that are controlled by the frequency control circuit. Each operational state of the controllable oscillator defines a distinct frequency for the output signal of the controllable oscillator. The frequency control circuit receives the output signal of the controllable oscillator and determines the distinct frequency for the output signal that best approximates the predefined frequency. The frequency control circuit may also provide a control signal to the controllable oscillator that is configured to change the controllable oscillator to the operational state corresponding to the distinct frequency that best approximates the predefined frequency.

Abstract translation: 提供了用于控制频率合成器中可控振荡器的输出信号的频率的系统。 一种这样的系统包括可控振荡器和频率控制电路。 可控振荡器被配置为产生具有预定频率的输出信号。 可控振荡器还配置有由频率控制电路控制的多个操作状态。 可控振荡器的每个操作状态为可控振荡器的输出信号定义了不同的频率。 频率控制电路接收可控振荡器的输出信号，并确定最接近预定频率的输出信号的不同频率。 频率控制电路还可以向可控振荡器提供控制信号，该控制信号被配置为将可控振荡器改变为对应于最接近预定频率的不同频率的操作状态。

公开(公告)号：US20020135428A1

公开(公告)日：2002-09-26

申请号：US09811611

申请日：2001-03-20

Applicant: Broadcom Corporation

Inventor： Ramon A. Gomez

IPC: H03L007/093 ,  H03L007/099

CPC classification number: H03L7/00 ,  H03B5/1212 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/1243 ,  H03B5/1253 ,  H03B5/1265 ,  H03B5/1278 ,  H03B2200/0046 ,  H03B2200/0048 ,  H03B2200/005 ,  H03B2201/02 ,  H03B2201/0208 ,  H03B2201/025 ,  H03D7/165 ,  H03D7/18 ,  H03J5/244 ,  H03J2200/10 ,  H03L7/0898 ,  H03L7/093 ,  H03L7/099 ,  H03L7/10 ,  H03L7/107 ,  H03L7/1072 ,  H03L7/18

Abstract: A gain compensator compensates for the gain variation of a varactor-tuned voltage tuned oscillator (VCO) in a phase lock loop (PLL). The VCO includes a parallel LC circuit having multiple fixed capacitors that can be switched-in or switched-out of the LC circuit according to a capacitor control signal to perform band-select tuning of the VCO. The gain compensator compensates for the variable VCO gain by generating a charge pump reference current that is based on the same capacitor control signal that controls the fixed capacitors in the LC circuit. The gain compensator generates the charge pump reference current by replicating a reference scale current using unit current sources. The number of times the reference scale current is replicated is based on the fixed capacitance that is switched-in to the LC circuit and therefore the frequency band of the PLL. The reference scale current is generated based on a PLL control that specifics certain PLL characteristics such as reference frequency, loop bandwidth, and loop damping. Therefore, the reference pump current can be efficiently optimized for changing PLL operating conditions, in addition to compensating for variable VCO gain.

Abstract translation: 增益补偿器补偿锁相环（PLL）中变容二极管调谐电压调谐振荡器（VCO）的增益变化。 VCO包括具有多个固定电容器的并联LC电路，其可以根据电容器控制信号切换或切换出LC电路，以执行VCO的频带选择调谐。 增益补偿器通过产生基于控制LC电路中的固定电容器的相同电容器控制信号的电荷泵参考电流来补偿可变VCO增益。 增益补偿器通过使用单位电流源复制参考刻度电流来产生电荷泵参考电流。 参考比例电流复制的次数是基于切换到LC电路的固定电容，因此是PLL的频带。 参考比例电流是基于特定于参考频率，环路带宽和环路阻尼等特定PLL特性的PLL控制产生的。 因此，除了补偿可变VCO增益之外，参考泵电流可以有效地优化用于改变PLL工作条件。

公开(公告)号：US06441671B1

公开(公告)日：2002-08-27

申请号：US09542531

申请日：2000-04-04

Applicant: Ali Rastegar

Inventor： Ali Rastegar

IPC: H03F130

CPC classification number: H03B5/08 ,  H03B5/02 ,  H03B2201/0208 ,  H03B2201/025 ,  H03B2201/0266 ,  H03F3/191 ,  H03J1/0008 ,  H03J2200/10 ,  H03M1/804

Abstract: A programming method (250) for digitally programming the adjustment of an electronic trim capacitor (212, 314, 414). In an initial step (252), programming is initiated by setting an enable terminal (224). In subsequent steps (254, 256) a pulse signal (226) then applied to a program terminal (222) and the number of pulses (228) provided to the programming terminal (222) while the enable terminal (224) is set determines the total number of capacitance increments for which the electronic trim capacitor (212, 314, 414) is programmed. The electronic trim capacitor (212, 314, 414) may be incorporated into an integrated circuit (12, 312) or a module (412) and the electronic trim capacitor (212, 314, 414) may be programmed and used “in situ” in a more general circuit (1) such as an oscillator (301) or an amplifier (401).

Abstract translation: 一种用于数字编程电子微调电容器（212,314,414）的调整的编程方法（250）。 在初始步骤（252）中，通过设置使能终端（224）来启动编程。 在随后的步骤（254,256）中，随后施加到程序终端（222）的脉冲信号（226），并且在使能终端（224）被置位时提供给编程终端（222）的脉冲数（228）决定了 电子微调电容器（212,314,414）被编程的电容增量的总数。 电子微调电容器（212,314,414）可以被并入到集成电路（12,312）或模块（412）中，并且电子微调电容器（212,314,414）可以被“编程和原位”使用， 在诸如振荡器（301）或放大器（401）的更通用的电路（1）中。

公开(公告)号：US06426680B1

公开(公告)日：2002-07-30

申请号：US09580014

申请日：2000-05-26

Applicant: Ralph Duncan ,  Tom W. Kwan

Inventor： Ralph Duncan ,  Tom W. Kwan

IPC: H03L7099

CPC classification number: H03L7/23 ,  H01F17/0006 ,  H01F17/0013 ,  H01F2017/0053 ,  H01F2021/125 ,  H01L23/5227 ,  H01L27/0248 ,  H01L27/08 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H03B5/1209 ,  H03B5/1212 ,  H03B5/1228 ,  H03B5/1253 ,  H03B5/364 ,  H03B2200/0038 ,  H03B2201/025 ,  H03B2201/0266 ,  H03D7/161 ,  H03D7/18 ,  H03G1/0029 ,  H03H11/1291 ,  H03J1/0075 ,  H03J3/04 ,  H03J3/08 ,  H03J3/185 ,  H03J2200/10 ,  H03L1/023 ,  H03L7/10 ,  H01L2924/00

Abstract: An integrated VCO having an improved tuning range over process and temperature variations. There is therefore provided in a present embodiment of the invention an integrated VCO. The VCO comprises, a substrate, a VCO tuning control circuit responsive to a VCO state variable that is disposed upon the substrate, and a VCO disposed upon the substrate, having a tuning control voltage input falling within a VCO tuning range for adjusting a VCO frequency output, and having its tuning range adjusted by the tuning control circuit in response to the VCO state variable.

Abstract translation: 具有改进的调谐范围超过过程和温度变化的集成VCO。 因此，在本发明的本实施例中提供了集成VCO。 VCO包括：衬底，响应于设置在衬底上的VCO状态变量的VCO调谐控制电路，以及设置在衬底上的VCO，具有落在VCO调谐范围内的调谐控制电压输入，用于调节VCO频率 输出，并且其调谐范围由调谐控制电路响应于VCO状态变量而调整。

公开(公告)号：US06304152B1

公开(公告)日：2001-10-16

申请号：US09628356

申请日：2000-07-28

Applicant: Yutaka Takahashi ,  Kouji Nakamura

Inventor： Yutaka Takahashi ,  Kouji Nakamura

IPC: H03B536

CPC classification number: H03B5/364 ,  H03B2201/025 ,  H03J2200/10

Abstract: The Colpitts circuit is configured so that an equivalent capacitance of the voltage-dividing first and second capacitors connected in series through the output of the transistor amplifier is variable under the condition that the ratio of the capacitance of the first capacitor to that of the second capacitor is kept unchanged at a prescribed value. The first and second capacitors are, as a whole, configured as a matrix of elemental capacitors with 2 rows and a plural number n of columns, an array of the elemental capacitors in the first row being allotted to the first capacitor and an array of the elemental capacitors in the second row being allotted to the second capacitor. Two elemental capacitors in each column j (j=1, 2, . . . n) are connected in series and the ratio of the capacitance of the elemental capacitor corresponding to the 1j element of the matrix to the capacitance of the elemental capacitor corresponding to the 2j element has the prescribed value. The Colpitts circuit further has a first switch and a second switch allotted to each of the columns. Each of the elemental capacitors allocated to the first row is connected to the control electrode of the transistor amplifier through the first switch, and the junction of the two elemental capacitors allocated to each column is connected to the output of said transistor amplifier through the second switch. The first and second switches are operated synchronously for every column.

Abstract translation: Colpitts电路被配置为使得通过晶体管放大器的输出串联连接的分压第一和第二电容器的等效电容在第一电容器的电容与第二电容器的电容的比率 保持在规定值不变。 作为整体，第一和第二电容器被配置为具有2行和多个n列的元素电容器的矩阵，第一行中的元件电容器的阵列被分配给第一电容器，并且阵列的 第二排中的元素电容器被分配给第二电容器。 每列j（j = 1,2，...）中的两个元素电容器被串联连接，并且与矩阵的1j元素相对应的元件电容器的电容与对应于 2j元素具有规定值。 Colpitts电路还具有分配给每个列的第一开关和第二开关。 分配给第一行的每个元件电容器通过第一开关连接到晶体管放大器的控制电极，并且分配给每一列的两个元件电容器的结通过第二开关连接到所述晶体管放大器的输出端 。 第一和第二开关为每列同步运行。

公开(公告)号：US6058294A

公开(公告)日：2000-05-02

申请号：US47779

申请日：1998-03-24

Applicant: Frederick J. Bruwer ,  Willem Smit

Inventor： Frederick J. Bruwer ,  Willem Smit

IPC: H03B5/08 ,  H03B1/00 ,  H03B5/20 ,  H04B1/04 ,  H04B1/02 ,  H04R1/02

CPC classification number: H03B5/20 ,  H03B2201/02 ,  H03B2201/025 ,  H03B2201/0266 ,  H03J2200/10 ,  Y10T307/826

Abstract: A transmitter system having an adjustable monolithic frequency stabilization and tuning internal capacitor circuit. The transmitter system has a transmitter for generating and transmitting a transmitter oscillator frequency signal. A data generating chip is coupled to the transmitter. The data generating chip is used for adjusting and controlling the transmitter oscillator frequency signal. A variable capacitor circuit is located internal to the data generating chip and is coupled to a ground pin and one of a plurality of function pins on the data generating chip. The variable capacitor circuit is used for adjusting and setting the centerpoint of the transmitter oscillator frequency signal.

Abstract translation: 一种具有可调单片稳频和调谐内部电容电路的发射机系统。 发射机系统具有用于生成和发送发射机振荡器频率信号的发射机。 数据产生芯片耦合到发射机。 数据生成芯片用于调整和控制发射机振荡器频率信号。 可变电容器电路位于数据产生芯片的内部，并且耦合到数据生成芯片上的接地引脚和多个功能引脚中的一个。 可变电容电路用于调整和设置发射机振荡器频率信号的中心点。

公开(公告)号：US5994985A

公开(公告)日：1999-11-30

申请号：US985564

申请日：1997-12-05

Applicant: David R. Pehlke ,  Amit Burstein ,  Mau Chung F. Chang

Inventor： David R. Pehlke ,  Amit Burstein ,  Mau Chung F. Chang

IPC: H03B1/00 ,  H03J3/16 ,  H03J3/20

CPC classification number: H03J3/16 ,  H03B2201/0208 ,  H03B2201/0216 ,  H03B2201/025 ,  H03J2200/10

Abstract: A high-performance integrable tunable inductor includes a "primary" coil and a "drive" coil placed in close proximity to each other and simultaneously driven with primary and drive currents, respectively. The drive current induces mutual components of inductance in the primary coil which vary with the phase and amplitude relationship between the two currents. These relationships are controlled to precisely establish the impedance of the primary coil, allowing the inductor to be "tuned" to provide a desired inductance or resistance by simply varying the phase and amplitude relationships appropriately. Inductance values tunable over ranges of about 2:1 and Q values of nearly 2000 have been demonstrated. The primary coil can also be made to operate as a relatively large integrated capacitance by setting the phase and amplitude relationships appropriately. The tunable inductor can be fabricated with standard CMOS processes, or any of a number of other processing technologies, and thus integrated into a host of analog circuits for which a highly-integrated implementation is desirable.

Abstract translation: 高性能可积分可调电感器包括一个“初级”线圈和一个“驱动”线圈，它们分别靠近彼此并且同时由主电流和驱动电流驱动。 驱动电流导致初级线圈中的电感的相互分量随着两个电流之间的相位和幅度关系而变化。 控制这些关系以精确地建立初级线圈的阻抗，允许电感通过简单地相位和幅度关系改变来“调谐”以提供期望的电感或电阻。 已经证明了在大约2:1的范围内可调谐的电感值和接近2000的Q值。 通过适当地设定相位和幅度关系，初级线圈也可以作为相对较大的积分电容而工作。 可调谐电感器可以用标准CMOS工艺或许多其它处理技术中的任何一种制造，并因此被集成到需要高度集成的实现的模拟电路的主机中。

公开(公告)号：US5880921A

公开(公告)日：1999-03-09

申请号：US848116

申请日：1997-04-28

Applicant: J.L. Julian Tham ,  James L. Bartlett ,  Mau Chung F. Chang ,  Henry O. Marcy, 5th ,  Deepak Mehrotra ,  Kenneth D. Pedrotti ,  David R. Pehlke ,  Charles W. Seabury ,  Jun J. Yao

Inventor： J.L. Julian Tham ,  James L. Bartlett ,  Mau Chung F. Chang ,  Henry O. Marcy, 5th ,  Deepak Mehrotra ,  Kenneth D. Pedrotti ,  David R. Pehlke ,  Charles W. Seabury ,  Jun J. Yao

IPC: H01H59/00 ,  H03B1/00 ,  H01G23/00

CPC classification number: H01H59/0009 ,  H01G5/16 ,  H01H2001/0084 ,  H03B2201/0208 ,  H03B2201/0216 ,  H03B2201/025 ,  H03J2200/10

Abstract: A monolithically integrated switched capacitor bank using MEMS technology that is capable of handling GHz signal frequencies in both the RF and millimeter bands while maintaining precise digital selection of capacitor levels over a wide tuning range. Each MEMS switch includes a cantilever arm that is affixed to the substrate and extends over a ground line and a gapped signal line. An electrical contact is formed on the bottom of the cantilever arm positioned above and facing the gap in the signal line. A top electrode atop the cantilever arm forms a control capacitor structure above the ground line. A capacitor structure, preferably a MEMS capacitor suspended above the substrate at approximately the same height as the cantilever arm, is anchored to the substrate and connected in series with a MEMS switch. The MEMS switch is actuated by applying a voltage to the top electrode, which produces an electrostatic force that attracts the control capacitor structure toward the ground line, thereby causing the electrical contact to close the gap in the signal line and connect the MEMS capacitor structure between a pair of output terminals. The integrated MEMS switch-capacitor pairs have a large range between their on-state and off-state impedance, and thus exhibit superior isolation and insertion loss characteristics.

Abstract translation: 使用MEMS技术的单片集成开关电容器组，其能够处理RF和毫米波段中的GHz信号频率，同时在宽调谐范围内保持电容器电平的精确数字选择。 每个MEMS开关包括悬臂，其固定在基板上并在接地线和间隙信号线上延伸。 在位于信号线上方并面向信号线的间隙的悬臂的底部上形成电接触。 在悬臂上方的顶部电极在地线上方形成控制电容器结构。 电容器结构，优选地悬置在基板上方的悬臂上方与悬臂大致相同高度的MEMS电容器被锚定到基板并与MEMS开关串联连接。 通过向顶部电极施加电压来致动MEMS开关，该电压产生吸引控制电容器结构朝向接地线的静电力，从而使电接触闭合信号线中的间隙，并将MEMS电容器结构 一对输出端子。 集成的MEMS开关电容器对在其导通状态和截止状态阻抗之间具有较大的范围，因此表现出优异的隔离和插入损耗特性。

公开(公告)号：US5856763A

公开(公告)日：1999-01-05

申请号：US811997

申请日：1997-03-05

Applicant: Glen O. Reeser ,  Lunal Khuon

Inventor： Glen O. Reeser ,  Lunal Khuon

IPC: H03B1/00 ,  H03B5/12 ,  H03B5/20

CPC classification number: H03B5/1231 ,  H03B5/1218 ,  H03B5/1243 ,  H03B2201/0208 ,  H03B2201/025

Abstract: A voltage controlled oscillator (10) operable on two widely separated frequency bands of 800 MHz and 1.9 GHz, for example. The two operable frequency modes are controlled by changing base bias voltages on at least two transistors with commonly connected emitters. A base circuit of each transistor is connected to an independent resonator and tuning element and shares a common feedback reactance. By increasing a base bias voltage of first transistor relative the a second transistor, an associated first base circuit is turned on and allowed to oscillate at a first frequency while a second base circuit is turned off preventing oscillation at a second frequency. Correspondingly, by decreasing the base bias voltage the first base circuit is turned off and the second base circuit is turned on. The transistors share a common collector connection and output providing either one of the two frequencies.

Abstract translation: 例如，可操作于800MHz和1.9GHz的两个广泛分离的频带上的压控振荡器（10）。 通过在具有共同连接的发射器的至少两个晶体管上改变基极偏置电压来控制两个可操作的频率模式。 每个晶体管的基极电路连接到独立的谐振器和调谐元件，并共享一个共同的反馈电抗。 通过相对于第二晶体管增加第一晶体管的基极偏置电压，相关联的第一基极电路导通并允许以第一频率振荡，而第二基极电路关闭，从而防止在第二频率下的振荡。 相应地，通过降低基极偏置电压，第一基极电路被断开，第二基极电路导通。 晶体管共享共同的集电极连接和输出，提供两个频率之一。