公开(公告)号：US20110018125A1

公开(公告)日：2011-01-27

申请号：US12507049

申请日：2009-07-21

Applicant: Kum-Weng Loo ,  Jing-En Luan

Inventor： Kum-Weng Loo ,  Jing-En Luan

IPC: H01L23/373 ,  H01L23/34

CPC classification number: H01L23/16 ,  H01L23/3121 ,  H01L23/36 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/16152 ,  H01L2924/19105

Abstract: A semiconductor package includes a substrate board and a semiconductor die attached to a top surface of that substrate board. A heat spreader is provided over the semiconductor die. A stiffening ring is positioned surrounding the semiconductor die, the stiffening ring being attached to the top surface of the substrate board and attached to a bottom surface of the plate portion of the heat spreader. Space is left on the board outside of the stiffening ring to support the installation of passive components to the substrate board. An external ring may be included, with that external ring being interconnected to the stiffening ring by a set of tie bars. Alternatively, the heat spreader includes an integrally formed peripheral sidewall portion.

Abstract translation: 半导体封装包括衬底板和附接到该衬底板的顶表面的半导体管芯。 散热器设置在半导体管芯上。 加强环定位在半导体模具周围，加强环附接到基板的顶表面并且附接到散热器的板部分的底表面。 空间留在加强环外部的板上，以支持将无源部件安装到基板上。 可以包括外部环，该外环通过一组连接杆与加强环相互连接。 或者，散热器包括整体形成的外围侧壁部分。

公开(公告)号：US07873515B2

公开(公告)日：2011-01-18

申请号：US10995835

申请日：2004-11-23

Applicant: Kabi P. Padhi ,  Sudhir K. Kumar ,  Sapna George

Inventor： Kabi P. Padhi ,  Sudhir K. Kumar ,  Sapna George

IPC: G10L21/02 ,  G10L19/00

CPC classification number: G10L19/005

Abstract: A method includes receiving a sequence of frames containing audio information and determining that a frame is missing in the sequence of frames. The method also includes comparing the frame that precedes the missing frame to the received frames to identify a selected frame. The method further includes identifying a replacement frame comprising the frame that follows the selected frame. In addition, the method includes inserting the replacement frame into the sequence of frames in place of the missing frame.

Abstract translation: 一种方法包括：接收包含音频信息的帧序列，并确定帧序列中帧丢失。 该方法还包括将丢失帧之前的帧与接收的帧进行比较以识别所选择的帧。 该方法还包括识别包括跟随所选帧的帧的替换帧。 此外，该方法包括将替换帧插入到帧序列中而不是丢失的帧。

公开(公告)号：US07816182B2

公开(公告)日：2010-10-19

申请号：US11000355

申请日：2004-11-30

Applicant: Kum-Weng Loo ,  Chek-Lim Kho

Inventor： Kum-Weng Loo ,  Chek-Lim Kho

IPC: H01L21/50

CPC classification number: H01L24/32 ,  H01L23/49575 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48464 ,  H01L2224/48465 ,  H01L2224/49113 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A multichip integrated circuit apparatus includes first and second integrated circuit die mounted on opposite sides of a leadframe die paddle, with at least one of the integrated circuit die extending further toward the leads than does the die paddle. With this arrangement, the active circuit areas of both integrated circuit die can face in the same direction, and can be wire bonded to the same surfaces of the leads. This avoids wire bonding complications that are often encountered in multichip integrated circuit package designs.

Abstract translation: 多芯片集成电路装置包括安装在引线框模片的相对侧上的第一和第二集成电路芯片，其中至少一个集成电路芯片比裸片焊盘进一步朝着引线延伸。 通过这种布置，集成电路管芯的有源电路区域可以面向相同的方向，并且可以被引线接合到引线的相同表面。 这避免了在多芯片集成电路封装设计中经常遇到的引线接合复杂性。

公开(公告)号：US20100165209A1

公开(公告)日：2010-07-01

申请号：US12592766

申请日：2009-12-02

Applicant: Patricia Chiang Wei Yin

Inventor： Patricia Chiang Wei Yin

IPC: H04N9/78

CPC classification number: H04N9/78

Abstract: A system, apparatus and method are disclosed for separating a current frame of a composite video signal into a luminance signal and a chroma signal. A relative chroma correlation value is generated using a plurality of lines of the current frame. A weighted sum of inter-line pixel differences of the current frame is generated using the relative chroma correlation value. A frame difference signal is generated by subtracting a previous frame of the composite video signal from the current frame. A detected motion signal is generated that corresponds to motion detected in the current frame. The weighted sum of inter-line pixel differences, the frame difference signal, and the detected motion signal are combined to generate the chroma signal. The chroma signal is subtracted from the current frame to generate the luminance signal.

Abstract translation: 公开了一种用于将复合视频信号的当前帧分离为亮度信号和色度信号的系统，装置和方法。 使用当前帧的多行生成相对色度相关值。 使用相对色度相关值产生当前帧的行间像素差的加权和。 通过从当前帧减去复合视频信号的前一帧来产生帧差信号。 产生与当前帧中检测到的运动对应的检测到的运动信号。 线间像素差的加权和，帧差信号和检测到的运动信号被组合以产生色度信号。 从当前帧中减去色度信号以产生亮度信号。

公开(公告)号：US07745945B2

公开(公告)日：2010-06-29

申请号：US11545814

申请日：2006-10-10

Applicant: Kum-weng Loo ,  Chek-lim Kho ,  Jing-en Luan

Inventor： Kum-weng Loo ,  Chek-lim Kho ,  Jing-en Luan

IPC: H01L23/12 ,  H01L23/495 ,  H01L23/28 ,  H01L23/16

CPC classification number: H01L21/565 ,  H01L23/16 ,  H01L24/32 ,  H01L24/48 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01061 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: The present disclosure provides a very thin semiconductor package including a leadframe with a die-attach pad and a plurality of lead terminals, a die attached to the die-attach pad and electrically connected to the lead terminals via bonding wires, a position member disposed upon the die and/or die-attach pad, and a molding material encapsulating the leadframe, the die, and the position member together to form the semiconductor package. The method for manufacturing a very thin semiconductor package includes disposing a first position member on one side of the die-attach pad of a leadframe, attaching a die onto the opposite side of the die-attach pad, optionally disposing a second position member on top of the die, electrically connecting the die to the lead terminals of the leadframe, and encapsulating the leadframe, the die, and the position member(s) together to form the very thin semiconductor package.

公开(公告)号：US20100140788A1

公开(公告)日：2010-06-10

申请号：US12330044

申请日：2008-12-08

Applicant: Yonggang Jin

Inventor： Yonggang Jin

IPC: H01L23/52 ,  H01L21/50

CPC classification number: H01L23/5389 ,  H01L23/49811 ,  H01L23/49816 ,  H01L24/19 ,  H01L24/24 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/20 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/83192 ,  H01L2224/92 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/00

Abstract: Fan-out wafer level packaging includes an integrated circuit having a top surface, a bottom surface and a bond pad defined on the top surface, and a substrate having a cavity. An adhesive layer is positioned between a top surface of the cavity and the bottom surface of the integrated circuit, and a bump is positioned proximate a top surface of the fan-out wafer level packaging, the bump spaced apart from the integrated circuit. A redistribution layer is configured to electrically couple the bond pad of the integrated circuit to the bump.

Abstract translation: 扇出晶片级封装包括具有顶表面，底表面和限定在顶表面上的接合焊盘的集成电路和具有空腔的基板。 粘合剂层位于空腔的顶表面和集成电路的底表面之间，并且凸起位于扇形晶片级封装的顶表面附近，凸起与集成电路间隔开。 再分配层被配置为将集成电路的接合焊盘电连接到凸块。

公开(公告)号：US20100086085A1

公开(公告)日：2010-04-08

申请号：US12586838

申请日：2009-09-29

Applicant: Muralidhar Karthik ,  Ser Wah Oh

Inventor： Muralidhar Karthik ,  Ser Wah Oh

IPC: H04L27/06

CPC classification number: H04B1/707 ,  H04B2201/70701

Abstract: A method for estimating the speed of a mobile device in a network is provided that includes selecting a correlation length from a plurality of possible correlation lengths. A correlation result is generated based on the selected correlation length. A speed estimate is generated for the mobile device based on the correlation result.

Abstract translation: 提供了一种用于估计网络中的移动设备的速度的方法，其包括从多个可能的相关长度中选择相关长度。 基于所选择的相关长度生成相关结果。 基于相关结果为移动设备生成速度估计。

公开(公告)号：US07684471B2

公开(公告)日：2010-03-23

申请号：US10407840

申请日：2003-04-03

Applicant: Christopher Anthony Aldrige ,  Ser Wah Oh

Inventor： Christopher Anthony Aldrige ,  Ser Wah Oh

IPC: H04B1/00

CPC classification number: H04B1/7115 ,  H04B1/7117 ,  H04B1/712 ,  H04B2201/70707

Abstract: An efficient architecture for a rake combiner is disclosed, for constructively combining the desired multi-path signals from a Code-Division Multiple-Access (CDMA) based system, such as a Third-Generation Partnership Project (3GPP) Frequency Division Duplex (FDD) mode Wideband CDMA (W-CDMA) system, or an IS-95 CDMA system. The described rake combiner employs a single M-stage tap-delay line, an N+1 input adder, an arrangement of index offsets, pass gates, comparators and an M-stage counter to perform the combination, where M represents the delay spread in terms of symbol duration and N represents the number of rake fingers to be combined. The rake combiner architecture facilitates lowered resource requirements through use of a single tap-delay line in contrast to a conventional rake combiner which uses a series of M-stage tap-delay lines and an N input adder to perform the combination.

Abstract translation: 公开了一种用于耙式组合器的有效架构，用于从基于码分多址（CDMA）的系统（例如第三代合作伙伴计划（3GPP）频分复用（FDD））的构建组合所需的多路径信号， 模式宽带CDMA（W-CDMA）系统或IS-95 CDMA系统。 所述的rake组合器使用单个M级抽头延迟线，N + 1个输入加法器，索引偏移的布置，通过门，比较器和M级计数器来执行组合，其中M表示延迟扩展 符号持续时间项，N表示要组合的耙指的数量。 与使用一系列M级抽头延迟线和N输入加法器来执行组合的常规rake组合器相比，采用单抽头延迟线，rake组合器架构有助于降低资源需求。

公开(公告)号：US20100051354A1

公开(公告)日：2010-03-04

申请号：US12200567

申请日：2008-08-28

Applicant: Kusuma Adi Ningrat ,  Chee Yu Ng ,  Giuseppe Noviello

Inventor： Kusuma Adi Ningrat ,  Chee Yu Ng ,  Giuseppe Noviello

IPC: G06F3/044

CPC classification number: G06F3/044 ,  G06F3/0418

Abstract: A method of matrix sensing using delay-based capacitance sensing, including using X-axis lines as active lines for capacitance measurements and using Y-axis lines as a disturbance to identify the location of a touch in a key matrix is disclosed. A sensing signal is applied to the X-axis lines, and a disturbance signal is applied to the Y-axis lines. If a location is touched, cross-capacitance is reduced, which is measured by sweeping data along the X-axis lines.

公开(公告)号：US20090299082A1

公开(公告)日：2009-12-03

申请号：US12410630

申请日：2009-03-25

Applicant: Charles Baudot ,  Maria Viviana Volpe ,  Jeng Chien Kong ,  Cher Ming Tan

Inventor： Charles Baudot ,  Maria Viviana Volpe ,  Jeng Chien Kong ,  Cher Ming Tan

IPC: C07D303/04

CPC classification number: C07D303/04 ,  C08G59/02 ,  C08K9/04

Abstract: The invention relates to epoxy functionalized carbon nanotubes (CNTs) and methods of forming the same, and more particularly to inclusion of the epoxy functionalized CNTs as fillers in electronic applications, e.g., semiconductor devices and device packaging. More particularly, CNT-based epoxy resin composites are employed as materials for electronic packaging applications and the inclusion of CNTs as fillers chemically linked to epoxy resin macromolecules. The resulting materials showed improved chemical-physical features in terms of mechanical, thermal and electrical properties.

Abstract translation: 本发明涉及环氧官能化碳纳米管（CNT）及其形成方法，更具体地说，涉及将环氧官能化CNT作为填料包括在电子应用中，例如半导体器件和器件封装。 更具体地，CNT基环氧树脂复合材料被用作电子封装应用的材料，并且包括CNT作为与环氧树脂大分子化学连接的填料。 所得材料在机械，热和电性能方面表现出改善的化学物理特征。