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公开(公告)号：US20240429095A1
公开(公告)日：2024-12-26
申请号：US18733373
申请日：2024-06-04
Applicant: STMicroelectronics International N.V.
Inventor： Shei Meng LOO
IPC: H01L21/768 , H01L21/04 , H01L21/304 , H01L21/48
Abstract: A method of relocation of input/output (I/O) contact pads in a wafer-level package is provided. A method of manufacturing a wafer-level package can include: forming a redistribution layer on a wafer having a contact pad disposed thereon, where the wafer defines a plane along a major horizontal surface on which the contact pad is disposed; drilling, with a multi-axis laser drill, a hole along an axis through the redistribution layer to reach the contact pad, where the axis of the hole through the redistribution layer is at an angle relative to the plane that is neither parallel nor orthogonal; and forming a contact extending from the contact pad, through the hole through the redistribution layer, to a position on the redistribution layer.
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公开(公告)号：US20240427366A1
公开(公告)日：2024-12-26
申请号：US18337720
申请日：2023-06-20
Applicant: STMicroelectronics International N.V.
IPC: G06F1/06
Abstract: According to an embodiment, a method for testing a scan chain is provided. The method includes receiving a first clock signal and a first scan enable signal and generating a second and third clock signal based on the first clock signal and the first scan enable signal. The third clock signal is delayed by a clock pulse from the second clock signal. The first, second, and third clock signal have the same duty cycle. The method further includes providing the second clock signal and the second scan enable signal to, respectively, a clock terminal and scan enable input of a first scan flip-flop of the scan chain. The method further includes providing the third clock signal and a third scan enable signal to, respectively, a clock terminal and a scan enable input of a last scan flip-flop of the scan chain.
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453.发明申请公开(公告)号：US20240423545A1
公开(公告)日：2024-12-26
申请号：US18339480
申请日：2023-06-22
Applicant: STMicroelectronics International N.V.
Inventor： Alessandro GUMIERO , Luigi DELLA TORRE , Charlotte MILANETTO , Nicola PICOZZI , David MAUCOTEL , Benedicte VANGY
Abstract: An example electronic device, computer-implemented method, and mobile device system for measuring the vital signs of a subject in a non-invasive manner are provided. The example electronic device may include a housing, an electronic display attached to the housing, and an optical sensor disposed within the housing. The electronic display may further include a first side configured to direct transmitted light toward a portion of a subject proximate the electronic display via organic light-emitting diodes (OLED). In addition, the optical sensor may be disposed, opposite the first side of the electronic display, and may be configured to receive reflected light off the portion of the subject. One or more vital signs of the subject may be determined based at least in part on the reflected light.
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公开(公告)号：US20240421809A1
公开(公告)日：2024-12-19
申请号：US18740272
申请日：2024-06-11
Applicant: STMicroelectronics International N.V.
Inventor： Marco ZAMPROGNO , Pasquale FLORA , Fabio SEVERINI
IPC: H03K17/041
Abstract: A switch device is described, formed by: a first switch MOS transistor, with its drain terminal connected to a first switch terminal, source terminal connected to an internal source node and gate terminal connected to an internal gate node; a second switch MOS transistor, with its drain terminal connected to a second switch terminal, source terminal connected to the internal source node and gate terminal connected to the internal gate node; and a voltage limiting element connected between the internal gate and source nodes. A driving stage, voltage-referred to the internal source node, drives the switching of the bidirectional switch, as a function a first and a second driving signals, and has a driving transistor and a switching transistor connected to each other in inverter configuration.
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公开(公告)号：US20240421691A1
公开(公告)日：2024-12-19
申请号：US18334757
申请日：2023-06-14
Applicant: STMicroelectronics International N.V.
Inventor： Niccolo' Brambilla , Sandro Rossi , Valeria Bottarel , Stefano Corona , Fulvio Ottavio Lissoni
Abstract: An integrated circuit device includes: one or more switches of a Buck converter; and a control circuit for the Buck converter, including: a comparator configured to compare a feedback voltage of the Buck converter with a compensation ramp voltage; a pulse generator configured to generate, in response to a rising edge in a comparator output signal, a pulse signal for controlling the Buck converter; a transconductance amplifier (TA) configured to generate, at an output terminal of the TA, a current proportional to a difference between a reference voltage and the feedback voltage; a capacitor coupled between an output terminal of the TA and a reference voltage node; and a ramp signal generator configured to generate the compensation ramp voltage by adding a voltage at the output terminal of the TA and a ramp voltage having a gradient proportional to a switching frequency of the Buck converter.
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Patent Agency Ranking
公开(公告)号：US20240402241A1
公开(公告)日：2024-12-05
申请号：US18203737
申请日：2023-05-31
Applicant: STMicroelectronics International N.V.
Inventor： Sandor PETENYI , Lukas BURIAN
Abstract: Disclosed herein is a testing circuit for indirectly testing generation of a power-on-reset signal within an integrated circuit (IC). The testing circuit includes a switch configured to selectively disconnect an internal circuit from a test pin of the IC in response to start-up of the IC, a plurality of resistors connected between the test pin and a respective plurality of switches that are configured to selectively connect ones of the plurality of resistors to ground in response to corresponding control signals, and a control circuit configured to produce, at the test pin, a resistance indicative of status of generation of the POR signal by selectively operating the plurality of switches based upon statuses of a plurality of signals from which the POR signal is generated.
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457.发明申请公开(公告)号：US20240389484A1
公开(公告)日：2024-11-21
申请号：US18659436
申请日：2024-05-09
Applicant: STMicroelectronics International N.V.
Inventor： Massimo BORGHI , Annalisa GILARDINI , Elisabetta PALUMBO , Carlo Luigi PRELINI , Paola ZULIANI
Abstract: A phase change memory element includes a memory region, a first electrode and a second electrode. The memory region is arranged between the first and the second electrodes and is made of a GST alloy. An average percentage of germanium in the GST alloy is higher than 50%. The memory region has a storage portion formed by a GST alloy that includes nitrogen in an electrically relevant amount. The GST alloy of the storage portion has a percentage of germanium inclusively between 60% and 68%; a percentage of antimony inclusively between 9% and 5%; a percentage of tellurium inclusively between 18% and 10%; and a percentage of nitrogen inclusively between 5% and 25%.
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公开(公告)号：US20240385323A1
公开(公告)日：2024-11-21
申请号：US18648988
申请日：2024-04-29
Applicant: STMicroelectronics International N.V.
Inventor： Thomas Perotto , Charlotte Milanetto
Abstract: A proximity sensing device includes a proximity sensor including a light source, a light detector including a first photodiode adapted to generate a first signal, and a second photodiode adapted to generate a second signal, the second photodiode and the light source being separated from the first photodiode with a separator. The proximity sensing device further includes a selecting circuit adapted to compare the first signal to the second signal, and to select a signal from the first and second signals according to the executed comparison.
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公开(公告)号：US12148473B2
公开(公告)日：2024-11-19
申请号：US17697846
申请日：2022-03-17
Inventor： Roberto Bregoli , Vikas Rana
Abstract: In an embodiment a non-volatile memory cell includes a substrate, a first body in the substrate, a second body in the substrate, a first storage transistor having a first conduction region and a second conduction region in the first body, the first and second conduction regions delimiting a first channel region in the first body, a first control gate region in the second body, an insulating region overlying the substrate, a single floating gate region extending on the substrate and embedded in the insulating region, the single floating gate region having a first portion on the first body and a second portion on the second body, the first portion and second portion being connected and electrically coupled, a first selection via extending through the insulating region and electrically coupling the first conduction region with a first conduction node, a second selection via extending through the insulating region and electrically coupling the second conduction region with a second conduction node and a first control via extending though the insulating region and electrically coupling the first control gate region with a first control node.
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公开(公告)号：US12143108B2
公开(公告)日：2024-11-12
申请号：US17812127
申请日：2022-07-12
Inventor： Francesco La Rosa , Marco Bildgen
IPC: H03K19/17768 , H03K19/08 , H03K19/1776 , H04L9/32
Abstract: In an embodiment an integrated device includes a first physical unclonable function module configured to generate an initial data group and management module configured to generate an output data group from at least the initial data group, authorize only D successive deliveries of the output data group on a first output interface of the device, D being a non-zero positive integer, and prevent any new generation of the output data group.
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