Retaining Cap
    473.
    发明申请
    Retaining Cap 审中-公开

    公开(公告)号:US20190242847A1

    公开(公告)日:2019-08-08

    申请号:US15888863

    申请日:2018-02-05

    CPC classification number: G01N27/403 G01N27/28 G01N27/4045

    Abstract: A cap for use with devices, such as sensors. The cap includes protrusions on its underside, to restrict the movement of a liquid or a gel placed under cap. The protrusions may take the form of walls or pillars, depending on the application. As such, the cap retains the liquid or gel in a specified position on the device. For example, an electrochemical sensor may require a liquid electrolyte to remain in place over one or more electrodes. The protrusions may not extend far enough to touch the device, but rather leave a small gap. However, because of the surface tension of the liquid, the liquid generally stays within the protrusions.

    Reservoir capacitor based analog-to-digital converter

    公开(公告)号:US10348319B1

    公开(公告)日:2019-07-09

    申请号:US15983658

    申请日:2018-05-18

    Abstract: Techniques to use reservoir capacitors in ADC to supply most of the charge to bit-trial capacitors as bit-trials are performed. An accurate reference voltage source, e.g., a reference buffer circuit, only needs to supply the difference, e.g., an inaccuracy, in the charge supplied by the reservoir capacitors. Instead of having to resettle for each bit-trial, the accurate reference voltage source has only to deliver the initial charge to the reservoir capacitors during acquisition and once more when the ADC is ready to sample onto the residue amplifier. These techniques can ease the demands on the reference buffer circuit and requirement of external decoupling capacitors, for example.

    High dynamic range analog front-end receiver for long range LIDAR

    公开(公告)号:US10338224B2

    公开(公告)日:2019-07-02

    申请号:US15698491

    申请日:2017-09-07

    Abstract: A system and method for operating a high dynamic range analog front-end receiver for long range LIDAR with a transimpedance amplifier (TIA) include a clipping circuit to prevent saturation of the TIA. The output of the clipping circuit is connected via a diode or transistor to the input of the TIA and regulated such that the input voltage of the TIA remains close to or is only slightly above the saturation threshold voltage of the TIA. The regulation of the input voltage of the TIA can be improved by connecting a limiting resistor in series with the diode or transistor. A second clipping circuit capable of dissipating higher input currents and thus higher voltages may be connected in parallel with the first clipping circuit. A resistive element may be placed between the first and second clipping circuits to further limit the input current to the TIA.

    Frequency-shaped digital predistortion

    公开(公告)号:US10320340B1

    公开(公告)日:2019-06-11

    申请号:US15868295

    申请日:2018-01-11

    Abstract: Various examples are directed to a digital predistortion (DPD) circuit comprising a DPD actuator circuit, a DPD feedback frequency-shaping filter, a basis matrix generator circuit, a basis matrix frequency-shaping filter, and a DPD adaption circuit. The DPD actuator circuit may generate a predistorted signal based at least in part on an input signal and a set of frequency-shaped DPD parameters. The DPD feedback frequency-shaping filter may filter a DPD feedback signal to generate a frequency-shaped DPD feedback signal. A passband of the DPD feedback frequency-shaping filter may include substantially all of a bandwidth of the input signal and exclude a distortion term outside the bandwidth of the input signal. The basis matrix generator may generate a basis matrix based at least in part on a power amplifier feedback signal The basis matrix frequency-shaping filter may generate a frequency-shaped basis matrix based at least in part on the basis matrix. The DPD adaption circuit may be configured to generate the set of frequency-shaped DPD parameters based at least in part on the frequency-shaped basis matrix and the frequency-shaped DPD feedback signal.

    ADC digital gain error compensation
    479.
    发明授权

    公开(公告)号:US10312930B1

    公开(公告)日:2019-06-04

    申请号:US15880010

    申请日:2018-01-25

    Abstract: Techniques are provided for compensating gain of a combined amplifier and analog-to-digital converter (ADC) circuit, for example, due to additional filtering added to an input of the circuit. In an example, an integrated circuit including an amplifier and ADC can include an amplifier circuit configured to receive an input signal and to amplify the input signal based on an input resistance and a feedback resistance, and to provide an amplified representation of the input signal, and an ADC circuit configured to receive an output of the amplifier, to determine a digital coefficient associated with an additional input resistance coupled to the amplifier, and to provide a compensated digital representation of the amplified representation of the input signal using the digital compensation coefficient.

    Noise-shaping analog-to-digital converter

    公开(公告)号:US10312926B2

    公开(公告)日:2019-06-04

    申请号:US16013425

    申请日:2018-06-20

    Abstract: Shortening any of the operational phases of a noise-shaping successive approximation register (SAR) analog-to-digital converter (ADC), including the acquisition phase, the bit trial phase, and the residue charge transfer phase, can result in higher power, and it can be difficult to achieve high speed at low power. Using various techniques described, the acquisition, bit-trial, and residue charge transfer phases of two or more digital-to-analog converter (DAC) circuits of an ADC circuit can be time-interleaved. The use of two or more DAC circuits can increase or maximize the time available for the acquisition, bit-trial, and residue charge transfer phases.

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