公开(公告)号：US20230378295A1

公开(公告)日：2023-11-23

申请号：US18197909

申请日：2023-05-16

Applicant: STMicroelectronics (Crolles 2) SAS ,  STMicroelectronics (Rousset) SAS

Inventor： Siddhartha DHAR ,  Stephane MONFRAY ,  Alain FLEURY ,  Franck JULIEN

IPC: H01L29/423 ,  H01L27/088 ,  H01L21/8234 ,  H01L29/40

CPC classification number: H01L29/42368 ,  H01L27/088 ,  H01L21/823462 ,  H01L29/401

Abstract: A transistor includes a semiconductor layer with a stack of a gate insulator and a conductive gate on the semiconductor layer. A thickness of the gate insulator is variable in a length direction of the transistor. The gate insulator includes a first region having a first thickness below a central region of the conductive gate. The gate insulator further includes a second region having a second thickness, greater than the first thickness, below an edge region of conductive gate.

公开(公告)号：US11823947B2

公开(公告)日：2023-11-21

申请号：US17978533

申请日：2022-11-01

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Jean Jimenez Martinez

IPC: H01L21/74 ,  H01L27/06 ,  H01L29/66 ,  H01L29/73 ,  H01L29/78 ,  H01L29/06 ,  H01L21/8249 ,  H01L21/266 ,  H01L21/02

CPC classification number: H01L21/74 ,  H01L21/02 ,  H01L21/266 ,  H01L21/8249 ,  H01L27/0623 ,  H01L29/0615 ,  H01L29/66234 ,  H01L29/66681 ,  H01L29/7302 ,  H01L29/7816 ,  H01L29/7817

Abstract: An integrated circuit includes an N-type laterally diffused metal-oxide semiconductor (NLDMOS) transistor including an active semiconductor substrate region having P-type conductivity. The integrated circuit further includes a buried semiconductor region having N+-type conductivity underneath the active substrate region. The buried semiconductor region is more heavily doped than the active semiconductor substrate region.

公开(公告)号：US11822164B2

公开(公告)日：2023-11-21

申请号：US17009468

申请日：2020-09-01

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Stephane Monfray

IPC: G02F1/025

CPC classification number: G02F1/025 ,  G02F2202/06 ,  G02F2202/104 ,  G02F2202/105 ,  G02F2203/50

Abstract: An electro-optical phase modulator includes a waveguide made from a stack of strips. The stack includes a first strip made of a doped semiconductor material of a first conductivity type, a second strip made of a conductive material or of a doped semiconductor material of a second conductivity type, and a third strip made of a doped semiconductor material of the first conductivity type. The second strip is separated from the first strip by a first interface layer made of a dielectric material, and the third strip is separated from the second strip by a second interface layer made of a dielectric material.

公开(公告)号：US20230361151A1

公开(公告)日：2023-11-09

申请号：US18298781

申请日：2023-04-11

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Jonathan Fantuz ,  Alain Inard ,  Didier Dutartre

IPC: H01L27/146

CPC classification number: H01L27/14685 ,  H01L27/14627

Abstract: In accordance with an embodiment, a method for manufacturing an optical device on a support substrate includes: forming first microlens structures on the support substrate using a first photolithography process such that the first microlens structures are separated from one another; deforming the first microlens structures so as to give the first microlens structures a curved shape, wherein the first microlens structures are separated from one another by spacer regions after deformation; forming second microlens structures substrate using a second photolithography process such that the second microlens structures extend over the first microlens structures; and deforming the second microlens structures such that the second microlens structures have a curved form matching the curved shape of the first microlens structures and extend partly into the spacer regions between the first microlens structures.

公开(公告)号：US20230317744A1

公开(公告)日：2023-10-05

申请号：US18127286

申请日：2023-03-28

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Boris RODRIGUES GONCALVES ,  Pascal FONTENEAU

IPC: H01L27/146 ,  G01S7/481 ,  G01S17/89

CPC classification number: H01L27/1461 ,  H01L27/14649 ,  H01L27/1463 ,  H01L27/14689 ,  G01S7/4816 ,  G01S17/89

Abstract: A photodiode is formed in a semiconductor substrate having a first surface and a second surface. The semiconductor substrate includes a first N-type semiconductor region formed by epitaxial growth and a second N-type semiconductor region (that is more heavily doped than the first region) extending into the first N-type semiconductor region from the first surface. The dopant concentration of the first N-type semiconductor region gradually increases between the second surface and the first surface of the semiconductor substrate. An implanted heavily P-type doped region is formed in the second N-type semiconductor region at the first surface.

公开(公告)号：US11776995B2

公开(公告)日：2023-10-03

申请号：US17734486

申请日：2022-05-02

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Alexis Gauthier ,  Pascal Chevalier ,  Gregory Avenier

IPC: H01L29/06 ,  H01L21/8222 ,  H01L29/66 ,  H01L29/732

CPC classification number: H01L29/0642 ,  H01L21/8222 ,  H01L29/6634 ,  H01L29/7322

Abstract: A transistor is produced by forming a first part of a first region of the transistor in a semiconductor substrate by implanting dopants through an opening in an isolating trench formed at an upper surface of the semiconductor substrate. A second region of the transistor in the opening by epitaxy.

公开(公告)号：US11764242B2

公开(公告)日：2023-09-19

申请号：US17070537

申请日：2020-10-14

Applicant: STMicroelectronics (Crolles 2) SAS ,  Commissariat A L'Energie Atomique Et Aux Energies Alternatives

Inventor： Lucie Dilhan ,  Jerome Vaillant

IPC: H01L27/146

CPC classification number: H01L27/14627 ,  H01L27/14603 ,  H01L27/14605 ,  H01L27/14643 ,  H01L27/14685

Abstract: The present disclosure relates to an image sensor including a plurality of pixels formed in and on a semiconductor substrate and arranged in a matrix with N rows and M columns, with N being an integer greater than or equal to 1 and M an integer greater than or equal to 2. A plurality of microlenses face the substrate, and each of the microlenses is associated with a respective pixel. The microlenses are arranged in a matrix in N rows and M columns, and the pitch of the microlens matrix is greater than the pitch of the pixel matrix in a direction of the rows of the pixel matrix.

公开(公告)号：US11736826B2

公开(公告)日：2023-08-22

申请号：US16912609

申请日：2020-06-25

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Francois Roy ,  Thomas Dalleau

IPC: H04N25/57 ,  H01L27/146 ,  H04N25/76 ,  H04N25/77 ,  H04N25/709

CPC classification number: H04N25/57 ,  H01L27/14616 ,  H04N25/76 ,  H04N25/77

Abstract: A pixel includes: a detection node; a first normally on transistor connected between the detection node and a rail for applying a first potential; and a second transistor whose gate is connected to the detection node. An image sensor includes a plurality of the pixels and a control circuit configured to apply, during for a phase of initializing the detection node, the first potential to the gate of the first transistor.

公开(公告)号：US11686992B2

公开(公告)日：2023-06-27

申请号：US17476668

申请日：2021-09-16

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Frédéric Boeuf ,  Cyrille Barrera

IPC: G02F1/225 ,  G02F1/025 ,  G02F1/035

CPC classification number: G02F1/2257 ,  G02F1/025 ,  G02F1/035 ,  G02F2202/103

Abstract: A capacitive electro-optical modulator includes a silicon layer having a cavity having sidewalls and a floor. A germanium or silicon-germanium strip overlies the silicon layer within the cavity. A silicon strip overlies the germanium or silicon-germanium strip within the cavity. The silicon strip is wider than the germanium or silicon-germanium strip. An insulator fills the cavity laterally adjacent the germanium or silicon-germanium strip and the silicon strip and extending between the sidewalls of the cavity. An upper insulating layer overlies the silicon strip and the insulator. A layer of III-V material overlies the upper insulating layer. The layer of III-V material formed as a third strip is arranged facing the silicon strip and separated therefrom by a portion of the upper insulating layer.

公开(公告)号：US20230197868A1

公开(公告)日：2023-06-22

申请号：US18109955

申请日：2023-02-15

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Didier DUTARTRE

IPC: H01L31/0312 ,  H01L31/107

CPC classification number: H01L31/03125 ,  H01L31/107 ,  G06F1/1605

Abstract: An integrated optical sensor includes a photon-detection module of a single-photon avalanche photodiode type. The detection module includes a semiconductive active zone in a substrate. The semiconductive active zone includes a region that contains germanium with a percentage between 3% and 10%. This percentage range is advantageous because it makes it possible to obtain a material firstly containing germanium (which in particular increases the efficiency of the sensor in the infrared or near infrared domain) and secondly having no or very few dislocations (which facilitates the implementation of a functional sensor in integrated form).