Method of fabricating shallow trench isolation structure and microelectronic device having the structure
    41.
    发明申请
    Method of fabricating shallow trench isolation structure and microelectronic device having the structure 审中-公开
    制造浅沟槽隔离结构的方法和具有该结构的微电子器件

    公开(公告)号:US20050023634A1

    公开(公告)日:2005-02-03

    申请号:US10862336

    申请日:2004-06-08

    CPC分类号: H01L21/763 H01L21/76224

    摘要: Provided is a method of fabricating a shallow trench isolation (STI) structure having a high aspect ratio and improved insulating properties. The exemplary method includes filling a shallow trench isolation region opening with an undoped polysilicon layer, removing an upper portion of the undoped polysilicon layer to form a second opening having a reduced aspect ratio relative to the original opening and filling the second opening with an insulating material to complete the STI structure. Additional protective layers including silicon oxide, silicon nitride and/or a capping layer may be provided on the sidewalls of the opening before depositing the undoped polysilicon.

    摘要翻译: 提供一种制造具有高纵横比和改进的绝缘性能的浅沟槽隔离(STI)结构的方法。 该示例性方法包括填充具有未掺杂多晶硅层的浅沟槽隔离区开口,去除未掺杂多晶硅层的上部,以形成相对于原始开口具有减小的纵横比的第二开口,并用绝缘材料填充第二开口 完成STI结构。 在沉积未掺杂的多晶硅之前,可以在开口的侧壁上提供包括氧化硅,氮化硅和/或覆盖层的附加保护层。

    VARIABLE RESISTANCE NON-VOLATILE MEMORY DEVICES INCLUDING A UNIFORMLY NARROW CONTACT LAYER AND METHODS OF MANUFACTURING SAME
    42.
    发明申请
    VARIABLE RESISTANCE NON-VOLATILE MEMORY DEVICES INCLUDING A UNIFORMLY NARROW CONTACT LAYER AND METHODS OF MANUFACTURING SAME 有权
    可变电阻非易失性存储器件,包括一个均匀的窄接触层及其制造方法

    公开(公告)号:US20080029754A1

    公开(公告)日:2008-02-07

    申请号:US11829556

    申请日:2007-07-27

    IPC分类号: H01L45/00

    摘要: A phase changeable memory device is manufactured by forming at least one insulating layer on a substrate. A preliminary first electrode is formed on the insulating layer. The preliminary first electrode is partially etched to form a first electrode electrically connected to the substrate. After the preliminary first electrode is formed, both sidewalls of the preliminary first electrode are partially etched isotropically to form a first electrode having a uniform width and height. A phase changeable material layer pattern and a second electrode are subsequently formed on the first electrode. Related devices also are described.

    摘要翻译: 通过在基板上形成至少一个绝缘层来制造相变存储器件。 在绝缘层上形成初步的第一电极。 部分蚀刻预备的第一电极以形成电连接到衬底的第一电极。 在初步第一电极形成之后,预成型第一电极的两个侧壁被各向同性地部分蚀刻以形成具有均匀宽度和高度的第一电极。 随后在第一电极上形成相变材料层图案和第二电极。 还描述了相关设备。

    Etching solution, method of forming a pattern using the same, method of manufacturing a multiple gate oxide layer using the same and method of manufacturing a flash memory device using the same
    43.
    发明申请
    Etching solution, method of forming a pattern using the same, method of manufacturing a multiple gate oxide layer using the same and method of manufacturing a flash memory device using the same 失效
    蚀刻溶液,使用其形成图案的方法,使用该方法制造多栅极氧化物层的方法以及使用其制造闪存器件的方法

    公开(公告)号:US20070015372A1

    公开(公告)日:2007-01-18

    申请号:US11482773

    申请日:2006-07-10

    IPC分类号: C09K13/00 B44C1/22 H01L21/302

    CPC分类号: C09K13/04 H01L21/32134

    摘要: Example embodiments of the present invention relate to an etching solution, a method of forming a pattern using the same, a method of manufacturing a multiple gate oxide layer using the same and a method of manufacturing a flash memory device using the same. Other example embodiments of the present invention relate to an etching solution having an etching selectivity between a polysilicon layer and an oxide layer, a method of forming a pattern using an etching solution using the same, a method of manufacturing a multiple gate oxide layer using the same, and a method of manufacturing a flash memory device using the same. An etching solution including hydrogen peroxide (H2O2) and ammonium hydroxide (NH4OH) by a volume ratio of about 1:2 to about 1:10 mixed in water. In a method of forming a pattern and methods of manufacturing a multiple gate oxide layer and a flash memory device, a polysilicon layer may be formed on a substrate. An insulation layer pattern including an opening exposing the polysilicon layer may be formed on the polysilicon layer. The polysilicon layer exposed by the insulation layer pattern may be etched using the etching solution. A polysilicon layer pattern may be formed on the substrate using the etching solution.

    摘要翻译: 本发明的示例性实施例涉及一种蚀刻溶液,使用该方法形成图案的方法,使用该蚀刻溶液的多栅极氧化物层的制造方法以及使用其制造闪存器件的方法。 本发明的其它示例性实施例涉及在多晶硅层和氧化物层之间具有蚀刻选择性的蚀刻溶液,使用其使用蚀刻溶液形成图案的方法,使用该栅极氧化物层的方法 以及使用其制造闪存器件的方法。 包含过氧化氢(H 2 O 2 O 2)和氢氧化铵(NH 4 OH)的体积比约为1:2的蚀刻溶液 至约1:10混合在水中。 在形成图案的方法和制造多栅极氧化物层和闪存器件的方法中,可以在衬底上形成多晶硅层。 可以在多晶硅层上形成包括露出多晶硅层的开口的绝缘层图案。 可以使用蚀刻溶液蚀刻由绝缘层图案暴露的多晶硅层。 可以使用蚀刻溶液在衬底上形成多晶硅层图案。

    Wafer cleaning system
    45.
    发明授权
    Wafer cleaning system 有权
    晶圆清洗系统

    公开(公告)号:US06843257B2

    公开(公告)日:2005-01-18

    申请号:US10133710

    申请日:2002-04-25

    摘要: Embodiments of the invention include a megasonic energy cleaning apparatus that has the ability to rotate the wafer to be cleaned, as well as rotate the cleaning probe during the cleaning process. Rotating the cleaning probe while the wafer is being cleaned is effective to increase the cleaning action of the apparatus while also minimizing damage to the wafer. Curved grooves, such as a spiral groove, can be etched into the cleaning probe to minimize forming harmful waves that could potentially cause damage to the wafer surface or to structures already made on the surface. Using a cleaning probe having a curved groove while also rotating the cleaning probe effectively cleans particles from a wafer while also limiting damage to the surface of the wafer.

    摘要翻译: 本发明的实施例包括具有旋转要清洁的晶片的能力的兆声波能量清洁装置,以及在清洁过程中旋转清洁探针。 在清洁晶片时旋转清洁探针有效地增加了设备的清洁作用,同时还使对晶片的损坏最小化。 弯曲的凹槽(例如螺旋槽)可以蚀刻到清洁探针中,以最小化形成可能对晶片表面或已经在表面上形成的结构造成损害的有害波。 使用具有弯曲凹槽同时旋转清洁探针的清洁探针有效地从晶片清洁颗粒,同时还限制对晶片表面的损伤。