公开(公告)号：US20080191621A1

公开(公告)日：2008-08-14

申请号：US12012949

申请日：2008-02-05

Applicant: Jae-kook Ha ,  Kyuha Chung ,  Chang-woong Chu ,  Joo-hyeon Lee

Inventor： Jae-kook Ha ,  Kyuha Chung ,  Chang-woong Chu ,  Joo-hyeon Lee

IPC: H01J1/62 ,  B32B9/00

CPC classification number: H01L51/5012 ,  H01L27/3244 ,  H01L51/5008 ,  H01L51/5036 ,  H01L51/5052

Abstract: A display device includes: a first electrode; a second electrode; and an emitting material layer which is interposed between the first electrode and the second electrode, the emitting material layer being doped with an electric charge transport material of which content varies along a thickness direction and comprising a plurality of sub-layers staked in sequence.

Abstract translation: 显示装置包括：第一电极; 第二电极; 以及介于所述第一电极和所述第二电极之间的发光材料层，所述发光材料层掺杂有沿厚度方向变化的电荷输送材料，并且包括依次放置的多个子层。

公开(公告)号：US20080180549A1

公开(公告)日：2008-07-31

申请号：US11870568

申请日：2007-10-11

Applicant: Chang-hyeon LEE ,  Han-Kon Kim

Inventor： Chang-hyeon LEE ,  Han-Kon Kim

IPC: H04N5/76 ,  H04N5/222 ,  H04N5/262

CPC classification number: H04N5/232 ,  G03B19/26 ,  H04N5/2251 ,  H04N5/23245

Abstract: A multifunctional video apparatus and a method of providing a user interface (UI) thereof. The multifunctional video apparatus has diverse functions such as image capturing, image reproduction, image editing, image input/output from/to an external device, etc., and provides a UI capable of performing the above-described functions more conveniently.

Abstract translation: 一种多功能视频装置及其用户界面（UI）的提供方法。 多功能视频装置具有图像捕获，图像再现，图像编辑，从外部设备的图像输入/输出等多种功能，并且提供能够更方便地执行上述功能的UI。

公开(公告)号：US20080124931A1

公开(公告)日：2008-05-29

申请号：US11978718

申请日：2007-10-30

Applicant: Doo-youl Lee ,  Pan-suk Kwak ,  Sung-gon Jung ,  Jung-hyeon Lee ,  Suk-joo Lee ,  Cha-won Koh ,  Ji-young Lee

Inventor： Doo-youl Lee ,  Pan-suk Kwak ,  Sung-gon Jung ,  Jung-hyeon Lee ,  Suk-joo Lee ,  Cha-won Koh ,  Ji-young Lee

IPC: H01L21/302

CPC classification number: H01L21/0332 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/31144 ,  H01L21/76816 ,  H01L21/76838

Abstract: A method for forming fine patterns of a semiconductor device includes forming an etching film on a substrate having first and second areas, forming first mask patterns on the substrate to have a first pattern density in the first area and a second pattern density in the second area, forming first capping patterns between the first mask patterns, forming second capping patterns between the first mask patterns, such that recess areas are formed between second capping patterns, and such that a first etching pattern is defined to include the first and second capping patterns, forming second mask patterns in the recess areas to include the first and second mask patterns, removing one of the first and second etching patterns, such that a single etching pattern is remaining on the substrate, and etching the etching film using the remaining etching pattern as an etch mask to form etching film patterns.

Abstract translation: 用于形成半导体器件的精细图案的方法包括在具有第一和第二区域的衬底上形成蚀刻膜，在衬底上形成第一掩模图案以在第一区域中具有第一图案密度，在第二区域中形成第二图案密度 在所述第一掩模图案之间形成第一封盖图案，在所述第一掩模图案之间形成第二封盖图案，使得在第二封盖图案之间形成凹陷区域，并且使得第一蚀刻图案被限定为包括所述第一和第二封盖图案， 在凹陷区域中形成第二掩模图案以包括第一和第二掩模图案，去除第一和第二蚀刻图案中的一个，使得在基板上残留单个蚀刻图案，并使用剩余的蚀刻图案蚀刻蚀刻膜作为 蚀刻掩模以形成蚀刻膜图案。

公开(公告)号：US07375390B2

公开(公告)日：2008-05-20

申请号：US11621617

申请日：2007-01-10

Applicant: Jung-Hyeon Lee ,  Gi-Sung Yeo ,  Doo-Hoon Goo ,  Woo-Sung Han

Inventor： Jung-Hyeon Lee ,  Gi-Sung Yeo ,  Doo-Hoon Goo ,  Woo-Sung Han

IPC: H01L27/108 ,  H01L29/76 ,  H01L29/94 ,  H01L31/119

CPC classification number: H01L27/10885 ,  H01L27/0207 ,  H01L27/10814 ,  H01L27/10855 ,  H01L27/10888 ,  H01L27/10891

Abstract: A semiconductor memory device includes a plurality of rows, each row comprising a plurality of active regions arranged at a pitch wherein the active regions in adjacent rows are shifted with respect to each other by one half of the pitch, wherein a distance between each active region in a row is equal to a distance between active regions in adjacent rows.

Abstract translation: 半导体存储器件包括多行，每行包括以间距排列的多个有源区，其中相邻行中的有源区相对于间距彼此偏移一半，其中每个有源区之间的距离 在一行中等于相邻行中的活动区域之间的距离。

公开(公告)号：US07368348B2

公开(公告)日：2008-05-06

申请号：US11246401

申请日：2005-10-07

Applicant: Sang-Hyeon Lee

Inventor： Sang-Hyeon Lee

IPC: H01L21/336

CPC classification number: H01L29/78696 ,  H01L29/42384 ,  H01L29/66545 ,  H01L29/78645 ,  H01L29/78648

Abstract: Methods of forming field effect transistors having buried gate electrodes include the steps of forming a semiconductor substrate having a sacrificial gate electrode buried beneath a surface of the semiconductor substrate and then removing the sacrificial gate electrode to define a gate electrode cavity beneath the surface. The gate electrode cavity is lined with a gate insulating layer. The lined gate electrode cavity is filled with a first insulated gate electrode. A second insulated gate electrode is also formed on a portion of the semiconductor substrate extending opposite the first insulated gate electrode so that a channel region of the field effect transistor extends between the first and second insulated gate electrodes. Source and drain regions are also formed adjacent opposite ends of the first and second insulated gate electrodes.

Abstract translation: 形成具有掩埋栅电极的场效应晶体管的方法包括以下步骤：形成半导体衬底，该半导体衬底具有掩埋在半导体衬底表面之下的牺牲栅电极，然后去除牺牲栅电极以在表面下方限定栅极电极腔。 栅极电极腔内衬有栅极绝缘层。 衬里的栅电极腔填充有第一绝缘栅电极。 第二绝缘栅电极也形成在半导体衬底的与第一绝缘栅极相对延伸的部分上，使得场效应晶体管的沟道区在第一和第二绝缘栅电极之间延伸。 源极和漏极区域也形成在第一和第二绝缘栅电极的相对端附近。

公开(公告)号：US20080070361A1

公开(公告)日：2008-03-20

申请号：US11898667

申请日：2007-09-14

Applicant: Kwang-Sub Yoon ,  Jung-Hyeon Lee ,  Bong-Cheol Kim ,  Se-Young Park

Inventor： Kwang-Sub Yoon ,  Jung-Hyeon Lee ,  Bong-Cheol Kim ,  Se-Young Park

IPC: H01L21/8242 ,  H01L21/02

CPC classification number: H01L28/91 ,  H01L27/10817 ,  H01L27/10852

Abstract: In a method of manufacturing a capacitor and a method of manufacturing a dynamic random access memory device, an insulating layer covering an upper portion of a conductive layer may be provided with an ozone gas so as to change the property of the upper portion of the insulating layer. The upper portion of the insulating layer may be chemically removed to expose the upper portion of the conductive layer. The exposed upper portion of the conductive layer may be removed so as to transform the conductive layer into a lower electrode. The remaining portion of the insulating layer may be removed, and an upper electrode may be formed on the lower electrode.

Abstract translation: 在制造电容器的方法和制造动态随机存取存储器件的方法中，覆盖导电层的上部的绝缘层可以设置有臭氧气体，以便改变绝缘材料的上部的性质 层。 可以化学去除绝缘层的上部以暴露导电层的上部。 可以去除暴露的导电层的上部，以便将导电层转变成下电极。 可以除去绝缘层的剩余部分，并且可以在下电极上形成上电极。

公开(公告)号：US20080069449A1

公开(公告)日：2008-03-20

申请号：US11898776

申请日：2007-09-14

Applicant: Sung-jung Cho ,  Young-hun Sung ,  Chang-kyu Choi ,  Kwang-hyeon Lee ,  Yeun-bae Kim

Inventor： Sung-jung Cho ,  Young-hun Sung ,  Chang-kyu Choi ,  Kwang-hyeon Lee ,  Yeun-bae Kim

IPC: G06K9/46 ,  H04N5/76

CPC classification number: H04N1/32101 ,  H04N2101/00 ,  H04N2201/3205 ,  H04N2201/3253 ,  H04N2201/3254

Abstract: An apparatus and method to tag ID in photos by utilizing geographical positions is provided. The apparatus to tag a photo with an ID based on a relative physical position includes a pose calculation module to calculate the pose of a camera in space photographing subjects, a photographing angle calculation module to calculate an angle at which each of the subjects is photographed, by using the calculated pose information and camera information, a coordinates calculation module to obtain the calculated photographing angle and the predetermined ID information of the subjects and to calculate the relative distance and coordinates between the subjects, a valid subject selection module to identify the subjects located within the photographing angle by using the calculated relative distance and coordinates, and an image tagging module to tag the photographed image ID information of the identified subjects.

Abstract translation: 提供了通过利用地理位置来标记照片中的ID的装置和方法。 用于基于相对物理位置标记具有ID的照片的装置包括：姿势计算模块，用于计算空间拍摄对象中的照相机的姿态，拍摄角度计算模块，用于计算拍摄每个被摄体的角度; 通过使用计算出的姿态信息和摄像机信息，坐标计算模块来获得所计算的拍摄角度和对象的预定ID信息，并且计算被摄体之间的相对距离和坐标，有效对象选择模块以识别位于 通过使用所计算的相对距离和坐标在拍摄角度内，以及图像标签模块来标记所识别的被摄体的拍摄图像ID信息。

公开(公告)号：US20080064135A1

公开(公告)日：2008-03-13

申请号：US11847691

申请日：2007-08-30

Applicant: Joo-Hyeon Lee

Inventor： Joo-Hyeon Lee

IPC: H01L31/18 ,  H01L21/306

CPC classification number: H01L27/14689 ,  H01L27/14601 ,  H01L27/1463 ,  H01L27/14643

Abstract: Embodiments relate to a method of manufacturing an image sensor which may include forming a gate pattern including a tunnel oxide film, an oxide-nitride-oxide (ONO) film, a floating gate and a control gate over a semiconductor substrate. An oxide film and a nitride film may be formed over the semiconductor substrate including the gate pattern. A photoresist pattern may be formed which covers the oxide film and the nitride film formed over the gate pattern. The nitride film may be etched in a region not covered by the photoresist pattern. The oxide film may be etched to have a predetermined thickness. A deep implant process may deeply implant an N-type dopant into the semiconductor substrate. Ashing and cleaning processes may remove the remaining photoresist pattern.

Abstract translation: 实施例涉及制造图像传感器的方法，其可以包括在半导体衬底上形成包括隧道氧化物膜，氧化物 - 氧化物 - 氧化物（ONO）膜，浮置栅极和控制栅极的栅极图案。 可以在包括栅极图案的半导体衬底上形成氧化物膜和氮化物膜。 可以形成覆盖氧化膜和在栅极图案上形成的氮化物膜的光致抗蚀剂图案。 可以在未被光致抗蚀剂图案覆盖的区域中蚀刻氮化物膜。 氧化膜可以被蚀刻以具有预定的厚度。 深注入工艺可以将N型掺杂剂深入注入到半导体衬底中。 灰化和清洁过程可以去除剩余的光致抗蚀剂图案。

公开(公告)号：US20080052660A1

公开(公告)日：2008-02-28

申请号：US11830265

申请日：2007-07-30

Applicant: Woo-seok SHIM ,  Moon-Hyun YOO ,  Chun-Suk SUH ,  Jung-Hyeon LEE ,  Ji-Suk HONG ,  Yong-Hee PARK

Inventor： Woo-seok SHIM ,  Moon-Hyun YOO ,  Chun-Suk SUH ,  Jung-Hyeon LEE ,  Ji-Suk HONG ,  Yong-Hee PARK

IPC: G03F1/00 ,  G06F17/50

CPC classification number: G03F1/36

Abstract: A method of correcting a design pattern of a mask takes into account the overlay margin between adjacent one of actual patterns that are stacked on a substrate. First, a pattern of a photomask for forming a first one of the actual patterns on a substrate is conceived. Also, information representing the image of a second one of the actual patterns is produced. Then, optical proximity correction (OPC) is performed on the first pattern based on the information. The information may be obtained by simulating the transcription of a photomask having a second pattern designed to form the second actual pattern, or by forming the second actual pattern and then capturing the image of the second actual pattern. Accordingly, a sufficient margin is provided between the second actual pattern and the first pattern on which the optical proximity correction has been performed.

Abstract translation: 校正掩模的设计图案的方法考虑了堆叠在基板上的相邻的一个实际图案之间的覆盖边缘。 首先，设想用于在基板上形成第一种实际图案的光掩模图案。 此外，产生表示第二实际图案的图像的信息。 然后，基于该信息对第一图案执行光学邻近校正（OPC）。 可以通过模拟具有被设计为形成第二实际图案的第二图案的光掩模的转录或通过形成第二实际图案然后捕获第二实际图案的图像来获得信息。 因此，在第二实际图案和已进行光学邻近校正的第一图案之间提供足够的余量。

公开(公告)号：US20080035991A1

公开(公告)日：2008-02-14

申请号：US11696541

申请日：2007-04-04

Applicant: Sang-Hyeon Lee ,  Kyoung-Ho Kim

Inventor： Sang-Hyeon Lee ,  Kyoung-Ho Kim

IPC: H01L31/00

CPC classification number: H01L27/10876 ,  H01L27/10823

Abstract: A semiconductor device includes an upper gate trench crossing an active region of a semiconductor substrate, a lower gate trench overlapping the upper gate trench at both ends, disposed at a lower level than the upper gate trench, and having a smaller width than the upper gate trench and wherein the lower gate trench is spaced apart from sidewalls of the upper gate trench. The semiconductor device further includes a gate pattern partially covering the bottom of the upper gate trench between the sidewall of the upper gate trench and the lower gate trench, filling the lower gate trench, and covering sidewalls of the active region adjacent to the bottom and sidewalls of the lower gate trench.

Abstract translation: 半导体器件包括与半导体衬底的有源区交叉的上栅极沟槽，与两栅极沟槽重叠的下栅极沟槽，其位于比上栅极沟槽低的位置处，并且具有比上栅极更小的宽度 沟槽，并且其中所述下栅极沟槽与所述上栅极沟槽的侧壁间隔开。 半导体器件还包括栅极图案，部分地覆盖上栅极沟槽的侧壁和下栅极沟槽之间的上栅极沟槽的底部，填充下栅极沟槽，并且覆盖邻近底部和侧壁的有源区的侧壁 的下栅极沟槽。