公开(公告)号：US08050084B2

公开(公告)日：2011-11-01

申请号：US12893413

申请日：2010-09-29

Applicant: Jun-Soo Bae ,  Kwang-Jin Lee ,  Beak-Hyung Cho

Inventor： Jun-Soo Bae ,  Kwang-Jin Lee ,  Beak-Hyung Cho

IPC: G11C11/00

CPC classification number: G11C8/12 ,  G11C7/04 ,  G11C11/5678 ,  G11C11/5685 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/004 ,  G11C2013/0054 ,  G11C2211/5634

Abstract: A nonvolatile memory device includes a memory cell array including a plurality of nonvolatile memory cells each having a resistance corresponding to one of a plurality of first resistance distributions, a temperature compensation circuit including one or more reference cells each having a resistance corresponding to one among one or more second resistance distributions, and a data read circuit including a compensation unit and a sense amplifier, the compensation unit being adapted to supply compensation current to a sensing node, an amount of the compensation current varying based on the resistance of each reference cell, and the sense amplifier being adapted to compare the level of the sensing node with a reference level and to output a comparison result.

Abstract translation: 非易失性存储器件包括存储单元阵列，其包括多个非易失性存储单元，每个非易失性存储单元具有对应于多个第一电阻分布之一的电阻，温度补偿电路包括一个或多个参考单元，每个参考单元具有对应于一个 或更多的第二电阻分布，以及包括补偿单元和读出放大器的数据读取电路，所述补偿单元适于向感测节点提供补偿电流，所述补偿电流的量基于每个参考单元的电阻而变化， 并且所述读出放大器适于将感测节点的电平与参考电平进行比较并输出比较结果。

公开(公告)号：US20110222330A1

公开(公告)日：2011-09-15

申请号：US13032848

申请日：2011-02-23

Applicant: Yong-Jun LEE ,  Kwang Jin LEE ,  Joon Min PARK ,  Huik Won SEO

Inventor： Yong-Jun LEE ,  Kwang Jin LEE ,  Joon Min PARK ,  Huik Won SEO

IPC: G11C17/00 ,  G11C11/00

CPC classification number: G11C17/18 ,  G11C11/005 ,  G11C13/0004 ,  G11C13/0059 ,  G11C2211/5641 ,  G11C2211/5646

Abstract: A nonvolatile memory device comprises a one-time-programmable (OTP) lock bit register. The nonvolatile memory device comprises a variable-resistance memory cell array comprising an OTP block that store data and a register that stores OTP lock state information indicating whether the data is changeable. The register comprises a variable memory cell. An initial value of the OTP lock state information is set to a program protection state.

Abstract translation: 非易失性存储器件包括一次性可编程（OTP）锁定位寄存器。 非易失性存储器件包括可变电阻存储单元阵列，其包括存储数据的OTP块和存储指示数据是否可更改的OTP锁定状态信息的寄存器。 寄存器包括可变存储单元。 OTP锁定状态信息的初始值被设置为程序保护状态。

公开(公告)号：US20110170334A1

公开(公告)日：2011-07-14

申请号：US13053471

申请日：2011-03-22

Applicant: Joon-Min PARK ,  Kwang-Jin LEE ,  Du-Eung KIM ,  Woo-Yeong CHO ,  Hui-Kwon SEO

Inventor： Joon-Min PARK ,  Kwang-Jin LEE ,  Du-Eung KIM ,  Woo-Yeong CHO ,  Hui-Kwon SEO

IPC: G11C11/00 ,  G11C11/14

CPC classification number: G11C13/0069 ,  G11C13/0004 ,  G11C2213/72

Abstract: Provided are a nonvolatile memory and related method of programming same. The nonvolatile memory includes a memory cell array with a plurality of nonvolatile memory cells and a write circuit. The write circuit is configured to write first logic state data to a first group of memory cells during a first program operation using an internally generated step-up voltage, and second logic state data to a second group of memory cells during a second program operation using an externally supplied step-up voltage.

Abstract translation: 提供了一种非易失性存储器及其相关编程方法。 非易失性存储器包括具有多个非易失性存储单元和写入电路的存储单元阵列。 写电路被配置为在第一程序操作期间使用内部产生的升压电压将第一逻辑状态数据写入第一组存储器单元，并且在第二程序操作期间将第二逻辑状态数据写入第二组存储器单元 外部提供的升压电压。

公开(公告)号：US07978539B2

公开(公告)日：2011-07-12

申请号：US12292891

申请日：2008-11-28

Applicant: Kwang Jin Lee ,  Byung Gil Choi

Inventor： Kwang Jin Lee ,  Byung Gil Choi

IPC: G11C7/22

CPC classification number: G11C8/10 ,  G11C8/12 ,  G11C13/00 ,  G11C13/0004 ,  G11C13/0023 ,  G11C13/0026 ,  G11C13/004 ,  G11C13/0061 ,  G11C13/0069 ,  G11C15/00 ,  G11C15/046 ,  G11C2013/0076

Abstract: In one embodiment, the semiconductor device includes a non-volatile memory cell array. Memory cells of the non-volatile memory cell array are resistance based, and each memory cell has a resistance that changes over time after data is written into the memory cell. A write address buffer is configured to store write addresses associated with data being written into the non-volatile memory cell array, and a read unit is configured to perform a read operation to read data from the non-volatile memory cell array. The read unit is configured to control a read current applied to the non-volatile memory cell array during the read operation based on whether a read address matches one of the stored write addresses and at least one indication of settling time of the data being written into the non-volatile memory cell array.

Abstract translation: 在一个实施例中，半导体器件包括非易失性存储单元阵列。 非易失性存储单元阵列的存储单元是基于电阻的，并且每个存储单元具有在将数据写入存储单元之后随时间而改变的电阻。 写地址缓冲器被配置为存储与被写入非易失性存储单元阵列的数据相关联的写地址，并且读单元被配置为执行读操作以从非易失性存储单元阵列读取数据。 读取单元被配置为基于读取地址是否匹配所存储的写入地址之一和写入的数据的建立时间的至少一个指示来控制在读取操作期间施加到非易失性存储器单元阵列的读取电流 非易失性存储单元阵列。

公开(公告)号：US20100192976A1

公开(公告)日：2010-08-05

申请号：US12669392

申请日：2008-08-11

Applicant: Kwang-Jin Lee ,  Sung-Hak Choi ,  Moo-Seok Lee

Inventor： Kwang-Jin Lee ,  Sung-Hak Choi ,  Moo-Seok Lee

IPC: B08B7/04 ,  B08B3/00

CPC classification number: B01D65/025 ,  B01D2321/02 ,  B01D2321/16

Abstract: Disclosed are an apparatus for cleaning a membrane module and a method therefor, which can minimize consumption of chemicals required to clean the membrane module while maximizing a recovery cleaning rate of the membrane module without completely stopping a water treatment operation. The cleaning apparatus includes a first flushing bath for flushing a membrane module transferred from a water treatment tank, and a first chemical cleaning bath for cleaning the membrane module, which has been completely flushed and transferred from the first flushing bath, by use of a first chemical solution.

Abstract translation: 公开了一种用于清洁膜组件的设备及其方法，其可以最大限度地提高膜组件的回收清洁率而不会完全停止水处理操作来最小化清洁膜组件所需的化学品的消耗。 清洗装置包括用于冲洗从水处理槽传送的膜组件的第一冲洗槽和用于清洗已经被完全冲洗并从第一冲洗槽传送的膜组件的第一化学清洗槽， 化学溶液。

公开(公告)号：US07751234B2

公开(公告)日：2010-07-06

申请号：US12168742

申请日：2008-07-07

Applicant: Kwang-Jin Lee ,  Du-Eung Kim ,  Sang-Beom Kang ,  Woo-Yeong Cho

Inventor： Kwang-Jin Lee ,  Du-Eung Kim ,  Sang-Beom Kang ,  Woo-Yeong Cho

IPC: G11C11/56

CPC classification number: G11C5/145 ,  G11C7/1078 ,  G11C7/1096 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0038 ,  G11C13/0069 ,  G11C2013/0078 ,  G11C2213/79

Abstract: A phase change memory device includes a memory cell having a phase change material, a write driver adapted to supply a program current to the memory cell during a programming interval, and a pump circuit adapted to enhance a current supply capacity of the write driver during the programming interval. The pump circuit is activated prior to the programming interval in response to an external control signal.

Abstract translation: 相变存储器件包括具有相变材料的存储单元，适于在编程间隔期间向存储单元提供编程电流的写入驱动器，以及用于在写入驱动器期间增强写入驱动器的电流供应容量的泵电路 编程间隔。 泵电路响应于外部控制信号在编程间隔之前被激活。

公开(公告)号：US07745536B2

公开(公告)日：2010-06-29

申请号：US11549214

申请日：2006-10-13

Applicant: Kwang-jin Lee ,  Jeong-heon Ahn ,  Hye-kyong Lee ,  Boo-ho Seo ,  Ji-min Lee

Inventor： Kwang-jin Lee ,  Jeong-heon Ahn ,  Hye-kyong Lee ,  Boo-ho Seo ,  Ji-min Lee

IPC: C08F30/08 ,  C08F30/00

CPC classification number: C08F265/04 ,  C08F257/02 ,  C08F265/06 ,  C08F283/00 ,  C08F283/12 ,  C08F285/00 ,  C08G77/442 ,  C08L51/04 ,  C08L51/08 ,  Y10S525/902 ,  Y10S525/903 ,  C08L2666/04 ,  C08L2666/02

Abstract: The present invention relates to an acryl-silicon rubber complex polymer which has a seed-core-shell structure wherein vinyl monomer and hydrophilic monomer are cross-linked on the seed; the acryl-silicon complex IPN core having an IPN (interpenetrating network) structure formed by radical polymerization of acryl monomer and hydrosilyation of silicon rubber in which silicon rubber particles are dispersed by being cross-linked to acryl rubber, in a continuous phase, is formed on the seed; and a shell prepared by graft-polymerization of C1-C4 alkyl methacrylate to the acryl-silicon complex IPN core is formed on the core, and a method of preparation and use of the same, thereby having excellent impact resistance, weatherability and gloss, so that it can be effectively used as an impact modifier for vinyl chloride resin.

Abstract translation: 本发明涉及具有种子 - 核 - 壳结构的丙烯酸 - 硅橡胶复合聚合物，其中乙烯基单体和亲水单体在种子上交联; 形成具有通过丙烯酸单体的自由基聚合形成的IPN（互穿网络）结构的丙烯酸 - 硅复合物IPN芯和通过在丙烯酸橡胶中连续相分散硅橡胶颗粒的硅橡胶的氢化作用 在种子上 并且在芯上形成通过将甲基丙烯酸C1-C4烷基酯接枝聚合而制备的壳及其制备和使用方法，从而具有优异的耐冲击性，耐候性和光泽度 它可以有效地用作氯乙烯树脂的抗冲击改性剂。

公开(公告)号：US20100125716A1

公开(公告)日：2010-05-20

申请号：US12617758

申请日：2009-11-13

Applicant: Kwang-jin Lee ,  Young-kug Moon ,  Kwang-ho Kim

Inventor： Kwang-jin Lee ,  Young-kug Moon ,  Kwang-ho Kim

IPC: G06F12/00

CPC classification number: G06F12/0215 ,  G06F12/0238 ,  G06F2212/7203 ,  G11C7/103 ,  G11C13/0004 ,  G11C13/004 ,  Y02D10/13

Abstract: A resistance variable memory device includes a resistance variable memory cell array, a data register that prefetches read data of the resistance variable memory cell array, a data output unit that receives the prefetched read data from the data register and outputs the received data, and a page mode setting unit that sets one of a first page mode and a second page mode as a page mode. In the first page mode, the data output unit sequentially reads the read data prefetched in the data register as page addresses are sequentially received, and in the second page mode, the data output unit sequentially reads the read data prefetched in the data register after a start page address among a plurality of page addresses has been received

Abstract translation: 电阻可变存储器件包括电阻可变存储单元阵列，预取电阻可变存储单元阵列的读取数据的数据寄存器，从数据寄存器接收预取的读取数据并输出接收的数据的数据输出单元，以及 页面模式设置单元，其将第一页面模式和第二页面模式之一设置为页面模式。 在第一页面模式中，数据输出单元顺序地读取在数据寄存器中预取的读取数据，因为顺序地接收页面地址，而在第二页面模式中，数据输出单元顺序地读取在数据寄存器中预读取的读取数据 已经接收到多个页地址中的起始页地址

公开(公告)号：US20100118593A1

公开(公告)日：2010-05-13

申请号：US12619016

申请日：2009-11-16

Applicant: Woo-Yeong Cho ,  Jong-Soo Seo ,  Young-Kug Moon ,  Jun-Soo Bae ,  Kwang-Jin Lee

Inventor： Woo-Yeong Cho ,  Jong-Soo Seo ,  Young-Kug Moon ,  Jun-Soo Bae ,  Kwang-Jin Lee

IPC: G11C11/00 ,  G11C7/04 ,  G11C7/02 ,  G11C8/00

CPC classification number: G11C13/0064 ,  G11C7/04 ,  G11C11/56 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0023 ,  G11C13/0026 ,  G11C13/004 ,  G11C13/0069 ,  G11C2013/0054 ,  G11C2013/0076 ,  G11C2013/0078 ,  G11C2213/72 ,  H01L27/2409 ,  H01L29/868 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/141 ,  H01L45/143 ,  H01L45/144 ,  H01L45/148

Abstract: A phase-change random access memory device is provided. The phase-change random access memory device includes a global bit line connected to a write circuit and a read circuit, multiple local bit lines, each being connected to multiple phase-change memory cells, and multiple column select transistors selectively connecting the global bit line with each of the multiple local bit lines, each column select transistor having a resistance that varies depending on its distance from the write circuit and the read circuit.

Abstract translation: 提供了相变随机存取存储器件。 相变随机存取存储器件包括连接到写入电路和读取电路的全局位线，每个连接到多个相变存储器单元的多个局部位线，以及选择性地连接全局位线的多个列选择晶体管 对于多个局部位线中的每一个，每个列选择晶体管具有根据其与写入电路和读取电路的距离而变化的电阻。

公开(公告)号：US07686955B2

公开(公告)日：2010-03-30

申请号：US10579194

申请日：2004-02-05

Applicant: Moo Seok Lee ,  Kwang Jin Lee ,  Yong Cheol Shin ,  Seong Hak Choi ,  Youn Tai Woo

Inventor： Moo Seok Lee ,  Kwang Jin Lee ,  Yong Cheol Shin ,  Seong Hak Choi ,  Youn Tai Woo

IPC: B01D63/02 ,  B01D61/00

CPC classification number: B01D69/04 ,  B01D63/02 ,  B01D63/027 ,  B01D65/08 ,  B01D2315/06 ,  B01D2321/185 ,  B01D2321/2058 ,  C02F1/44 ,  C02F1/444

Abstract: The present invention discloses a submerged hollow fiber membrane module which is of such a structure that it is easy to expand a module processing capability according to a treatment capacity, provides convenient module coupling properties and module manufacturing properties, maintains a stable flux under an efficient air diffusion condition and prevents the damage of membranes and water leakage caused by the loosening of module connecting regions. The submerged hollow fiber membrane module comprises [I] two module headers (2 and 2′) having a filtrate water collecting portion (3) for collecting filtrate water filtered through hollow fiber membranes and a filtrate water outlet (7), [II] an air diffusion unit 8 consisting of support tubes (9 and 9′) fixing the two module headers (2 and 2′) while keeping them spaced a predetermined distance and air diffusion tubes (11 and 11′) having air diffusion holes (13), and [III] a bundle of hollow fiber membranes (1) having both opposite ends fixed to the insides of the module headers (2 and 2′) by an adhesive (6) so as to form a water collecting space within the module headers (2 and 2′), the ends (5) of the hollow portions of the hollow fiber (20) membranes being opened and disposed in parallel to a filtrate water discharge surface (4).

Abstract translation: 本发明公开了一种浸没式中空纤维膜组件，其具有根据处理能力容易扩展模块加工能力的结构，提供了方便的模块耦合性能和模块制造性能，在有效空气下保持稳定的焊剂 扩散条件，防止模块连接区域松动引起的膜损伤和漏水。 浸没式中空纤维膜组件包括[I]两个具有滤液收集部分（3）的模块集管（2和2'），用于收集通过中空纤维膜过滤的滤液和滤液水出口（7），[II] 空气扩散单元8，其由支撑管（9和9'）组成，固定两个模块集管（2和2'），同时保持它们间隔预定距离，并具有空气扩散孔（13）的空气扩散管（11和11'）， 和[III]一束中空纤维膜（1），其两个相对端通过粘合剂（6）固定到模块集管（2和2'）的内部，以便在模块集管内形成集水空间（ 2和2'），中空纤维（20）膜的中空部分的端部（5）与滤液排水表面（4）平行地打开和设置。