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    Native lookup instruction for file-access processor searching a three-level lookup cache for variable-length keys
    42.
    发明授权
    Native lookup instruction for file-access processor searching a three-level lookup cache for variable-length keys 有权
    用于文件访问处理器的本地查找指令，用于搜索三级查找缓存中的可变长度密钥

    公开(公告)号：US07093099B2

    公开(公告)日：2006-08-15

    申请号：US10249359

    申请日：2003-04-02

    Applicant: Amod Bodas ,  Tarun Kumar Tripathy ,  Mehul Kharidia ,  Millind Mittal ,  J. Sukarno Mertoguno

    Inventor： Amod Bodas ,  Tarun Kumar Tripathy ,  Mehul Kharidia ,  Millind Mittal ,  J. Sukarno Mertoguno

    IPC: G06F12/06

    CPC classification number: H04L29/06 ,  H04L69/10 ,  H04L69/16 ,  H04L69/161 ,  H04L69/165

    Abstract: A processor natively executes lookup instructions. The lookup instruction is decoded to determine which general-purpose register (GPR) contains a pointer to a lookup key in a buffer. A variable-length key is read from the buffer and hashed to generate an index into a first-level cache and a hashed tag. An address of a bucket of entries for the index is generated and tags from these entries are read and compared to the hashed tag. When an entry matches the hashed tag, a second-level entry is read. A stored key from the second-level entry is compared to the input key to determine a match. The addresses of the matching second-level and first-level entries are written to GPR's specified by operands decoded from the lookup instruction. When the key or entry data is long, the second-level entry also contains a pointer to a key extension or data extension in a third-level cache.

    Abstract translation: 处理器本地执行查找指令。 查找指令被解码以确定哪个通用寄存器（GPR）包含指向缓冲器中的查找键的指针。 从缓冲区读取可变长度密钥，并将其散列，以生成第一级缓存和散列标记的索引。 生成用于索引的条目桶的地址，并且读取来自这些条目的标签并将其与散列标签进行比较。 当条目与散列标签匹配时，将读取第二级条目。 将来自二级条目的存储的密钥与输入密钥进行比较以确定匹配。 匹配的二级和一级条目的地址被写入由从查找指令解码的操作数指定的GPR。 当密钥或条目数据长时，第二级条目还包含指向第三级缓存中的密钥扩展或数据扩展的指针。

    Resetting a processor in an isolated execution environment
    46.
    发明授权
    Resetting a processor in an isolated execution environment 有权
    在独立的执行环境中重置处理器

    公开(公告)号：US06769058B1

    公开(公告)日：2004-07-27

    申请号：US09751586

    申请日：2000-12-29

    Applicant: Carl M. Ellison ,  Roger A. Golliver ,  Howard C. Herbert ,  Derrick C. Lin ,  Francis X. McKeen ,  Gilbert Neiger ,  James A. Sutton ,  Shreekant S. Thakkar ,  Millind Mittal ,  Ken Reneris

    Inventor： Carl M. Ellison ,  Roger A. Golliver ,  Howard C. Herbert ,  Derrick C. Lin ,  Francis X. McKeen ,  Gilbert Neiger ,  James A. Sutton ,  Shreekant S. Thakkar ,  Millind Mittal ,  Ken Reneris

    IPC: G06F900

    CPC classification number: G06F9/30076 ,  G06F1/24 ,  G06F9/45558 ,  G06F21/53 ,  G06F2009/45583 ,  G06F2009/45587

    Abstract: A method, apparatus, and system for invoking a reset process in response to a logical processor being individually reset is disclosed. When a last logical processor operating within a platform in an isolated execution mode and associated with an isolated area of memory is reset, it is reset without clearing a cleanup flag. Subsequently, an initializing physical processor invokes an initialization process that determines that the cleanup flag is set. The initialization process invokes the execution of a processor nub loader, and if the cleanup flag is set, the processor nub loader scrubs the isolated area of memory and invokes a controlled close for the initializing physical processor which clears the cleanup flag. The initializing physical processor then re-performs the initialization process. Upon the second iteration of the initialization process, with the cleanup flag not set, a new clean isolated area of memory is created for the initializing physical processor.

    Abstract translation: 公开了一种用于响应于逻辑处理器被单独复位来调用复位过程的方法，装置和系统。 当处于隔离执行模式并与存储器隔离区域相关联的最后一个逻辑处理器在平台内运行时，它将被复位而不清除清除标志。 随后，初始化物理处理器调用确定清除标志被设置的初始化过程。 初始化过程调用处理器nub加载程序的执行，并且如果设置了清除标志，则处理器nub加载器将擦除存储器的隔离区域，并调用初始化物理处理器的受控关闭，该物理处理器将清除清除标志。 然后，初始化物理处理器重新执行初始化过程。 在初始化过程的第二次迭代时，在清除标志未设置的情况下，将为初始化物理处理器创建一个新的干净的隔离区。

    Emptying packed data state during execution of packed data instructions
    48.
    发明授权
    Emptying packed data state during execution of packed data instructions 有权
    在打包数据指令执行期间清空打包数据状态

    公开(公告)号：US06266686B1

    公开(公告)日：2001-07-24

    申请号：US09262951

    申请日：1999-03-04

    Applicant: David Bistry ,  Larry Mennemeier ,  Alexander D. Peleg ,  Carole Dulong ,  Eiichi Kowashi ,  Millind Mittal ,  Benny Eitan

    Inventor： David Bistry ,  Larry Mennemeier ,  Alexander D. Peleg ,  Carole Dulong ,  Eiichi Kowashi ,  Millind Mittal ,  Benny Eitan

    IPC: G06F9302

    CPC classification number: G06F9/3013 ,  G06F9/30007 ,  G06F9/3001 ,  G06F9/30036 ,  G06F9/3004 ,  G06F9/30043 ,  G06F9/30076 ,  G06F9/30109 ,  G06F9/30112 ,  G06F9/30134

    Abstract: A method in a computer system which includes receiving a first instruction which indicates indicates termination of execution of instructions which operate upon packed data stored in a first storage area. The first storage area is used for modifying data responsive to execution of floating point instructions. A plurality of tags is associated with the first storage area indicating that locations in the first storage area are either empty or non-empty responsive to the execution of the floating point instructions which modify data contained in the first storage area. Responsive to the receiving of the first instruction which indicates termination of execution of instructions which operate upon the packed data stored in the first storage area, the method sets only the plurality of tags to an empty state. In different embodiments, setting of the plurality of tags to a non-empty state occurs responsive to receiving a second instruction. The second instruction (or instructions) specifies an operation upon packed data stored in the first storage area. The setting of the plurality of tags indicates execution of instructions which operate upon the packed data. This method advantageously provides a means for clearing the packed data state at the end of blocks of packed data instructions to leave the floating point state in a clear condition for subsequent operations (e.g. floating point calculations).

    Abstract translation: 一种计算机系统中的方法，包括接收指示的第一指令，指示对存储在第一存储区域中的压缩数据进行操作的指令的执行的终止。 第一个存储区域用于响应于浮点指令的执行来修改数据。 响应于修改包含在第一存储区域中的数据的浮点指令的执行，多个标签与第一存储区域相关联，指示第一存储区域中的位置是空的或非空的。 响应于接收指示终止对存储在第一存储区域中的打包数据进行操作的指令的第一指令，该方法仅将多个标签设置为空状态。 在不同的实施例中，响应于接收第二指令而发生多个标签的设置为非空状态。 第二指令（或指令）指定存储在第一存储区域中的压缩数据的操作。 多个标签的设置指示对打包数据进行操作的指令的执行。 该方法有利地提供了一种用于在打包数据指令的块结束时清除打包数据状态的装置，以使浮点状态处于用于后续操作（例如，浮点计算）的清楚状态。

    Method for executing instructions that operate on different data types stored in the same single logical register file
    49.
    发明授权
    Method for executing instructions that operate on different data types stored in the same single logical register file 失效
    用于执行对存储在同一单个逻辑寄存器文件中的不同数据类型进行操作的指令的方法

    公开(公告)号：US06170997B2

    公开(公告)日：2001-01-09

    申请号：US08898720

    申请日：1997-07-22

    Applicant: Andrew F. Glew ,  Larry M. Mennemeier ,  Alexander D. Peleg ,  David Bistry ,  Millind Mittal ,  Carole Dulong ,  Eiichi Kowashi ,  Benny Eitan ,  Derrik Lin ,  Romamohan R. Vakkalagadda

    Inventor： Andrew F. Glew ,  Larry M. Mennemeier ,  Alexander D. Peleg ,  David Bistry ,  Millind Mittal ,  Carole Dulong ,  Eiichi Kowashi ,  Benny Eitan ,  Derrik Lin ,  Romamohan R. Vakkalagadda

    IPC: G06F9302

    CPC classification number: G06F9/3017 ,  G06F9/30036 ,  G06F9/30101 ,  G06F9/30105 ,  G06F9/30109 ,  G06F9/30112 ,  G06F9/30134 ,  G06F9/30189 ,  G06F9/384 ,  G06F9/45533 ,  G06F9/462

    Abstract: A method for executing different sets of instructions that cause a processor to perform different data type operations in a manner that is invisible to various operating system techniques, that promotes good programming practices, and that is invisible to existing software conventions. According to one aspect of the invention, a data processing apparatus executes a first set of instructions of a first instruction type on what at least logically appears to software as a single logical register file. While the data processing apparatus is executing the first set of instructions, the single logical register file appears to be operated as a flat register file. In addition, the data processing apparatus executes a first instruction of a second instruction type using the logical register file. However, while the data processing apparatus is executing the first instruction, the logical register file appears to be operated as a stack referenced register file. Furthermore, the data processing apparatus alters all tags in a set of tags corresponding to the single logical register file to a non-empty state sometime between starting the execution of the first set of instructions and completing the execution of the first instruction. The tags identifying whether registers in the single logical register file are empty or non-empty.

    Abstract translation: 一种用于执行不同的指令集的方法，其使得处理器以对于各种操作系统技术是不可见的方式执行不同的数据类型操作，其促进良好的编程实践，并且对于现有的软件约定是不可见的。 根据本发明的一个方面，数据处理设备执行第一指令类型的第一组指令，至少在软件上逻辑上显示为单个逻辑寄存器文件。 当数据处理装置正在执行第一组指令时，单个逻辑寄存器文件似乎被操作为平坦寄存器文件。 此外，数据处理装置使用逻辑寄存器文件执行第二指令类型的第一指令。 然而，当数据处理装置正在执行第一指令时，逻辑寄存器文件似乎被操作为堆栈引用的寄存器文件。 此外，在开始执行第一组指令并完成第一指令的执行之前的某个时刻，数据处理装置将对应于单个逻辑寄存器文件的一组标签中的所有标签改变为非空状态。 识别单个逻辑寄存器文件中的寄存器是空还是非空的标签。

    Computer system performing a two-dimensional rotation of packed data representing multimedia information
    50.
    发明授权
    Computer system performing a two-dimensional rotation of packed data representing multimedia information 失效
    执行代表多媒体信息的打包数据的二维旋转的计算机系统

    公开(公告)号：US6018351A

    公开(公告)日：2000-01-25

    申请号：US961549

    申请日：1997-10-30

    Applicant: Larry M. Mennemeier ,  Alexander D. Peleg ,  Carole Dulong ,  Eiichi Kowashi ,  Millind Mittal ,  Benny Eitan

    Inventor： Larry M. Mennemeier ,  Alexander D. Peleg ,  Carole Dulong ,  Eiichi Kowashi ,  Millind Mittal ,  Benny Eitan

    IPC: G06F15/78 ,  G06T3/60 ,  G06F15/00

    CPC classification number: G06T3/60 ,  G06F15/7864

    Abstract: A computer system for processing multimedia data, wherein the data is transformed from a first domain to a second domain by performing two dimensional rotation on the data. The computer system includes a memory having stored therein a set of packed data sequences having data elements representing the digital data, and a sequence of instructions for transforming the digital data from a first domain to a second domain. The instructions, when executed, cause the processor to generate a first set of intermediate results in response to the execution of a first instruction which multiples data elements of a first packed data sequence with corresponding elements of a third packed data sequence, wherein the data elements of the third packed data sequence represent either a sine or cosine function. The instructions then cause the processor to generate a second set of intermediate results in response to the execution of a second instruction which multiplies the data elements of a second packed data sequence with corresponding data elements of a fourth packed data sequence, wherein the data elements of the fourth packed data sequence representing either a sine or cosine function. A set of first set of final results is generated in response to the execution of a third instruction which performs an arithmetic operation between corresponding data elements of the first and second sets of intermediate results. The final results represent the digital data transformed into the second domain.

    Abstract translation: 一种用于处理多媒体数据的计算机系统，其中通过对数据执行二维旋转，将数据从第一域变换到第二域。 计算机系统包括存储器，其中存储有具有表示数字数据的数据元素的一组打包数据序列，以及用于将数字数据从第一域变换到第二域的指令序列。 所述指令在被执行时使得所述处理器响应于第一指令的执行而产生第一组中间结果，所述第一指令将第一打包数据序列的数据元素与第三打包数据序列的相应元素相乘，其中所述数据元素 的第三打包数据序列表示正弦或余弦函数。 然后指令使处理器响应于第二指令的执行而产生第二组中间结果，第二指令将第二打包数据序列的数据元素与第四打包数据序列的对应数据元素相乘，其中数据元素 第四个压缩数据序列表示正弦或余弦函数。 响应于执行第一和第二组中间结果的相应数据元素之间的算术运算的第三指令的执行而产生一组第一组最终结果。 最终的结果代表了转换成第二个域的数字数据。

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