公开(公告)号：US11348834B2

公开(公告)日：2022-05-31

申请号：US16909333

申请日：2020-06-23

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Gregory Avenier ,  Alexis Gauthier ,  Pascal Chevalier

IPC: H01L21/20 ,  H01L21/8222 ,  H01L27/06 ,  H01L29/66 ,  H01L29/737 ,  H01L29/93 ,  H01L21/3105 ,  H01L21/8249

Abstract: A circuit includes at least one bipolar transistor and at least one variable capacitance diode. The circuit is fabricated using a method whereby the bipolar transistor and variable capacitance diode are jointly produced on a common substrate.

公开(公告)号：US11336853B2

公开(公告)日：2022-05-17

申请号：US17063192

申请日：2020-10-05

Applicant: STMicroelectronics (Crolles 2) SAS ,  STMicroelectronics (Research & Development) Limited

Inventor： Raul Andres Bianchi ,  Matteo Maria Vignetti ,  Bruce Rae

IPC: H04N5/3745 ,  H04N5/378

Abstract: The present disclosure relates to a device that includes a photodiode having a first terminal that is coupled by a resistor to a first rail configured to receive a high supply potential and a second terminal that is coupled by a switch to a second rail configured to receive a reference potential. A read circuit is configured to provide a pulse when the photodiode enters into avalanche, and a control circuit is configured to control an opening of the switch in response to a beginning of the pulse and to control a closing of the switch in response to an end of the pulse.

公开(公告)号：US20220149151A1

公开(公告)日：2022-05-12

申请号：US17584593

申请日：2022-01-26

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Alexis GAUTHIER ,  Pascal CHEVALIER ,  Gregory AVENIER

IPC: H01L29/06 ,  H01L29/66 ,  H01L29/732

Abstract: A device including a transistor is fabricated by forming a first part of a first region of the transistor through the implantation of dopants through a first opening. The second region of the transistor is then formed in the first opening by epitaxy.

公开(公告)号：US11327346B2

公开(公告)日：2022-05-10

申请号：US16539503

申请日：2019-08-13

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Charles Baudot

IPC: G02F1/025 ,  G02F1/01 ,  G02F1/017 ,  G02F1/225 ,  H01L21/02 ,  B82Y20/00

Abstract: In one embodiment, an electro-optical modulator includes a waveguide having a first major surface and a second major surface opposite the first major surface. A cavity is disposed in the waveguide. Multiple quantum wells are disposed in the cavity.

公开(公告)号：US20220130728A1

公开(公告)日：2022-04-28

申请号：US17568500

申请日：2022-01-04

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Pascal CHEVALIER ,  Alexis GAUTHIER ,  Gregory AVENIER

IPC: H01L21/8222 ,  H01L21/265 ,  H01L27/06 ,  H01L29/06 ,  H01L29/66 ,  H01L29/737 ,  H01L29/93

Abstract: At least one bipolar transistor and at least one variable capacitance diode are jointly produced by a method on a common substrate.

公开(公告)号：US20220122969A1

公开(公告)日：2022-04-21

申请号：US17503621

申请日：2021-10-18

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Edoardo BREZZA ,  Alexis GAUTHIER

IPC: H01L27/082 ,  H01L29/737 ,  H01L21/265 ,  H01L21/225 ,  H01L29/66 ,  H01L21/8222

Abstract: A bipolar transistor includes a collector region having a first doped portion located in a substrate and a second doped portion covering and in contact with an area of the first doped portion. The collector region has a doping profile having a peak in the first portion and a decrease from this peak up to in the second portion.

公开(公告)号：US20220091330A1

公开(公告)日：2022-03-24

申请号：US17540626

申请日：2021-12-02

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Frederic BOEUF ,  Charles BAUDOT

IPC: G02B6/12 ,  G02B6/30 ,  G02B6/124 ,  G02B6/122 ,  G02B6/126 ,  G02B6/27

Abstract: A three-dimensional photonic integrated structure includes a first semiconductor substrate and a second semiconductor substrate. The first substrate incorporates a first waveguide and the second semiconductor substrate incorporates a second waveguide. An intermediate region located between the two substrates is formed by a one dielectric layer. The second substrate further includes an optical coupler configured for receiving a light signal. The first substrate and dielectric layer form a reflective element located below and opposite the grating coupler in order to reflect at least one part of the light signal.

公开(公告)号：US11251175B2

公开(公告)日：2022-02-15

申请号：US16562963

申请日：2019-09-06

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Alexandre Ayres ,  Bertrand Borot

IPC: H01L27/32 ,  H01L27/02 ,  G06F30/39 ,  G06F30/394 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532 ,  H01L27/088

Abstract: A three-dimensional integrated structure is formed by a first substrate with first components oriented in a first direction and a second substrate with second components oriented in a second direction. An interconnection level includes electrically conducting tracks that run in a third direction. One of the second direction and third direction forms a non-right and non-zero angle with the first direction. An electrical link formed by at least one of the electrically conducting tracks electrically connected two points of the first or of the second components.

公开(公告)号：US20220013681A1

公开(公告)日：2022-01-13

申请号：US17486219

申请日：2021-09-27

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Charles BAUDOT ,  Sebastien CREMER ,  Nathalie VULLIET ,  Denis PELLISSIER-TANON

IPC: H01L31/109 ,  H01L31/18 ,  H01L31/0232 ,  H01L31/028 ,  H01L31/105

Abstract: A photodiode includes an active area formed by intrinsic germanium. The active area is located within a cavity formed in a silicon layer. The cavity is defined by opposed side walls which are angled relative to a direction perpendicular to a bottom surface of the silicon layer. The angled side walls support epitaxial growth of the intrinsic germanium with minimal lattice defects.

公开(公告)号：US20220005850A1

公开(公告)日：2022-01-06

申请号：US17363345

申请日：2021-06-30

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Alain INARD ,  Marios BARLAS

IPC: H01L27/146 ,  H01L31/0232

Abstract: An optoelectronic device includes a photodiode. At least a portion of an active area of the photodiode is separated from a neighboring photodiode by a first wall including a conductive core and an insulating sheath and by a second optical insulation wall. The first wall and second optical insulation wall further extend parallel to each other and separate the active area from a memory area of the photodiode.