公开(公告)号：US20110263338A1

公开(公告)日：2011-10-27

申请号：US13141981

申请日：2009-11-09

Applicant: Satoshi Horie ,  Atsushi Ueno ,  Toru Mori ,  Yuichiro Murotsuka ,  Masahiro Mihara

Inventor： Satoshi Horie ,  Atsushi Ueno ,  Toru Mori ,  Yuichiro Murotsuka ,  Masahiro Mihara

IPC: A63F13/10

CPC classification number: A63F1/04 ,  A63F2009/2407 ,  A63F2009/241 ,  A63F2009/2438 ,  A63F2009/2458 ,  A63F2009/246 ,  A63F2009/2486

Abstract: To provide a game device that can reduce the size of the device and can execute the simulation of a match game scene based on an operation input by a game player.A field panel 9 imitating a field of a sporting event, card holding stages 10 that are arranged in the locations indicating the positions of players in the sporting event on the field panel 9, and holding card 11 in a raised state, a card information reading means for reading card information recorded on the cards 11 held by the card holding stages 10, and a game execution control means for controlling the execution of a game are provided. Further, the game execution control means includes a means for controlling, based on the card information read by the card information reading means, the execution of the simulation of the match game scene, which is displayed on the touch panel 6 based on the operation by the game player, to be a predetermined number of times that is set in advance.

Abstract translation: 提供可以减小设备尺寸并且可以基于游戏者输入的操作来执行匹配游戏场景的模拟的游戏装置。 模拟体育赛事的场地的场地面板9，布置在场​​地面板9上的运动事件中的玩家的位置的位置的卡片保持台10以及升起的状态下的卡11，卡片信息读取 用于读取由卡保持台10保持的卡片11上记录的卡信息的装置，以及用于控制游戏执行的游戏执行控制装置。 此外，游戏执行控制装置包括一种装置，用于根据由卡片信息读取装置读取的卡片信息，根据触摸板6的操作显示在游戏场景中的模拟， 该游戏者为预先设定的预定次数。

公开(公告)号：US20050205935A1

公开(公告)日：2005-09-22

申请号：US11134391

申请日：2005-05-23

Applicant: Toru Mori

Inventor： Toru Mori

IPC: H01L21/28 ,  H01L21/3205 ,  H01L21/336 ,  H01L23/52 ,  H01L29/417 ,  H01L29/786 ,  H01L21/00

CPC classification number: H01L29/66772 ,  H01L29/41733 ,  H01L29/78639 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A manufacturing method for an SOI semiconductor device includes creating transistors and an element isolation region on a semiconductor layer in an SOI substrate. The method also includes covering the transistors and the element isolation region with a first insulation film. The method also includes creating a first opening section which penetrates the first insulation film, element isolation region and a buried oxide film to expose the support substrate. The method also includes creating a first source interconnect, first drain interconnect and first gate interconnect which are electrically connected to the transistors, on the second insulation film. The method also includes forming dummy interconnects which are connected with these interconnects, and are electrically connected with the support substrate via the first opening section, on the second insulation film. The method also includes disconnecting the dummy interconnects to electrically insulate the first source interconnect, first drain interconnect and first gate interconnect from the support substrate.

Abstract translation: SOI半导体器件的制造方法包括在SOI衬底中的半导体层上产生晶体管和元件隔离区域。 该方法还包括用第一绝缘膜覆盖晶体管和元件隔离区域。 该方法还包括形成穿透第一绝缘膜，元件隔离区域和掩埋氧化膜以暴露支撑衬底的第一开口部分。 该方法还包括在第二绝缘膜上形成电连接到晶体管的第一源极互连，第一漏极互连和第一栅极互连。 该方法还包括形成与这些互连连接的虚拟互连件，并且经由第一开口部分在第二绝缘膜上与支撑基板电连接。 该方法还包括断开虚拟互连以将第一源互连，第一漏互连和第一栅互连与支撑衬底电绝缘。

公开(公告)号：US06703705B2

公开(公告)日：2004-03-09

申请号：US09996054

申请日：2001-11-28

Applicant: Takao Yamazaki ,  Toru Mori ,  Akinobu Shibuya ,  Shintaro Yamamichi ,  Yuzo Shimada

Inventor： Takao Yamazaki ,  Toru Mori ,  Akinobu Shibuya ,  Shintaro Yamamichi ,  Yuzo Shimada

IPC: H01L2352

CPC classification number: H01L24/81 ,  H01L23/50 ,  H01L23/642 ,  H01L24/73 ,  H01L2224/13144 ,  H01L2224/16 ,  H01L2224/81801 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01073 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/30105 ,  H01L2924/30107

Abstract: A semiconductor device has an LSI device provided with a plurality of power supply line connection pads and ground line connection pad in a peripheral edge part of a circuit-formation surface, metal foil leads 5 electrically connected to each of the pads and adhered to the LSI device via an insulation layer, and decoupling capacitors mounted on one surface of the metal foil leads.

Abstract translation: 半导体器件具有在电路形成面的周边部分设置有多个电源线连接焊盘和接地线连接焊盘的LSI器件，电连接到每个焊盘并粘附到LSI的金属箔引线5 通过绝缘层的器件，以及安装在金属箔引线的一个表面上的去耦电容器。

公开(公告)号：US5904911A

公开(公告)日：1999-05-18

申请号：US31763

申请日：1998-02-27

Applicant: Toru Mori ,  Atsushi Ochi ,  Shinji Ito ,  Hiroshi Ishikawa ,  Tadahiko Horiguchi

Inventor： Toru Mori ,  Atsushi Ochi ,  Shinji Ito ,  Hiroshi Ishikawa ,  Tadahiko Horiguchi

IPC: C04B35/00 ,  C01G45/00 ,  C01G45/02 ,  C01G53/00 ,  H01B3/12 ,  H01G4/12 ,  C01B13/14 ,  C01G49/00 ,  H01M4/50 ,  C01F13/14

CPC classification number: C01G41/006 ,  C01G45/006 ,  C01G45/125 ,  C01G53/006 ,  H01G4/1209 ,  C01P2002/34 ,  C01P2002/52 ,  C01P2002/72 ,  C01P2004/20 ,  C01P2004/61 ,  C01P2006/40

Abstract: There are herein disclosed a raw material for a complex perovskite ceramic composition which is intended to uniformly disperse a trace amount of an addition component (manganese) therein, and a process for preparing the ceramic composition.A manganese-containing composite oxide is represented by the general formula (Mn.sub.a MeI.sub.1-a)MeII.sub.b O.sub.c wherein a is a value in the range of 0

Abstract translation: 本文公开了用于均匀分散微量添加成分（锰）的复合钙钛矿陶瓷组合物的原料及其制备方法。 含锰复合氧化物由通式（MnaMeI-a）MeIIbOc表示，其中+ E，uns a + EE是在0 <+ E，uns a +EE≤0.3的范围内的值; MeI是Mg，Ni和Zn中的至少一种; MeII是Nb，Ta和W之一; 当MeII是Nb或Ta，+ E时，uns b + EE是2和+ E，uns c + EE是6，或者当MeII是W，+ E时，uns b + EE是1和+ E，uns c + EE 通过使用含有该含锰复合氧化物的原料，可以制备含Mn的复合钙钛矿化合物组合物，其含有Mn和至少一种由通式Pb（BIBII）表示的复合钙钛矿化合物， 其中BI是Mg，Ni和Zn之一; BII是Nb，Ta和W之一。

公开(公告)号：US5356755A

公开(公告)日：1994-10-18

申请号：US046368

申请日：1993-04-13

Applicant: Hideki Matsuda ,  Jiro Sato ,  Toru Mori

Inventor： Hideki Matsuda ,  Jiro Sato ,  Toru Mori

IPC: G03F7/004 ,  B32B15/08 ,  B32B27/00 ,  G03F7/027 ,  H05K3/00 ,  H05K3/06 ,  H05K3/42 ,  G03F7/038

CPC classification number: H05K3/0094 ,  H05K2203/1394 ,  H05K3/064 ,  H05K3/427

Abstract: Method for producing printed circuit board using a photocurable resin laminate comprising a support and a photocurable resin layer disposed on one surface of said support, said photocurable resin layer having:(a) a viscosity of from 10.sup.4 to 5.times.10.sup.5 poises as measured at 90.degree. C.;(b) a thickness of from 30 to 150 .mu.m; and(c) an ultraviolet ray transmittance of from 40 to 95% with respect to ultraviolet rays having a wavelength of 365 nm.When this photocurable resin laminate is laminated under pressure on both surfaces of a metal-clad insulting base board having through-holes of an inner diameter smaller than 0.5 mm so that both surfaces of the metal-clad insulating base board are covered with the photocurable layer of the photocurable resin laminate, the photocurable resin layer intrudes locally in the inner side of the inner circumferential edge of both terminal openings of each through-hole and extends from the inner circumferential edge along and on the inner wall of the through-hole to a predetermined depth. By the light exposure of such a laminate structure and the subsequent development, both terminal openings of each through-hole can be completely covered with a photocured resin layer without occurrence of coverage failure, wherein a photocured resin layer adhering to the inner wall of the through-hole is formed in the through-hole from the inner circumferential edge of the terminal opening thereof along and on the inner wall of the through-hole.

Abstract translation: 使用光固化树脂层叠体制造印刷电路板的方法，其包含支撑体和设置在所述载体的一个表面上的光固化树脂层，所述光固化树脂层具有：（a）在90℃下测量的粘度为104至5×10 5泊 。 （b）厚度为30〜150μm; 和（c）相对于波长365nm的紫外线的紫外线透射率为40〜95％。 当该光固化树脂层压体在具有内径小于0.5mm的通孔的金属包覆绝缘基板的两个表面上被层压时，使金属包覆绝缘基板的两个表面被光固化层覆盖 的光固化性树脂层叠体中，光固化性树脂层局部地侵入贯通孔的两个端口的内周缘的内侧，并且从内周缘沿着通孔的内壁延伸到 预定深度。 通过这种层压结构的曝光和随后的显影，每个通孔的两个端子开口可以完全被光固化树脂层覆盖，而不会发生覆盖不良，其中光固化树脂层粘附到通孔的内壁 在贯通孔的内周缘上形成有贯通孔，其通孔的端面开口的内周缘沿通孔的内壁形成。