利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

49 条记录 (耗时 0.021 秒)

    Dispenser
    41.
    发明授权
    Dispenser 有权
    分配器

    公开(公告)号：US08960514B2

    公开(公告)日：2015-02-24

    申请号：US13389785

    申请日：2010-07-20

    申请人： Yong-jun Lee

    发明人： Yong-jun Lee

    IPC分类号： B65H35/10 ,  A47K10/38

    CPC分类号： A47K10/3827 ,  A47K2010/3881 ,  Y10T225/238

    摘要： The present invention relates to a dispenser for supplying a disposable paper product of a roll type such as a toilet paper, a hand towel and etc. The dispenser has a main body casing which accommodates the paper product and has a rotating shaft supporting the paper product to be rotatable and a discharging part for discharging the paper product, and a wet type cutting unit which is located at the discharging part to provide liquid to a part of the paper product that is to be cut. Liquid is provided to an area of the paper product to be cut, so that the paper product can be easily cut with a relatively small force.

    摘要翻译： 本发明涉及一种用于供应诸如卫生纸，手巾等的卷筒纸的一次性纸制品的分配器。分配器具有容纳纸制品的主体外壳，并且具有支撑纸制品的旋转轴 以及用于排出纸制品的排出部分，以及位于排出部分处以向待切割的纸制品的一部分提供液体的湿式切割单元。 液体被提供到要切割的纸制品的区域，使得纸制品可以以相对较小的力容易地切割。

    Flash memory device and method for fabricating the same
    43.
    发明授权
    Flash memory device and method for fabricating the same 失效
    闪存装置及其制造方法

    公开(公告)号：US07875924B2

    公开(公告)日：2011-01-25

    申请号：US12203951

    申请日：2008-09-04

    申请人： Yong-Jun Lee

    发明人： Yong-Jun Lee

    IPC分类号： H01L29/00

    CPC分类号： H01L27/105 ,  H01L27/1052 ,  H01L27/11568 ,  H01L27/11573

    摘要： An embedded flash memory device and a method for fabricating the same which reduces the size of a memory device using logic CMOS fabricating processes and enhancing a coupling ratio of the memory device. The flash memory device includes a coupling oxide layer on an active area of a semiconductor substrate, a first control gate formed on and/or over the coupling oxide layer and a second control gate formed on and/or over and enclosing lateral sidewalls of the coupling oxide layer and the first control gate.

    摘要翻译： 一种嵌入式闪存器件及其制造方法，其使用逻辑CMOS制造工艺减小存储器件的尺寸并增强存储器件的耦合比。 闪存器件包括在半导体衬底的有效区域上的耦合氧化物层，形成在耦合氧化物层上和/或上的耦合氧化物层上的第一控制栅极和形成在耦合器的侧壁和/ 氧化物层和第一控制栅极。

    Nonvolatile memory device and method for controlling word line or bit line thereof
    45.
    发明申请
    Nonvolatile memory device and method for controlling word line or bit line thereof 有权
    用于控制字线或其位线的非易失性存储器件和方法

    公开(公告)号：US20100284221A1

    公开(公告)日：2010-11-11

    申请号：US12659690

    申请日：2010-03-17

    申请人： Joon-Yong Choi ,  Byunggil Choi ,  Yu Hwan Ro ,  Yong-Jun Lee

    发明人： Joon-Yong Choi ,  Byunggil Choi ,  Yu Hwan Ro ,  Yong-Jun Lee

    IPC分类号： G11C16/04

    CPC分类号： G11C16/08

    摘要： A nonvolatile memory device includes global selection lines, local selection lines, a first selection circuit, and a second selection circuit. The local lines correspond respectively to the global selection lines. The first selection circuit is configured to connect to the global selection lines to select the global selection lines. The second selection circuit is connected between the global selection lines and the local selection lines and is configured to select the local selection lines. The first selection circuit is configured to select at least one global selection line, and the second selection circuit is configured to select the local selection lines corresponding to the selected global selection line while the at least one global selection line is continuously activated.

    摘要翻译： 非易失性存储器件包括全局选择线，局部选择线，第一选择电路和第二选择电路。 本地线分别对应于全局选择线。 第一选择电路被配置为连接到全局选择线以选择全局选择线。 第二选择电路连接在全局选择线和本地选择线之间，并被配置为选择本地选择线。 第一选择电路被配置为选择至少一个全局选择线，并且第二选择电路被配置为在连续激活至少一个全局选择线的同时选择与所选择的全局选择线对应的本地选择线。

    Method of manufacturing split gate type non-volatile memory device
    47.
    发明授权
    Method of manufacturing split gate type non-volatile memory device 有权
    分闸式非易失性存储器件的制造方法

    公开(公告)号：US07488649B2

    公开(公告)日：2009-02-10

    申请号：US11645739

    申请日：2006-12-27

    申请人： Yong Jun Lee

    发明人： Yong Jun Lee

    IPC分类号： H01L21/336

    CPC分类号： H01L27/115 ,  H01L27/11521

    摘要： A method of manufacturing a split gate type non-volatile memory device includes the steps of defining an active region on a semiconductor substrate; forming a pair of first conductive film patterns, each having an electric charge storage layer interposed between the substrate and the first conductive film pattern, on the active region; forming a second conductive film on top of the first conductive film patterns and a remainder of the active region; etchbacking the entire surface of the second conductive film to planarize a top of the second conductive film formed between the first conductive film patterns; forming a photoresist pattern, with an opening corresponding to the active region between the first conductive film patterns, on the second conductive film; and forming a pair of split gates each having one of the first conductive film patterns and a second conductive film pattern formed by patterning the second conductive film using the photoresist pattern as an etching mask.

    摘要翻译： 分离栅型非易失性存储器件的制造方法包括以下步骤：在半导体衬底上限定有源区; 形成一对第一导电膜图案，每个第一导电膜图案在活性区域上具有介于基板和第一导电膜图案之间的电荷存储层; 在所述第一导电膜图案的顶部和所述有源区的其余部分上形成第二导电膜; 回蚀所述第二导电膜的整个表面以平坦化形成在所述第一导电膜图案之间的所述第二导电膜的顶部; 在所述第二导电膜上形成具有对应于所述第一导电膜图案之间的有源区的开口的光致抗蚀剂图案; 以及形成一对分离栅极，每个分离栅极具有第一导电膜图案之一和通过使用光致抗蚀剂图案将蚀刻掩模图案化第二导电膜而形成的第二导电膜图案。

    Method of manufacturing non-volatile memory device
    48.
    发明申请
    Method of manufacturing non-volatile memory device 失效
    制造非易失性存储器件的方法

    公开(公告)号：US20070148868A1

    公开(公告)日：2007-06-28

    申请号：US11643880

    申请日：2006-12-22

    申请人： Yong Jun Lee

    发明人： Yong Jun Lee

    IPC分类号： H01L21/336

    CPC分类号： H01L21/28282 ,  H01L29/4234 ,  H01L29/792

    摘要： A method of manufacturing a non-volatile memory device includes the steps of: defining an active region on a semiconductor substrate; forming a charge storage layer on the active region; forming a first conductive pattern on the charge storage layer, wherein the first conductive pattern has a bottom portion larger in width than a top portion thereof, the first conductive pattern further having a sloping sidewall connecting the top and bottom portions; forming an oxide layer on the sidewall of the first conductive pattern; forming a conformal second conductive layer on the first conductive pattern and on the active region around the first conductive pattern; and patterning the first conductive pattern and the second conductive layer to form a pair of first electrodes and a pair of second electrodes, respectively.

    摘要翻译： 制造非易失性存储器件的方法包括以下步骤：在半导体衬底上限定有源区; 在有源区上形成电荷存储层; 在所述电荷存储层上形成第一导电图案，其中所述第一导电图案具有宽度大于其顶部的底部，所述第一导电图案还具有连接所述顶部和底部的倾斜侧壁; 在第一导电图案的侧壁上形成氧化物层; 在所述第一导电图案上以及围绕所述第一导电图案的所述有源区上形成保形第二导电层; 以及图案化所述第一导电图案和所述第二导电层，以分别形成一对第一电极和一对第二电极。