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    Alternate-logic head-to-head gate driver on array
    45.
    发明授权
    Alternate-logic head-to-head gate driver on array 有权

    公开(公告)号：US10769982B2

    公开(公告)日：2020-09-08

    申请号：US16234127

    申请日：2018-12-27

    Applicant: Apple Inc.

    Inventor： Rungrot Kitsomboonloha ,  Szu-Hsien Lee

    IPC: G09G3/20 ,  G09G3/3266 ,  G09G3/36

    Abstract: The disclosure is related to head-to-head (H2H) gate on arrays (GOA) for pixel-based displays that may have reduced dimensions. In the described embodiments, the H2H design with alternate logic may be used to drive groups of pixels (e.g., a pixel row or column) with a primary and a secondary driver, located in opposite ends of the bezel of the electronic device. In the alternate-logic design, a shared shift-register may be used to enable two rows or columns. Embodiments in which more than two rows or columns are controlled by a single shift register are also described.

    Clock and signal distribution circuitry for displays
    46.
    发明授权
    Clock and signal distribution circuitry for displays 有权

    公开(公告)号：US10354607B2

    公开(公告)日：2019-07-16

    申请号：US15684109

    申请日：2017-08-23

    Applicant: Apple Inc.

    Inventor： Kwang Soon Park ,  Pei-En Chang ,  Szu-Hsien Lee

    IPC: G09G3/36 ,  G09G3/3233

    Abstract: A display may have an array of pixels. Rows of pixels may receive gate line signals over gate lines. Display driver circuitry may have an adjustable clock generator that generates a series of clock pulses with different respective fall times to help equalize kickback voltages in the pixels of different rows. Within each row, gate lines may be provided with multiple parallel lines shorted at a series of tap points to help equalize kickback voltages across the pixels of different columns. A clock path may be formed between the clock generator and gate driver circuits. The clock path may run along an edge of the array of pixels. To help equalize kickback voltages in the pixels of different rows, the clock path may have first and second parallel metal lines that are selectively shorted to each other at a series of tap point locations along the clock path.

    MULTI-ZONED VARIABLE VCOM CONTROL
    48.
    发明申请
    MULTI-ZONED VARIABLE VCOM CONTROL 审中-公开
    多区可变VCOM控制

    公开(公告)号：US20170061864A1

    公开(公告)日：2017-03-02

    申请号：US15246666

    申请日：2016-08-25

    Applicant: Apple Inc.

    Inventor： Howard H. Tang ,  Paolo Sacchetto ,  Chaohao Wang ,  Szu-Hsien Lee ,  Patrick Bennett ,  Fenghua Zheng

    IPC: G09G3/20

    CPC classification number: G09G3/2096 ,  G09G3/3655 ,  G09G3/3666 ,  G09G2300/0426 ,  G09G2310/0291 ,  G09G2320/0223 ,  G09G2320/0233 ,  G09G2320/0257 ,  G09G2320/0266

    Abstract: The disclosure relates to systems and methods for reducing VCOM settling periods. A number of pixels is sub-divided into a plurality of regions. The pixels are configured to transmit light. A common voltage (VCOM) driving circuit is configured to drive a common electrode of the pixels. Moreover, each of a number of VCOM driving circuits includes a variable resistor configured to be driven to a resistance level based at least in part on which region of the plurality of regions includes an active pixel within the region. Furthermore, a resistance level is set and based at least in part on where the active pixel is located.

    Abstract translation: 本公开涉及用于减少VCOM建立周期的系统和方法。 多个像素被细分为多个区域。 像素被配置为透射光。 公共电压（VCOM）驱动电路被配置为驱动像素的公共电极。 此外，多个VCOM驱动电路中的每一个包括被配置为至少部分地基于该区域中的有源像素的多个区域的哪个区域被驱动到电阻电平的可变电阻器。 此外，设置电阻水平并且至少部分地基于活动像素位于何处。

    Display driver circuitry for liquid crystal displays with semiconducting-oxide thin-film transistors
    49.
    发明授权
    Display driver circuitry for liquid crystal displays with semiconducting-oxide thin-film transistors 有权
    用半导体氧化物薄膜晶体管显示液晶显示器的驱动电路

    公开(公告)号：US09412799B2

    公开(公告)日：2016-08-09

    申请号：US14228098

    申请日：2014-03-27

    Applicant: Apple Inc.

    Inventor： Shih Chang Chang ,  Ming-Chin Hung ,  Cheng-Ho Yu ,  Ting-Kuo Chang ,  Kyung-Wook Kim ,  Chun-Yao Huang ,  Szu-Hsien Lee ,  Yu-Cheng Chen ,  Hiroshi Osawa

    IPC: G06F3/038 ,  H01L27/32 ,  H01L27/12 ,  G09G3/36 ,  G02F1/1368 ,  G09G3/32 ,  G02F1/1362

    CPC classification number: H01L27/3262 ,  G02F1/13454 ,  G02F1/13624 ,  G02F1/1368 ,  G02F2001/13685 ,  G02F2202/104 ,  G09G3/3225 ,  G09G3/3611 ,  G09G3/3677 ,  G09G2320/043 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/1251 ,  H01L27/1255

    Abstract: An electronic device may include a display having an array of display pixels on a substrate. The display pixels may be organic light-emitting diode display pixels or display pixels in a liquid crystal display. In an organic light-emitting diode display, hybrid thin-film transistor structures may be formed that include semiconducting oxide thin-film transistors, silicon thin-film transistors, and capacitor structures. The capacitor structures may overlap the semiconducting oxide thin-film transistors. Organic light-emitting diode display pixels may have combinations of oxide and silicon transistors. In a liquid crystal display, display driver circuitry may include silicon thin-film transistor circuitry and display pixels may be based on oxide thin-film transistors. A single layer or two different layers of gate metal may be used in forming silicon transistor gates and oxide transistor gates. A silicon transistor may have a gate that overlaps a floating gate structure.

    Abstract translation: 电子设备可以包括在基板上具有显示像素阵列的显示器。 显示像素可以是液晶显示器中的有机发光二极管显示像素或显示像素。 在有机发光二极管显示器中，可以形成包括半导体氧化物薄膜晶体管，硅薄膜晶体管和电容器结构的混合薄膜晶体管结构。 电容器结构可以与半导体氧化物薄膜晶体管重叠。 有机发光二极管显示像素可以具有氧化物和硅晶体管的组合。 在液晶显示器中，显示驱动器电路可以包括硅薄膜晶体管电路，显示像素可以基于氧化物薄膜晶体管。 可以在形成硅晶体管栅极和氧化物晶体管栅极中使用单层或两层不同的栅极金属层。 硅晶体管可以具有与浮动栅极结构重叠的栅极。

    Pixel Architecture for Electronic Displays
    50.
    发明申请
    Pixel Architecture for Electronic Displays 审中-公开
    电子显示器像素架构

    公开(公告)号：US20130335658A1

    公开(公告)日：2013-12-19

    申请号：US13629524

    申请日：2012-09-27

    Applicant: APPLE INC.

    Inventor： Chun-Yao Huang ,  Kyung Wook Kim ,  Shih Chang Chang ,  Szu-Hsien Lee ,  Young Bae Park

    IPC: G02F1/136

    CPC classification number: G09G3/3648 ,  G02F1/136227 ,  G02F1/136286 ,  G09G2300/0426

    Abstract: An electronic display for providing a visual or video output for an electronic device. The electronic device includes a transistor layer configured to activate a first pixel row and a second pixel row. For each pixel in the first pixel row and the second pixel row, the transistor layer includes a switch transistor, a pixel electrode, and a common electrode. The electronic device further includes a pixel controller for selectively activating each pixel. The pixel controller includes a first gate line, a first drive line, and a second drive line. During operation, the first gate line provides a charge to the pixel electrode for a first pixel in the first pixel row and for a second pixel in the second pixel row, and the first drive line activates the switch transistor for the first pixel, and the second drive line activates the switch transistor for the second pixel.

    Abstract translation: 一种用于为电子设备提供视觉或视频输出的电子显示器。 电子设备包括被配置为激活第一像素行和第二像素行的晶体管层。 对于第一像素行和第二像素行中的每个像素，晶体管层包括开关晶体管，像素电极和公共电极。 电子设备还包括用于选择性地激活每个像素的像素控制器。 像素控制器包括第一栅极线，第一驱动线和第二驱动线。 在操作期间，第一栅极线为第一像素行中的第一像素和第二像素行中的第二像素向像素电极提供电荷，并且第一驱动线激活用于第一像素的开关晶体管， 第二驱动线激活用于第二像素的开关晶体管。

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