公开(公告)号：US07115481B2

公开(公告)日：2006-10-03

申请号：US10686084

申请日：2003-10-14

申请人： Bruno Ghyselen ,  Cécile Aulnette ,  Benoit Bataillou ,  Carlos Mazure ,  Hubert Moriceau

发明人： Bruno Ghyselen ,  Cécile Aulnette ,  Benoit Bataillou ,  Carlos Mazure ,  Hubert Moriceau

IPC分类号： H01L21/30

CPC分类号： H01L21/76254 ,  Y10S438/977

摘要： A method for concurrently producing at least a pair of semiconductor structures that each include at least one useful layer on a substrate. The method includes providing an initial structure that includes a useful layer having a front face on a support substrate. Atomic species are implanted into the useful layer to a controlled mean implantation depth to form a zone of weakness within the useful layer that defines first and second useful layers. Next, a stiffening substrate is bonded to the front face of the initial structure. The first useful layer is then detached from the second useful layer along the zone of weakness to obtain a pair of semiconductor structures with a first structure including the stiffening substrate and the first useful layer and a second structure including the support substrate and the second useful layer. The structures obtained can be used in the fields of electronics, optoelectronics or optics.

摘要翻译： 一种用于同时产生至少一对半导体结构的方法，每个半导体结构在衬底上包括至少一个有用层。 该方法包括提供初始结构，其包括在支撑衬底上具有正面的有用层。 将原子物质植入有用层中至受控的平均植入深度，以形成限定第一和第二有用层的有用层内的弱点区域。 接下来，将加强基板粘合到初始结构的正面。 然后沿着弱化区从第二有用层分离第一有用层，以获得一对具有第一结构的半导体结构，该第一结构包括加强衬底和第一有用层，以及包括支撑衬底和第二有用层的第二结构 。 所获得的结构可用于电子学，光电子学或光学领域。

公开(公告)号：US20060099779A1

公开(公告)日：2006-05-11

申请号：US11305444

申请日：2005-12-16

申请人： Ian Cayrefourcq ,  Carlos Mazure ,  Konstantin Bourdelle

发明人： Ian Cayrefourcq ,  Carlos Mazure ,  Konstantin Bourdelle

IPC分类号： H01L21/20 ,  H01L21/28

CPC分类号： H01L21/76254

摘要： The present invention relates to a method for transferring a thin useful layer from a donor substrate having an ordered crystalline structure to a receiver substrate. The method includes creation of a weakened zone in the donor substrate to define the layer to be transferred from the donor substrate. The crystalline structure of a surface region of the donor substrate is disturbed so as to create a disturbed superficial region within the thickness of the donor substrate, and thus define a disturbance interface between the disturbed superficial region and a subjacent region of the donor substrate for which the crystalline structure remains unchanged. Next, the donor substrate is subjected to a recrystallization annealing in order to at least partial recrystallize of the disturbed region, starting from the crystalline structure of the subjacent region of the donor substrate, and to create a zone of crystalline defects in the plane of the disturbance interface. One or several species are introduced into the thickness of the donor substrate to create the weakened zone, with the species being introduced with introduction parameters that are adjusted to introduce a maximum number of species at the zone of crystalline defects.

摘要翻译： 本发明涉及一种从具有有序晶体结构的施主衬底向接收衬底转移薄有用层的方法。 该方法包括在施主衬底中产生弱化区以限定要从供体衬底转移的层。 施主衬底的表面区域的晶体结构受到干扰，从而在施主衬底的厚度内产生干扰的表面区域，从而限定受干扰的表面区域和施主衬底的下部区域之间的干扰界面， 晶体结构保持不变。 接下来，对施主衬底进行再结晶退火，以便从施主衬底的下部区域的结晶结构开始至少部分地重新结晶受阻区域，并在该平面内产生晶体缺陷区域 扰动界面。 将一个或多个物质引入施主衬底的厚度以产生弱化区域，其中引入物质，引入参数被调整以在晶体缺陷区域引入最大数量的物质。

公开(公告)号：US07018909B2

公开(公告)日：2006-03-28

申请号：US10784016

申请日：2004-02-20

申请人： Bruno Ghyselen ,  Carlos Mazure ,  Emmanuel Arene

发明人： Bruno Ghyselen ,  Carlos Mazure ,  Emmanuel Arene

IPC分类号： H01L21/30 ,  H01L21/46

CPC分类号： H01L21/76259 ,  H01L21/324 ,  H01L21/76254 ,  H01L2221/68363

摘要： The invention relates to methods of forming a relaxed or pseudo-relaxed layer on a substrate, wherein the relaxed layer may be a semiconductor material. An implementation of the method includes growing an elastically stressed semiconductor material layer on a donor substrate, forming a glassy layer of a viscous material and bonding it to the stressed layer, removing a portion of the donor substrate to form a structure that includes the glassy layer, the stressed layer and a surface layer of donor substrate, and then heat treating the structure at a temperature of at least a viscosity temperature of the glassy layer to relax the stressed layer. The glassy layer can also be bonded to a receiving substrate so that the structure can be transferred thereto. Implementations also relate to structures obtained from the method.

摘要翻译： 本发明涉及在衬底上形成松弛或假松弛层的方法，其中松弛层可以是半导体材料。 该方法的实现包括在施主衬底上生长弹性应力的半导体材料层，形成粘性材料的玻璃层并将其粘合到应力层，去除供体衬底的一部分以形成包括玻璃层的结构 ，应力层和供体衬底的表面层，然后在至少玻璃质层的粘度温度的温度下对结构进行热处理以使应力层松弛。 玻璃状层也可以结合到接收基板，从而可以将结构转移到其上。 实现也涉及从该方法获得的结构。

公开(公告)号：US20050191824A1

公开(公告)日：2005-09-01

申请号：US11106135

申请日：2005-04-13

申请人： Carlos Mazure ,  Bruno Ghyselen

发明人： Carlos Mazure ,  Bruno Ghyselen

IPC分类号： H01L21/20 ,  H01L21/762 ,  H01L29/10 ,  H01L29/15 ,  H01L21/30 ,  H01L31/0312

CPC分类号： H01L29/1054 ,  H01L21/76254 ,  H01L21/76259

摘要： Methods for producing a multilayer semiconductor structure are described. In an embodiment, the method includes providing a support substrate made of a first semiconductor material having a first lattice parameter, and depositing a layer of a second semiconductor material having a second lattice parameter that is substantially different than the first lattice parameter onto the support substrate. In this manner, an intermediate structure is formed that has an interface between the first and second semiconductor materials, and the depositing is conducted such that most of the defects in the deposited layer are confined to an adaptation layer located in a region adjacent to the interface. The method also includes creating a zone of weakness in the intermediate structure, bonding the second semiconductor material layer to a target substrate, detaching the support substrate at the zone of weakness to obtain a multilayer semiconductor structure having an exposed surface where detached, and treating the exposed surface to assure that the adaptation layer is fully removed in order to obtain a relaxed thin layer of the second semiconductor material having a high quality surface.

摘要翻译： 对多层半导体结构体的制造方法进行说明。 在一个实施例中，该方法包括提供由具有第一晶格参数的第一半导体材料制成的支撑衬底，以及将具有与第一晶格参数基本不同的第二晶格参数的第二半导体材料层沉积到支撑衬底上 。 以这种方式，形成在第一和第二半导体材料之间具有界面的中间结构，并且进行沉积，使得沉积层中的大部分缺陷被限制在位于与界面相邻的区域中的适配层 。 该方法还包括在中间结构中产生弱点区域，将第二半导体材料层接合到目标衬底，在弱化区域分离支撑衬底以获得具有剥离的暴露表面的多层半导体结构， 以确保适配层被完全去除以获得具有高质量表面的第二半导体材料的松弛薄层。

公开(公告)号：US5235203A

公开(公告)日：1993-08-10

申请号：US722416

申请日：1991-06-27

申请人： Carlos Mazure ,  Marius Orlowski ,  Matthew S. Noell

发明人： Carlos Mazure ,  Marius Orlowski ,  Matthew S. Noell

IPC分类号： H01L29/08

CPC分类号： H01L29/0847

摘要： An insulated gate field effect transistor having a vertically layered elevated source/drain structure includes an electrically conductive suppression region for resistance to hot carrier injection. The device includes a semiconductor substrate of first conductivity type having a gate insulator disposed on the surface of that substrate. A gate electrode, in turn, is disposed on the gate insulator. A lightly doped drain region of second conductivity type is formed in the substrate in alignment with the gate electrode. An electrically conductive suppression region having a first low electrical conductivity is positioned to electrically contact the drain region, but is electrically isolated from the gate electrode and is spaced a first distance from the gate electrode. A heavily doped drain contact also contacts the drain region and is spaced further away from the gate electrode than is the electrically conducted suppression region.

摘要翻译： 具有垂直分层的升高的源/漏结构的绝缘栅场效应晶体管包括用于耐热载流子注入的导电抑制区。 该器件包括第一导电类型的半导体衬底，其具有设置在该衬底表面上的栅极绝缘体。 栅电极依次设置在栅极绝缘体上。 第二导电类型的轻掺杂漏极区域与栅电极对准地形成在衬底中。 具有第一低导电性的导电抑制区被定位成与漏极区电接触，但是与栅电极电隔离并且与栅电极隔开第一距离。 重掺杂的漏极接触还接触漏极区，并且与导电抑制区相比更远离栅电极。

公开(公告)号：US08603896B2

公开(公告)日：2013-12-10

申请号：US13559396

申请日：2012-07-26

申请人： Gweltaz Gaudin ,  Carlos Mazure

发明人： Gweltaz Gaudin ,  Carlos Mazure

IPC分类号： H01L21/30

CPC分类号： H01L21/76254

摘要： A method for transferring a monocrystalline semiconductor layer onto a support substrate by implanting species in a donor substrate; bonding the donor substrate to the support substrate; and fracturing the donor substrate to transfer the layer onto the support substrate; wherein a portion of the monocrystalline layer to be transferred is rendered amorphous, without disorganizing the crystal lattice of a second portion of the layer, with the portions being, respectively, a surface portion and a buried portion of the monocrystalline layer; and wherein the amorphous portion is recrystallized at a temperature below 500° C., with the crystal lattice of the second portion serving as a seed for recrystallization.

摘要翻译： 一种通过将物质注入施主衬底中将单晶半导体层转移到支撑衬底上的方法; 将施主衬底粘合到支撑衬底上; 并且将所述施主衬底压裂以将所述层转移到所述支撑衬底上; 其中待转移的单晶层的一部分变成非晶体，而不会使层的第二部分的晶格混杂，部分分别是单晶层的表面部分和掩埋部分; 并且其中非晶部分在低于500℃的温度下重结晶，其中第二部分的晶格用作用于重结晶的晶种。

公开(公告)号：US20130015442A1

公开(公告)日：2013-01-17

申请号：US13637565

申请日：2011-02-22

申请人： Carlos Mazure ,  Bich-Yen Nguyen ,  Mariam Sadaka

发明人： Carlos Mazure ,  Bich-Yen Nguyen ,  Mariam Sadaka

IPC分类号： H01L29/04 ,  H01L29/06 ,  H01L21/302

CPC分类号： H01L27/0688 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02667 ,  H01L21/187 ,  H01L21/8221 ,  H01L2924/00011 ,  H01L2224/80001

摘要： Methods of forming semiconductor structures include transferring a portion (116a) of a donor structure to a processed semiconductor structure (102) that includes at least one non-planar surface. An amorphous film (144) may be formed over at least one non-planar surface of the bonded semiconductor structure, and the amorphous film may be planarized to form one or more planarized surfaces. Semiconductor structures include a bonded semiconductor structure having at least one non-planar surface, and an amorphous film disposed over the at least one non-planar surface. The bonded semiconductor structure may include a processed semiconductor structure and a portion of a single crystal donor structure attached to a non-planar surface of the processed semiconductor structure.

摘要翻译： 形成半导体结构的方法包括将施主结构的部分（116a）转移到包括至少一个非平面表面的经处理的半导体结构（102）。 可以在结合的半导体结构的至少一个非平面表面上形成非晶膜（144），并且可以将非晶膜平坦化以形成一个或多个平坦化表面。 半导体结构包括具有至少一个非平面表面的键合半导体结构和设置在所述至少一个非平面表面上的非晶膜。 键合的半导体结构可以包括处理的半导体结构和附接到处理的半导体结构的非平面表面的单晶体施主结构的一部分。

公开(公告)号：US08309426B2

公开(公告)日：2012-11-13

申请号：US13093615

申请日：2011-04-25

申请人： Konstantin Bourdelle ,  Carlos Mazure

发明人： Konstantin Bourdelle ,  Carlos Mazure

IPC分类号： H01L21/76

CPC分类号： H01L21/76283 ,  H01L21/76275 ,  H01L29/66181

摘要： The present invention provides methods for the manufacture of a trench structure in a multilayer wafer that comprises a substrate, an oxide layer on the substrate and a semiconductor layer on the oxide layer. These methods include the steps of forming a trench through the semiconductor layer and the oxide layer and extending into the substrate, and of performing an anneal treatment of the formed trench such that at the inner surface of the trench some material of the semiconductor layer flows at least over a portion of the part of the oxide layer exposed at the inner surface of the trench. Substrates manufactured according to this invention are advantageous for fabricating various semiconductor devices, e.g., MOSFETs, trench capacitors, and the like.

摘要翻译： 本发明提供了在多层晶片中制造沟槽结构的方法，该多层晶片包括衬底，衬底上的氧化物层和氧化物层上的半导体层。 这些方法包括以下步骤：通过半导体层和氧化物层形成沟槽并延伸到衬底中，并且对所形成的沟槽进行退火处理，使得在沟槽的内表面处，半导体层的一些材料在 至少暴露在沟槽内表面的部分氧化物层的一部分。 根据本发明制造的衬底有利于制造各种半导体器件，例如MOSFET，沟槽电容器等。

公开(公告)号：US08173512B2

公开(公告)日：2012-05-08

申请号：US13080436

申请日：2011-04-05

申请人： Bruno Ghyselen ,  Carlos Mazure ,  Emmanuel Arene

发明人： Bruno Ghyselen ,  Carlos Mazure ,  Emmanuel Arene

IPC分类号： H01L21/76

CPC分类号： H01L21/76259 ,  H01L21/324 ,  H01L21/76254 ,  H01L2221/68363

摘要： A method for forming a structure that includes a relaxed or pseudo-relaxed layer on a substrate. The method includes the steps of growing an elastically stressed layer of semiconductor material on a donor substrate; forming a glassy layer of a viscous material on the stressed layer; removing a portion of the donor substrate to form a structure that includes the glassy layer, the stressed layer and a surface layer of donor substrate material; patterning the stressed layer; and heat treating the structure at a temperature of at least a viscosity temperature of the glassy layer to relax the stressed layer and form the relaxed or pseudo-relaxed layer of the structure.

摘要翻译： 一种用于形成在衬底上包括松弛或假松弛层的结构的方法。 该方法包括在施主衬底上生长半导体材料的弹性应力层的步骤; 在应力层上形成粘性材料的玻璃状层; 去除供体衬底的一部分以形成包括玻璃层，应力层和供体衬底材料的表面层的结构; 图案化应力层; 并且在至少玻璃质层的粘度温度的温度下对结构进行热处理，以使应力层松弛以形成结构的松弛或假松弛层。

公开(公告)号：US20110287571A1

公开(公告)日：2011-11-24

申请号：US13123661

申请日：2009-09-22

申请人： Konstantin Bourdelle ,  Carlos Mazure

发明人： Konstantin Bourdelle ,  Carlos Mazure

IPC分类号： H01L31/0376

CPC分类号： H01L27/14689 ,  H01L27/1464

摘要： A method of fabricating a back-illuminated image sensor that includes the steps of providing a first substrate of a semiconductor layer, in particular a silicon layer, forming electronic device structures over the semiconductor layer and, only then, doping the semiconductor layer. By doing so, improved dopant profiles and electrical properties of photodiodes can be achieved such that the final product, namely an image sensor, has a better quality.

摘要翻译： 一种制造背照式图像传感器的方法，包括以下步骤：提供半导体层的第一衬底，特别是硅层，在半导体层上形成电子器件结构，然后仅仅掺杂半导体层。 通过这样做，可以实现改进的光电二极管的掺杂剂分布和电性能，使得最终产品，即图像传感器具有更好的质量。