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公开(公告)号：US08420531B2
公开(公告)日：2013-04-16
申请号：US13164929
申请日：2011-06-21
IPC分类号： H01L21/4763
CPC分类号： H01L23/52 , H01L21/3105 , H01L21/76826 , H01L21/76828 , H01L21/76831 , H01L21/76846 , H01L21/76867 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： Alternative methods of fabricating an interconnect structure in which an enhanced diffusion barrier including an in-situ formed metal nitride liner formed between an interconnect dielectric material and an overlying metal diffusion barrier liner are provided. In one embodiment, the method includes forming at least one opening into an interconnect dielectric material. A nitrogen enriched dielectric surface layer is formed within exposed surfaces of the interconnect dielectric material utilizing thermal nitridation. A metal diffusion barrier liner is formed on the nitrogen enriched dielectric surface. During and/or after the formation of the metal diffusion barrier liner, a metal nitride liner forms in-situ in a lower region of the metal diffusion barrier liner. A conductive material is then formed on the metal diffusion barrier liner. The conductive material, the metal diffusion barrier liner and the metal nitride liner that are located outside of the at least one opening are removed to provide a planarized conductive material, a planarized metal diffusion barrier liner and a planarized metal nitride liner, each of which includes an upper surface that is co-planar with the nitrogen enriched dielectric surface layer of the interconnect dielectric material.
摘要翻译： 制造互连结构的替代方法，其中提供了包括在互连电介质材料和上覆金属扩散阻挡衬里之间形成的原位形成的金属氮化物衬垫的增强扩散屏障。 在一个实施例中，该方法包括在互连电介质材料中形成至少一个开口。 利用热氮化在互连电介质的暴露表面内形成富氮介电表面层。 在富氮电介质表面上形成金属扩散阻挡衬垫。 在形成金属扩散阻挡衬里期间和/或之后，金属氮化物衬垫在金属扩散阻挡衬里的下部区域中原位形成。 然后在金属扩散阻挡衬里上形成导电材料。 移除位于至少一个开口外侧的导电材料，金属扩散阻挡衬垫和金属氮化物衬垫，以提供平坦化的导电材料，平坦化的金属扩散阻挡衬垫和平坦化的金属氮化物衬垫，每个衬垫包括 与互连电介质材料的富氮介电表面层共平面的上表面。
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42.发明授权Formation of alloy liner by reaction of diffusion barrier and seed layer for interconnect application 有权通过扩散阻挡层和种子层的反应形成合金衬里，用于互连应用公开(公告)号：US08336204B2
公开(公告)日：2012-12-25
申请号：US12509885
申请日：2009-07-27
IPC分类号： H01K3/10
CPC分类号： H01L21/76846 , H01L21/76844 , H01L21/76858 , H01L21/76867 , H01L21/76873 , H01L23/53238 , H01L2924/0002 , Y10T29/49117 , Y10T29/49155 , Y10T29/49165 , H01L2924/00
摘要： An interconnect structure including an alloy liner positioned directly between a diffusion barrier and a Cu alloy seed layer as well as methods for forming such an interconnect structure are provided. The alloy liner of the present invention is formed by thermally reacting a previously deposited diffusion barrier metal alloy layer with an overlying Cu alloy seed layer. During the thermal reaction, the metal alloys from both the diffusion barrier and the Cu alloys seed layer react forming a metal alloy reaction product between the diffusion barrier and the Cu seed layer.
摘要翻译： 提供了包括直接位于扩散阻挡层和Cu合金种子层之间的合金衬垫的互连结构以及用于形成这种互连结构的方法。 本发明的合金衬垫通过使预先沉积的扩散阻挡金属合金层与覆盖的Cu合金种子层热反应形成。 在热反应期间，来自扩散阻挡层和Cu合金种子层的金属合金在扩散阻挡层和Cu籽晶层之间反应形成金属合金反应产物。
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43.发明申请METAL CAP WITH ULTRA-LOW k DIELECTRIC MATERIAL FOR CIRCUIT INTERCONNECT APPLICATIONS 有权用于电路互连应用的具有超低k介电材料的金属盖公开(公告)号：US20120149191A1
公开(公告)日：2012-06-14
申请号：US13398070
申请日：2012-02-16
IPC分类号： H01L21/768
CPC分类号： H01L21/76849 , H01L21/76834 , H01L21/76885 , H01L23/53238 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： An interconnect structure is provided that has enhanced electromigration reliability without degrading circuit short yield, and improved technology extendibility. The inventive interconnect structure includes a dielectric material having a dielectric constant of about 3.0 or less. The dielectric material has at least one conductive material embedded therein. A noble metal cap is located directly on an upper surface of the at least one conductive region. The noble metal cap does not substantially extend onto an upper surface of the dielectric material that is adjacent to the at least one conductive region, and the noble cap material does not be deposited on the dielectric surface. A method fabricating such an interconnect structure utilizing a low temperature (about 300° C. or less) chemical deposition process is also provided.
摘要翻译： 提供了一种互连结构，其具有增强的电迁移可靠性，而不降低电路短产量，并且提高了技术可扩展性。 本发明的互连结构包括具有约3.0或更小的介电常数的电介质材料。 电介质材料具有嵌入其中的至少一种导电材料。 贵金属盖直接位于至少一个导电区域的上表面上。 贵金属帽基本上不延伸到与至少一个导电区域相邻的电介质材料的上表面上，并且贵金属帽材料不会沉积在电介质表面上。 还提供了利用低温（约300℃或更低）化学沉积工艺制造这种互连结构的方法。
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44.发明授权Metal cap with ultra-low k dielectric material for circuit interconnect applications 有权金属盖带有超低k电介质材料，用于电路互连应用公开(公告)号：US08138604B2
公开(公告)日：2012-03-20
申请号：US11766261
申请日：2007-06-21
IPC分类号： H01L23/52
CPC分类号： H01L21/76849 , H01L21/76834 , H01L21/76885 , H01L23/53238 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： An interconnect structure is provided that has enhanced electromigration reliability without degrading circuit short yield, and improved technology extendibility. The inventive interconnect structure includes a dielectric material having a dielectric constant of about 3.0 or less. The dielectric material has at least one conductive material embedded therein. A noble metal cap is located directly on an upper surface of the at least one conductive region. The noble metal cap does not substantially extend onto an upper surface of the dielectric material that is adjacent to the at least one conductive region, and the noble cap material does not be deposited on the dielectric surface. A method fabricating such an interconnect structure utilizing a low temperature (about 300° C. or less) chemical deposition process is also provided.
摘要翻译： 提供了一种互连结构，其具有增强的电迁移可靠性，而不降低电路短产量，并且提高了技术可扩展性。 本发明的互连结构包括具有约3.0或更小的介电常数的电介质材料。 电介质材料具有嵌入其中的至少一种导电材料。 贵金属盖直接位于至少一个导电区域的上表面上。 贵金属帽基本上不延伸到与至少一个导电区域相邻的电介质材料的上表面上，并且贵金属帽材料不会沉积在电介质表面上。 还提供了利用低温（约300℃或更低）化学沉积工艺制造这种互连结构的方法。
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公开(公告)号：US08133810B2
公开(公告)日：2012-03-13
申请号：US12881806
申请日：2010-09-14
IPC分类号： H01L21/44
CPC分类号： H01L21/76885 , H01L21/76826 , H01L21/76834 , H01L21/7684 , H01L21/76849
摘要： An interconnect structure is provided in which the conductive features embedded within a dielectric material are capped with a metallic capping layer, yet no metallic residue is present on the surface of the dielectric material in the final structure. The inventive interconnect structure has improved dielectric breakdown strength as compared to prior art interconnect structures. Moreover, the inventive interconnect structure has better reliability and technology extendibility for the semiconductor industry. The inventive interconnect structure includes a dielectric material having at least one metallic capped conductive feature embedded therein, wherein a top portion of said at least one metallic capped conductive feature extends above an upper surface of the dielectric material. A dielectric capping layer is located on the dielectric material and it encapsulates the top portion of said at least one metallic capped conductive feature that extends above the upper surface of dielectric material.
摘要翻译： 提供了一种互连结构，其中嵌入电介质材料内的导电特征被金属覆盖层封盖，但在最终结构中绝缘材料表面上没有金属残留物。 与现有技术的互连结构相比，本发明的互连结构具有改善的介电击穿强度。 此外，本发明的互连结构对于半导体工业具有更好的可靠性和技术可扩展性。 本发明的互连结构包括具有嵌入其中的至少一个金属封盖的导电特征的电介质材料，其中所述至少一个金属封端的导电特征的顶部在电介质材料的上表面上方延伸。 电介质覆盖层位于电介质材料上，并且封装在电介质材料的上表面上方延伸的所述至少一个金属封盖导电特征的顶部。
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46.发明申请公开(公告)号：US20080203570A1
公开(公告)日：2008-08-28
申请号：US11679483
申请日：2007-02-27
IPC分类号： H01L23/48 , H01L21/4763
CPC分类号： H01L21/76814 , H01L21/76805 , H01L21/76843 , H01L21/76849 , H01L23/53223 , H01L23/53238 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： Structures including a refractory metal collar at a copper wire and dielectric layer liner-less interface, and a related method, are disclosed. In one embodiment, a structure includes a copper wire having a liner-less interface with a dielectric layer thereabove; a via extending upwardly from the copper wire through the dielectric layer; and a refractory metal collar extending from a side of the via and partially along the liner-less interface. Refractory metal collar prevents electromigration induced slit voiding by improving the interface around the via, and prevents void nucleation from occurring near the via. Also, the refractory metal collar provides electrical redundancy in the presence of voids around the via and dielectric layer liner-less interface.
摘要翻译： 公开了包括铜线处的难熔金属环和介电层无衬里界面的结构以及相关方法。 在一个实施例中，一种结构包括具有与其上方的介电层无衬层界面的铜线; 从铜线向上延伸穿过介电层的通孔; 以及从所述通孔的一侧延伸并部分地沿着所述无衬里界面延伸的耐火金属套环。 耐火金属轴环通过改善通孔周围的界面防止电迁移引起的狭缝空隙，并防止在通孔附近发生空隙成核。 此外，难熔金属套环在通孔和介电层无衬里界面周围存在空隙的情况下提供电冗余。
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47.发明授权Metal cap for back end of line (BEOL) interconnects, design structure and method of manufacture 有权后端金属盖（BEOL）互连，设计结构和制造方法公开(公告)号：US08610276B2
公开(公告)日：2013-12-17
申请号：US13474916
申请日：2012-05-18
IPC分类号： H01L23/48
CPC分类号： H01L23/5329 , H01L21/76846 , H01L21/76849 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： A structure is provided with a metal cap for back end of line (BEOL) interconnects that substantially eliminates electro-migration (EM) damage, a design structure and a method of manufacturing the IC. The structure includes a metal interconnect formed in a dielectric material and a metal cap selective to the metal interconnect. The metal cap includes RuX, where X is at Boron, Phosphorous or a combination of Boron and Phosphorous.
摘要翻译： 一种结构设置有用于后端线（BEOL）互连的金属盖，其基本上消除了电迁移（EM）损伤，设计结构和制造IC的方法。 该结构包括形成在电介质材料中的金属互连和对金属互连有选择性的金属帽。 金属盖包括RuX，其中X在硼，磷或硼和磷的组合。
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公开(公告)号：US08530320B2
公开(公告)日：2013-09-10
申请号：US13155801
申请日：2011-06-08
IPC分类号： H01L21/20
CPC分类号： H01L28/24 , H01L23/5228 , H01L2924/0002 , H01L2924/00
摘要： A thin film metal resistor is provided that includes an in-situ formed metal nitride layer that is formed in a lower region of a deposited metal nitride layer. The in-situ formed metal nitride layer, together with the overlying deposited metal nitride layer, from a thin film metal resistor which has a nitrogen content that is greater than 60 atomic % nitrogen. The in-situ formed metal nitride layer is present on a nitrogen enriched dielectric surface layer. In accordance with the present disclosure, the in-situ formed metal nitride layer is formed during and/or after formation of the deposited metal nitride layer by reacting metal atoms from the deposited metal nitride layer with nitrogen atoms present in the nitrogen enriched dielectric surface layer. The presence of the in-situ formed metal nitride layer in the lower region of the metal nitride layer provides a two-component metal resistor having greater than 60 atomic % nitrogen therein.
摘要翻译： 提供了一种薄膜金属电阻器，其包括形成在沉积的金属氮化物层的下部区域中的原位形成的金属氮化物层。 原位形成的金属氮化物层与上覆的沉积的金属氮化物层一起来自氮含量大于60原子％的氮的薄膜金属电阻器。 原位形成的金属氮化物层存在于富氮的电介质表面层上。 根据本公开，原位形成的金属氮化物层通过使来自沉积的金属氮化物层的金属原子与富氮电介质表面层中存在的氮原子反应而形成沉积的金属氮化物层期间和/或之后 。 在金属氮化物层的下部区域中原位形成的金属氮化物层的存在提供了其中具有大于60原子％的氮的双组分金属电阻器。
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公开(公告)号：US20120313220A1
公开(公告)日：2012-12-13
申请号：US13155801
申请日：2011-06-08
CPC分类号： H01L28/24 , H01L23/5228 , H01L2924/0002 , H01L2924/00
摘要： A thin film metal resistor is provided that includes an in-situ formed metal nitride layer that is formed in a lower region of a deposited metal nitride layer. The in-situ formed metal nitride layer, together with the overlying deposited metal nitride layer, from a thin film metal resistor which has a nitrogen content that is greater than 60 atomic % nitrogen. The in-situ formed metal nitride layer is present on a nitrogen enriched dielectric surface layer. In accordance with the present disclosure, the in-situ formed metal nitride layer is formed during and/or after formation of the deposited metal nitride layer by reacting metal atoms from the deposited metal nitride layer with nitrogen atoms present in the nitrogen enriched dielectric surface layer. The presence of the in-situ formed metal nitride layer in the lower region of the metal nitride layer provides a two-component metal resistor having greater than 60 atomic % nitrogen therein.
摘要翻译： 提供了一种薄膜金属电阻器，其包括形成在沉积的金属氮化物层的下部区域中的原位形成的金属氮化物层。 原位形成的金属氮化物层与上覆的沉积的金属氮化物层一起来自氮含量大于60原子％的氮的薄膜金属电阻器。 原位形成的金属氮化物层存在于富氮的电介质表面层上。 根据本公开，原位形成的金属氮化物层通过使来自沉积的金属氮化物层的金属原子与富氮电介质表面层中存在的氮原子反应而形成沉积的金属氮化物层期间和/或之后 。 在金属氮化物层的下部区域中原位形成的金属氮化物层的存在提供了其中具有大于60原子％的氮的双组分金属电阻器。
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公开(公告)号：US07968949B2
公开(公告)日：2011-06-28
申请号：US11668717
申请日：2007-01-30
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L21/76829 , H01L21/76831 , H01L29/6653 , H01L29/78
摘要： Contact forming methods and a related semiconductor device are disclosed. One method includes forming a first liner over the structure and the substrate, the first liner covering sidewall of the structure; forming a dielectric layer over the first liner and the structure; forming a contact hole in the dielectric layer to the first liner; forming a second liner in the contact hole including over the first liner covering the sidewall; removing the first and second liners at a bottom of the contact hole; and filling the contact hole with a conductive material to form the contact. The thicker liner(s) over the sidewall of the structure prevents shorting, and allows for at least maintaining any intrinsic stress in one or more of the liner(s).
摘要翻译： 公开了触点形成方法和相关的半导体器件。 一种方法包括在结构和衬底上形成第一衬里，第一衬套覆盖结构的侧壁; 在所述第一衬垫和所述结构上形成介电层; 在所述介电层中形成与所述第一衬垫的接触孔; 在所述接触孔中形成第二衬垫，包括覆盖所述侧壁的所述第一衬套上方; 在接触孔的底部移除第一和第二衬垫; 并用导电材料填充接触孔以形成接触。 结构侧壁上较厚的衬套防止短路，并允许至少保持一个或多个衬套中的任何固有应力。
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