Semiconductor device having memory array, method of writing, and systems associated therewith
    41.
    发明申请
    Semiconductor device having memory array, method of writing, and systems associated therewith 有权
    具有存储器阵列,写入方法和与其相关联的系统的半导体器件

    公开(公告)号:US20090141567A1

    公开(公告)日:2009-06-04

    申请号:US12289937

    申请日:2008-11-07

    IPC分类号: G11C7/00 G11C7/22

    摘要: In one embodiment, the semiconductor device, includes a non-volatile memory cell array, and a control unit configured to generate a mode signal indicating if a flash mode has been enabled. A write circuit is configured to write in the non-volatile memory cell array based on the mode signal such that the write circuit disables erasing the non-volatile memory cell array if the flash mode has not been enabled and instructions to erase one or more cells of the non-volatile memory cell array is received.

    摘要翻译: 在一个实施例中,半导体器件包括非易失性存储单元阵列,以及控制单元,被配置为产生指示闪光模式是否被使能的模式信号。 写电路被配置为基于模式信号写入非易失性存储单元阵列,使得如果闪存模式尚未被使能,则写电路禁止擦除非易失性存储单元阵列,并且指令擦除一个或多个单元 接收非易失性存储单元阵列。

    Power trench MOSFETs having SiGe/Si channel structure
    44.
    发明授权
    Power trench MOSFETs having SiGe/Si channel structure 有权
    具有SiGe / Si沟道结构的功率沟槽MOSFET

    公开(公告)号:US07504691B2

    公开(公告)日:2009-03-17

    申请号:US11469456

    申请日:2006-08-31

    申请人: Chanho Park Qi Wang

    发明人: Chanho Park Qi Wang

    IPC分类号: H01L31/00

    摘要: Devices, methods, and processes that improve immunity to transient voltages and reduce parasitic impedances. Immunity to unclamped inductive switching events is improved. For example, a trench-gated power MOSFET device having a SiGe source is provided, where the SiGe source reduces parasitic npn transistor gain by reducing hole current in the body or well region, thereby decreasing the likelihood of a latch-up condition. A trench-gated power MOSFET device having a SiGe body or well region is also provided. A SiGe body reduces hole current when the body diode is turned on, thereby reducing reverse recovery power losses. Other device characteristics are also improved. For example, parasitic gate impedance can reduced through the use of a poly SiGe gate. Also, channel resistance can be reduced through the use of a SiGe layer near the device's gate and a thick oxide region can be formed under the trench gate to reduce gate-to-drain capacitance.

    摘要翻译: 提高对瞬态电压的抗扰度并减少寄生阻抗的器件,方法和过程。 提高对松开感应开关事件的抗扰度。 例如,提供了具有SiGe源的沟槽门控功率MOSFET器件,其中SiGe源通过减少主体或阱区中的空穴电流来降低寄生npn晶体管增益,从而降低闩锁状态的可能性。 还提供了具有SiGe体或阱区的沟槽栅功率MOSFET器件。 当体二极管导通时,SiGe体减小空穴电流,从而降低反向恢复功率损耗。 其他装置特性也得到改善。 例如,通过使用多晶SiGe栅极可以减小寄生栅极阻抗。 此外,可以通过在器件栅极附近使用SiGe层来减小沟道电阻,并且可以在沟槽栅极下形成厚的氧化物区域以减小栅极 - 漏极电容。

    NOVEL 7S-ALPHA REGULATORY ELEMENTS FOR EXPRESSING TRANSGENES IN PLANTS
    45.
    发明申请
    NOVEL 7S-ALPHA REGULATORY ELEMENTS FOR EXPRESSING TRANSGENES IN PLANTS 审中-公开
    用于在植物中表达转基因的新型7S-ALPHA法规元素

    公开(公告)号:US20090064378A1

    公开(公告)日:2009-03-05

    申请号:US12197137

    申请日:2008-08-22

    CPC分类号: C12N15/8234

    摘要: The present invention provides novel non-coding gene regulatory element polynucleotide molecules isolated or identified from the beta-conglycinin gene of Glycine max and useful for expressing transgenes in plants. The invention further discloses compositions, polynucleotide constructs, transformed host cells, transgenic plants and seeds comprising the regulatory polynucleotide molecules, and methods for preparing and using the same.

    摘要翻译: 本发明提供从大豆的β-伴大豆球蛋白基因中分离或鉴定并用于在植物中表达转基因的新型非编码基因调控元件多核苷酸分子。 本发明还公开了组合物,多核苷酸构建体,转化的宿主细胞,转基因植物和包含调节性多聚核苷酸分子的种子,以及制备和使用其的方法。

    Method and system for conducting a low-power design exploration
    48.
    发明申请
    Method and system for conducting a low-power design exploration 有权
    进行低功率设计勘探的方法和系统

    公开(公告)号:US20080126999A1

    公开(公告)日:2008-05-29

    申请号:US11588927

    申请日:2006-10-26

    申请人: Qi Wang

    发明人: Qi Wang

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5022 G06F2217/78

    摘要: Method and system for conducting low-power design explorations are disclosed. The method includes receiving an RTL netlist of a circuit design, creating one or more power requirement files, wherein each power requirement file comprises power commands corresponding to the RTL netlist, generating one or more low-power RTL netlists using the corresponding one or more power requirement files and the RTL netlist, and conducting low-power design explorations using the one or more low-power RTL netlists.

    摘要翻译: 公开了用于进行低功率设计探索的方法和系统。 该方法包括接收电路设计的RTL网表,创建一个或多个功率需求文件,其中每个功率需求文件包括与RTL网表相对应的功率命令,使用相应的一个或多个功率生成一个或多个低功率RTL网表 需求文件和RTL网表,并使用一个或多个低功耗RTL网表进行低功耗设计探索。

    Method of Secure Communication Between Endpoints
    50.
    发明申请
    Method of Secure Communication Between Endpoints 有权
    端点之间安全通信的方法

    公开(公告)号:US20070288744A1

    公开(公告)日:2007-12-13

    申请号:US11587562

    申请日:2005-03-31

    申请人: Qi Wang

    发明人: Qi Wang

    IPC分类号: H04L9/00

    摘要: The method of secure communication between the endpoints is used for the secret communication between endpoints locating in different gatekeeper management area, and the method includes: in the process of the caller endpoint calling the callee endpoint, the home gatekeeper of the callee endpoint generates the share secret key between the caller endpoint and the callee endpoint; the secure communication process is performed between the caller endpoint and the callee endpoint according to the share secret key. According to the secure communication method between the endpoints, the invention makes that secret communication mechanism between the endpoints locating the different gatekeeper management area has better expansibility and higher efficiency.

    摘要翻译: 端点之间的安全通信方法用于定位在不同网守管理区域的端点之间的秘密通信,该方法包括:在主叫端点呼叫被叫端点的过程中,被叫方端点的归属网守产生共享 主叫端点和被叫终端之间的秘密密钥; 根据共享秘密密钥在呼叫者端点和被叫方端点之间执行安全通信处理。 根据端点之间的安全通信方式,本发明使定位不同网守管理区域的端点之间的秘密通信机制具有更好的可扩展性和更高的效率。