公开(公告)号：US20080146186A1

公开(公告)日：2008-06-19

申请号：US11641915

申请日：2006-12-19

Applicant: Ahmadreza (Reza) Rofougaran ,  Maryam Rofougaran ,  Vafa James Rakshani ,  Claude G. Hayek ,  Frederic Christian Marc Hayem ,  Hooman Darabi ,  Nelson R. Sollenberger ,  Weidong Li

Inventor： Ahmadreza (Reza) Rofougaran ,  Maryam Rofougaran ,  Vafa James Rakshani ,  Claude G. Hayek ,  Frederic Christian Marc Hayem ,  Hooman Darabi ,  Nelson R. Sollenberger ,  Weidong Li

IPC: H04B1/28

CPC classification number: H04B1/3833 ,  H04B1/406 ,  H04W4/18

Abstract: An on-chip baseband-to-RF interface includes a receive/transmit section, a control section, and a clock section. The receive/transmit section, when in a receive mode, provides the stream of inbound symbols from the RF circuit to the baseband processing module and, when in a transmit mode, provides the stream of outbound symbols from the baseband processing module to the RF circuit. The control section provides a control communication path between the baseband processing module and the RF circuit. The clock section provides a clock communication path between the baseband processing module and the RF circuit.

Abstract translation: 片上基带到RF接口包括接收/发送部分，控制部分和时钟部分。 接收/发送部分处于接收模式时，将来自RF电路的入站符号流提供给基带处理模块，并且当处于发送模式时，将来自基带处理模块的出站符号流提供给RF电路 。 控制部分提供基带处理模块和RF电路之间的控制通信路径。 时钟部分提供基带处理模块和RF电路之间的时钟通信路径。

公开(公告)号：US20080146173A1

公开(公告)日：2008-06-19

申请号：US11638623

申请日：2006-12-13

Applicant: Mohammad Nariman ,  Alireza Zolfaghari ,  Hooman Darabi

Inventor： Mohammad Nariman ,  Alireza Zolfaghari ,  Hooman Darabi

IPC: H04B7/00

CPC classification number: H04B1/0483

Abstract: A radio frequency (RF) transmitter front-end includes a digital to analog conversion module and a power amplifier module. The digital to analog conversion module is coupled to convert amplitude information into analog amplitude adjust signals when a first mode is active and is coupled to convert power level information into analog power level signals when a second mode is active. The power amplifier module is coupled to amplify first phase modulated RF signals in accordance with the analog amplitude adjust signals to produce first outbound RF signals when the first mode is active and is coupled to amplify second phase modulated RF signals in accordance with the analog power level signals to produce second outbound RF signals when the second mode is active.

Abstract translation: 射频（RF）发射机前端包括数模转换模块和功率放大器模块。 当第一模式有效时，数模转换模块被耦合以将幅度信息转换为模拟幅度调整信号，并且当第二模式被激活时被耦合以将功率电平信息转换为模拟功率电平信号。 功率放大器模块被耦合以根据模拟幅度调整信号放大第一相位调制RF信号，以在第一模式有效时产生第一出站RF信号，并且被耦合以根据模拟功率电平放大第二相位调制RF信号 当第二模式有效时产生第二出站RF信号的信号。

公开(公告)号：US07375595B2

公开(公告)日：2008-05-20

申请号：US11540878

申请日：2006-09-29

Applicant: Louie Serrano ,  Alireza Zolfaghari ,  Paul Lettieri ,  Hea Joung Kim ,  Hooman Darabi ,  Henrik Jensen ,  Behnam Mohammadi

Inventor： Louie Serrano ,  Alireza Zolfaghari ,  Paul Lettieri ,  Hea Joung Kim ,  Hooman Darabi ,  Henrik Jensen ,  Behnam Mohammadi

IPC: H03L7/08 ,  H03L7/099

CPC classification number: H03L7/0898 ,  H03L7/10 ,  H03L7/18

Abstract: Methods and apparatus for calibrating a transitional loop, such as a phase locked loop, are disclosed. An example method includes performing an open loop calibration of a voltage controlled oscillator (VCO). The open loop calibration includes tuning the output oscillation frequency of the VCO to within a predetermined range of frequencies. The example method further includes determining a voltage offset and a gain error of an analog to digital converter (ADC) coupled with the phase locked loop. The example method also includes determining a gain offset of the open loop calibrated VCO using the voltage offset and the gain error of the ADC. In the example method, a signal provided by a charge pump of the PLL is adjusted based on the determined gain offset.

Abstract translation: 公开了用于校准过渡环路的方法和装置，例如锁相环路。 示例性方法包括执行压控振荡器（VCO）的开环校准。 开环校准包括将VCO的输出振荡频率调谐到预定频率范围内。 示例性方法还包括确定与锁相环耦合的模数转换器（ADC）的电压偏移和增益误差。 示例性方法还包括使用电压偏移和ADC的增益误差来确定开环校准的VCO的增益偏移。 在示例性方法中，基于所确定的增益偏移来调整由PLL的电荷泵提供的信号。

公开(公告)号：US20070285154A1

公开(公告)日：2007-12-13

申请号：US11757014

申请日：2007-06-01

Applicant: Hooman Darabi ,  Ahmadreza Rofougaran ,  Shahla Khorram ,  Brima Ibrahim

Inventor： Hooman Darabi ,  Ahmadreza Rofougaran ,  Shahla Khorram ,  Brima Ibrahim

IPC: H03K5/00

CPC classification number: H03L7/18 ,  H03B21/01 ,  H03B27/00 ,  H03F1/56 ,  H03F3/19 ,  H03F3/245 ,  H03F3/45179 ,  H03F3/45475 ,  H03F2200/318 ,  H03F2200/336 ,  H03F2200/451 ,  H03F2203/45138 ,  H03F2203/45386 ,  H03F2203/45526 ,  H03F2203/45528 ,  H03F2203/45638 ,  H03G3/001 ,  H03G11/00 ,  H03H7/42 ,  H03H11/1291 ,  H03H11/22 ,  H03H11/344 ,  H03H21/0001 ,  H03H21/0012 ,  H03H2011/0494 ,  H03J2200/10 ,  H03L7/099 ,  H04B17/104 ,  H04B17/14 ,  H04B17/19

Abstract: An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.

Abstract translation: 在说明书和附图中描述和示出的本发明的示例性实施例是具有接收器，发射器，本地振荡器（LO）发生器，控制器和自检单元的收发器。 所有这些组件都可以封装以集成到单个IC中，其中包括过滤器和电感器等组件。 用于接收机，发射机和LO发生器的自适应编程和校准的控制器。 自检单元产生用于确定接收机，发射机和LO发生器的增益，频率特性，选择性，本底噪声和失真特性。 要强调的是，该摘要被提供以符合要求摘要的规则，这将允许搜索者或其他读者快速确定技术公开的主题。 提交它的理解是，它不会用于解释或限制权利要求的范围或含义。

公开(公告)号：US20070190958A1

公开(公告)日：2007-08-16

申请号：US11355818

申请日：2006-02-16

Applicant: Hooman Darabi

Inventor： Hooman Darabi

IPC: H04B1/18

CPC classification number: H04B1/40 ,  H04B17/21

Abstract: Various embodiments are disclosed relating to a wireless transceiver. In an example embodiment, a wireless transceiver may include a transmitter adapted to output a signal at an image frequency (e.g., a simulated image) for a channel during a first mode (e.g., calibration mode) of operation. The wireless transceiver also includes a receiver adapted to receive, via loopback from the transmitter, the (e.g., simulated) image frequency signal and to determine digitally a receiver in-phase/quadrature-phase (I/Q) signal calibration adjustment based on the (simulated) image frequency signal to improve a match in amplitude and a predetermined phase shift between I and Q signals of the receiver during the first (e.g., calibration) mode of operation. The I/Q calibration adjustment may be applied to received signals during a second mode (e.g., operation mode) of operation to improve image rejection.

Abstract translation: 公开了关于无线收发器的各种实施例。 在示例实施例中，无线收发器可以包括适于在操作的第一模式（例如，校准模式）期间输出用于信道的图像频率（例如，模拟图像）的信号的发射器。 无线收发器还包括接收器，适于通过来自发射机的环回接收（例如，模拟的）图像频率信号，并且基于接收机的同相/正交相位（I / Q）信号校准调整来数字地接收 （模拟）图像频率信号，以改善在第一（例如校准）操作模式期间接收机的I和Q信号之间的幅度匹配和预定的相移。 可以在操作的第二模式（例如，操作模式）期间将I / Q校准调整应用于接收信号，以改善图像抑制。

公开(公告)号：US20070173207A1

公开(公告)日：2007-07-26

申请号：US11336716

申请日：2006-01-20

Applicant: Hooman Darabi

Inventor： Hooman Darabi

IPC: H04B1/40

CPC classification number: H04B1/406 ,  H04B1/0003

Abstract: Various embodiments are disclosed relating to techniques to reduce spurs in wireless transceivers. In an example embodiment, a first fractional-N divide ratio for a first frequency synthesizer may be set based on a selected channel. A second fractional-N divide ratio for a second frequency synthesizer may be set to a fixed value independent of the selected channel. The second fractional-N divide ratio may be set to a value that is sufficiently distant from an integer value so as to decrease the likelihood of at least some type(s) of spurs.

Abstract translation: 公开了关于减少无线收发器中的刺激的技术的各种实施例。 在示例性实施例中，可以基于所选择的信道来设置用于第一频率合成器的第一分数N除法比。 第二频率合成器的第二小数N分频比可以被设置为独立于所选频道的固定值。 第二分数N分频比可以被设置为与整数值足够远的值，以便减少至少某种类型的刺激的可能性。

公开(公告)号：US07076232B2

公开(公告)日：2006-07-11

申请号：US10138678

申请日：2002-05-03

Applicant: Hooman Darabi

Inventor： Hooman Darabi

IPC: H04Q7/20

CPC classification number: H03G3/3052 ,  H04B1/406

Abstract: A radio transceiver includes amplification circuitry that is coupled to receive a down converted signal and to provide infinite rejection of any DC component added by the down conversion circuitry. Specifically, an amplification stage includes a voltage integrator that is coupled within a feedback loop of the amplification circuitry to produce a DC charge having a magnitude that equals the added DC component but a polarity that is opposite. Accordingly, the voltage produced by the voltage integrator is added to the signal received from the down conversion circuitry to cause the amplification circuitry to merely amplify the wireless communication signals characterized by a frequency of oscillation. Logic circuitry is used for selectively coupling the voltage integrator to an output port of the amplification circuitry.

公开(公告)号：US07071790B2

公开(公告)日：2006-07-04

申请号：US10977771

申请日：2004-10-29

Applicant: Hooman Darabi ,  John Leete

Inventor： Hooman Darabi ,  John Leete

IPC: H03L1/00 ,  H03B5/12

CPC classification number: H03B5/1206 ,  H03B5/1265 ,  H03B2200/005

Abstract: Methods and systems for increasing an amplifier circuit's Q factor are disclosed herein. The method may comprise coupling a first LC tank to a source of a single switching transistor and coupling a second LC tank to a drain of the single switching transistor. A gate of the single switching transistor may be controlled by an amplifier core coupled to the first LC tank and the second LC tank. A resistance of the first LC tank and the second LC tank may be decreased by about one half, which increases the Q factor by about two. The gate of the single switching transistor may be controlled by a control signal generator coupled to the amplifier core. The first LC tank and/or the second LC tank may be tuned to a frequency of about 3.4 GHz to 4 GHz. The single switching transistor may comprise an NMOS transistor.

Abstract translation: 本文公开了用于增加放大器电路的Q因子的方法和系统。 该方法可以包括将第一LC箱耦合到单个开关晶体管的源并将第二LC箱耦合到单个开关晶体管的漏极。 单个开关晶体管的栅极可以由耦合到第一LC箱和第二LC箱的放大器芯控制。 第一LC槽和第二LC槽的电阻可以减少大约一半，这将Q因数增大约两倍。 单个开关晶体管的栅极可以由耦合到放大器芯的控制信号发生器来控制。 第一LC箱和/或第二LC箱可以被调谐到约3.4GHz至4GHz的频率。 单个开关晶体管可以包括NMOS晶体管。

公开(公告)号：US20060125526A1

公开(公告)日：2006-06-15

申请号：US11055873

申请日：2005-02-11

Applicant: Hooman Darabi

Inventor： Hooman Darabi

IPC: H03K19/094

CPC classification number: H03K19/09432 ,  H03K19/086

Abstract: A logic circuit incorporates symmetric inputs and/or a symmetric output. The logic circuit may include symmetric input circuits such that each input signal may be processed by a circuit that provides substantially identical rise times and fall times. The input circuits may provide symmetric loading of the input signals by providing a substantially identical circuit configuration for each input signal. The logic circuit may include a symmetric output circuit such that the output signals generated by the output circuit may have substantially identical rise times and fall times. Each leg of a differential output circuit may incorporate a substantially identical circuit configuration.

Abstract translation: 逻辑电路结合对称输入和/或对称输出。 逻辑电路可以包括对称输入电路，使得每个输入信号可以由提供基本相同的上升时间和下降时间的电路来处理。 输入电路可以通过为每个输入信号提供基本相同的电路配置来提供输入信号的对称负载。 逻辑电路可以包括对称输出电路，使得由输出电路产生的输出信号可以具有基本相同的上升时间和下降时间。 差分输出电路的每条支路可以包括基本相同的电路配置。

公开(公告)号：US20060091957A1

公开(公告)日：2006-05-04

申请号：US10977798

申请日：2004-10-29

Applicant: Hooman Darabi ,  Janice Chiu

Inventor： Hooman Darabi ,  Janice Chiu

IPC: H03G3/10

CPC classification number: H03G1/007 ,  H03G3/3063 ,  H03G2201/103 ,  H03G2201/202 ,  H03G2201/307

Abstract: Methods and systems for processing signals are disclosed herein. In one aspect of the invention a circuit for processing signals may comprise a triple well (TW) NMOS transistor coupled to an amplifier core. The TW NMOS transistor may track process and temperature variations (PVT) of at least one NMOS transistor within the amplifier core. A drain of the TW NMOS transistor may be coupled to a first inductor and the first inductor may be coupled to a first voltage source. The first voltage source may generate a standard voltage of about 1.2V. A source of the TW NMOS transistor may be coupled to a second inductor and the second inductor may be coupled to the first voltage source. A gate of the TW NMOS transistor may be coupled to a second voltage source, where the second voltage source may generate a standard voltage of about 2.5V.

Abstract translation: 本文公开了用于处理信号的方法和系统。 在本发明的一个方面，用于处理信号的电路可以包括耦合到放大器芯的三阱（TW）NMOS晶体管。 TW NMOS晶体管可跟踪放大器核心内的至少一个NMOS晶体管的工艺和温度变化（PVT）。 TW NMOS晶体管的漏极可以耦合到第一电感器，并且第一电感器可以耦合到第一电压源。 第一电压源可产生约1.2V的标准电压。 TW NMOS晶体管的源极可以耦合到第二电感器，并且第二电感器可以耦合到第一电压源。 TW NMOS晶体管的栅极可以耦合到第二电压源，其中第二电压源可以产生约2.5V的标准电压。