公开(公告)号：US20130320495A1

公开(公告)日：2013-12-05

申请号：US13738510

申请日：2013-01-10

Applicant: INTERMOLECULAR, INC.

Inventor： Sandra G. Malhotra ,  Hanhong Chen ,  Wim Y. Deweerd ,  Edward L. Haywood ,  Hiroyuki Ode ,  Gerald Richardson

IPC: H01L29/92

CPC classification number: H01L29/92 ,  H01L28/75 ,  H01L28/92

Abstract: A method for forming a capacitor stack is described. In some embodiments of the present invention, a first electrode structure is comprised of multiple materials. A first material is formed above the substrate. A portion of the first material is etched. A second material is formed above the first material. A portion of the second material is etched. Optionally, the first electrode structure receives an anneal treatment. A dielectric material is formed above the first electrode structure. Optionally, the dielectric material receives an anneal treatment. A second electrode material is formed above the dielectric material. Typically, the capacitor stack receives an anneal treatment.

Abstract translation: 描述形成电容器堆叠的方法。 在本发明的一些实施例中，第一电极结构由多种材料构成。 在基板上方形成第一材料。 蚀刻第一材料的一部分。 在第一材料上方形成第二材料。 蚀刻第二材料的一部分。 可选地，第一电极结构接受退火处理。 介电材料形成在第一电极结构之上。 可选地，电介质材料接受退火处理。 在电介质材料上方形成第二电极材料。 通常，电容器堆叠接收退火处理。

公开(公告)号：US08542523B2

公开(公告)日：2013-09-24

申请号：US13738855

申请日：2013-01-10

Applicant: Intermolecular Inc.

Inventor： Karthik Ramani ,  Wim Y. Deweerd ,  Hiroyuki Ode

IPC: G11C11/00

CPC classification number: H01L28/65 ,  H01L28/20 ,  H01L45/06 ,  H01L45/1206 ,  H01L45/122 ,  H01L45/1286 ,  H01L45/144 ,  H01L45/148 ,  H01L45/1683 ,  Y10S977/754

Abstract: A method for fabricating a dynamic random access memory (DRAM) capacitor includes forming a first electrode film. The first electrode film comprises a conductive binary metal compound and a dopant. The dopant may have a uniform or non-uniform concentration within the first electrode film. A high-k dielectric film is formed over the first electrode film. A second electrode film is formed over the dielectric film. The second electrode film comprises a conductive binary metal compound and a dopant. The dopant may have a uniform or non-uniform concentration within the second electrode film. The dopants and their distribution are chosen so that the crystal structure of the surface of the electrode is not degraded if the electrode is to be used as a templating structure for subsequent layer formation. Additionally, the dopants and their distribution are chosen so that the work function of the electrodes is not degraded.

公开(公告)号：US20130140619A1

公开(公告)日：2013-06-06

申请号：US13738866

申请日：2013-01-10

Applicant: Intermolecular, Inc.

Inventor： Sandra Malhotra ,  Hanhong Chen ,  Wim Deweerd ,  Mitsuhiro Horikawa ,  Kenichi Koyanagi ,  Hiroyuki Ode ,  Xiangxin Rui

IPC: H01L49/02

CPC classification number: H01L28/60 ,  H01L28/40 ,  H01L28/75

Abstract: A method for fabricating a DRAM capacitor stack is described wherein the dielectric material is a multi-layer stack formed from a highly-doped material combined with a lightly or non-doped material. The highly-doped material remains amorphous with a crystalline content of less than 30% after an annealing step. The lightly or non-doped material becomes crystalline with a crystalline content of equal to or greater than 30% after an annealing step. The dielectric multi-layer stack maintains a high k-value while minimizing the leakage current and the EOT value.

Abstract translation: 描述了制造DRAM电容器堆叠的方法，其中电介质材料是由与轻掺杂或非掺杂材料组合的高掺杂材料形成的多层叠层。 在退火步骤之后，高掺杂材料保持无定形，结晶含量小于30％。 在退火步骤之后，轻掺杂或非掺杂材料变成结晶含量等于或大于30％的晶体。 电介质多层堆叠保持高的k值，同时使漏电流和EOT值最小化。

公开(公告)号：US20130122683A1

公开(公告)日：2013-05-16

申请号：US13738865

申请日：2013-01-10

Applicant: Intermolecular Inc. ,  Elpida Memory, Inc

Inventor： Sandra G. Malhotra ,  Hanhong Chen ,  Wim Y. Deweerd ,  Hiroyuki Ode

IPC: H01L49/02

CPC classification number: H01L28/60 ,  H01L27/10852 ,  H01L28/40

Abstract: A method for forming a DRAM MIM capacitor stack having low leakage current involves the use of a first electrode that serves as a template for promoting the high k phase of a subsequently deposited dielectric layer. The high k dielectric layer comprises a doped material that can be crystallized after a subsequent annealing treatment. An amorphous blocking is formed on the dielectric layer. The thickness of the blocking layer is chosen such that the blocking layer remains amorphous after a subsequent annealing treatment. A second electrode layer compatible with the blocking layer is formed on the blocking layer.

Abstract translation: 用于形成具有低泄漏电流的DRAM MIM电容器堆叠的方法涉及使用用作促进随后沉积的介电层的高k相的模板的第一电极。 高k电介质层包括可在随后的退火处理后结晶的掺杂材料。 在电介质层上形成无定形阻挡层。 选择阻挡层的厚度使得在随后的退火处理之后阻挡层保持无定形。 在阻挡层上形成与阻挡层相容的第二电极层。

公开(公告)号：US20130119515A1

公开(公告)日：2013-05-16

申请号：US13738855

申请日：2013-01-10

Applicant: Intermolecular Inc.

Inventor： Karthik Ramani ,  Wim Y. Deweerd ,  Hiroyuki Ode

IPC: H01L49/02

CPC classification number: H01L28/65 ,  H01L28/20 ,  H01L45/06 ,  H01L45/1206 ,  H01L45/122 ,  H01L45/1286 ,  H01L45/144 ,  H01L45/148 ,  H01L45/1683 ,  Y10S977/754

Abstract: A method for fabricating a dynamic random access memory (DRAM) capacitor includes forming a first electrode film. The first electrode film comprises a conductive binary metal compound and a dopant. The dopant may have a uniform or non-uniform concentration within the first electrode film. A high-k dielectric film is formed over the first electrode film. A second electrode film is formed over the dielectric film. The second electrode film comprises a conductive binary metal compound and a dopant. The dopant may have a uniform or non-uniform concentration within the second electrode film. The dopants and their distribution are chosen so that the crystal structure of the surface of the electrode is not degraded if the electrode is to be used as a templating structure for subsequent layer formation. Additionally, the dopants and their distribution are chosen so that the work function of the electrodes is not degraded.

Abstract translation: 一种用于制造动态随机存取存储器（DRAM）电容器的方法包括形成第一电极膜。 第一电极膜包括导电二元金属化合物和掺杂剂。 掺杂剂可以在第一电极膜内具有均匀或不均匀的浓度。 在第一电极膜上形成高k电介质膜。 在绝缘膜上形成第二电极膜。 第二电极膜包括导电二元金属化合物和掺杂剂。 掺杂剂可以在第二电极膜内具有均匀或不均匀的浓度。 选择掺杂剂及其分布，使得如果将电极用作后续层形成的模板结构，则电极表面的晶体结构不会降解。 此外，选择掺杂剂及其分布使得电极的功函数不降解。

公开(公告)号：US20130119512A1

公开(公告)日：2013-05-16

申请号：US13665524

申请日：2012-10-31

Applicant: Intermolecular, Inc. ,  Elpida Memory, Inc

Inventor： Sandra G. Malhotra ,  Hanhong Chen ,  Wim Y. Deweerd ,  Hiroyuki Ode

IPC: H01L29/92

CPC classification number: H01L28/40 ,  H01L21/02186 ,  H01L21/02194 ,  H01L21/0228 ,  H01L21/02304 ,  H01L21/02356 ,  H01L27/10852 ,  H01L28/75

Abstract: A method for forming a DRAM MIM capacitor stack having low leakage current involves the use of a first electrode that serves as a template for promoting the high k phase of a subsequently deposited dielectric layer. The high k dielectric layer comprises a doped material that can be crystallized after a subsequent annealing treatment. A metal oxide second electrode layer is formed above the dielectric layer. The metal oxide second electrode layer has a crystal structure that is compatible with the crystal structure of the dielectric layer. Optionally, a second electrode bulk layer is formed above the metal oxide second electrode layer.

Abstract translation: 用于形成具有低泄漏电流的DRAM MIM电容器堆叠的方法涉及使用用作促进随后沉积的介电层的高k相的模板的第一电极。 高k电介质层包括可在随后的退火处理后结晶的掺杂材料。 金属氧化物第二电极层形成在电介质层的上方。 金属氧化物第二电极层具有与电介质层的晶体结构相容的晶体结构。 可选地，在金属氧化物第二电极层上形成第二电极体层。

公开(公告)号：US20130093051A1

公开(公告)日：2013-04-18

申请号：US13692460

申请日：2012-12-03

Applicant: Intermolecular, Inc. ,  Elpida Memory, Inc

Inventor： Hanhong Chen ,  Hiroyuki Ode

IPC: H01L49/02

CPC classification number: H01L28/65 ,  H01L27/10805 ,  H01L28/75

Abstract: A bilayer second electrode for a MIM DRAM capacitor is formed wherein the layer of the electrode that is in contact with the dielectric layer (i.e. bottom layer) has a composition that is resistant to oxidation during subsequent anneal steps and have rutile templating capability. Examples include SnO2 and RuO2. The capacitor stack including the bottom layer is subjected to a PMA treatment to reduce the oxygen vacancies in the dielectric layer and reduce the interface states at the dielectric/second electrode interface. The other component of the bilayer (i.e. top layer) is a high work function, high conductivity metal or conductive metal compound.

Abstract translation: 形成用于MIM DRAM电容器的双层第二电极，其中与电介质层（即底层）接触的电极层具有在随后的退火步骤期间耐氧化的组成并具有金红石模板能力。 实例包括SnO 2和RuO 2。 包括底层的电容器堆叠经受PMA处理以减少电介质层中的氧空位并降低电介质/第二电极界面处的界面态。 双层的另一组分（即顶层）是高功函数，高导电性金属或导电金属化合物。