公开(公告)号：US08541828B2

公开(公告)日：2013-09-24

申请号：US13668488

申请日：2012-11-05

Applicant: Intermolecular, Inc.

Inventor： Imran Hashim ,  Edward L. Haywood ,  Sandra G. Malhotra ,  Xiangxin Rui ,  Sunil Shanker

IPC: H01L27/108 ,  H01L29/76 ,  H01L29/94 ,  H01L31/119

CPC classification number: H01L21/3141 ,  C23C16/02 ,  C23C16/405 ,  H01L21/02186 ,  H01L21/02271 ,  H01L21/02315 ,  H01L21/31604 ,  H01L28/91

Abstract: Methods for depositing high-K dielectrics are described, including depositing a first electrode on a substrate, wherein the first electrode is chosen from the group consisting of platinum and ruthenium, applying an oxygen plasma treatment to the exposed metal to reduce the contact angle of a surface of the metal, and depositing a titanium oxide layer on the exposed metal using at least one of a chemical vapor deposition process and an atomic layer deposition process, wherein the titanium oxide layer includes at least a portion of rutile titanium oxide.

Abstract translation: 描述了用于沉积高K电介质的方法，包括在衬底上沉积第一电极，其中第一电极选自铂和钌，对暴露的金属施加氧等离子体处理以减小接触角 并且使用化学气相沉积工艺和原子层沉积工艺中的至少一种将氧化钛层沉积在暴露的金属上，其中氧化钛层包括至少一部分金红石型氧化钛。

公开(公告)号：US08737036B2

公开(公告)日：2014-05-27

申请号：US13657782

申请日：2012-10-22

Applicant: Intermolecular, Inc.

Inventor： Hanhong Chen ,  Nobumichi Fuchigami ,  Imran Hashim ,  Edward L. Haywood ,  Pragati Kumar ,  Sandra G. Malhotra ,  Monica Sawkar Mathur ,  Prashant B. Phatak ,  Sunil Shanker

IPC: H01G4/30

CPC classification number: H01G4/1218 ,  C23C16/405 ,  C23C16/45531 ,  C23C16/56 ,  H01G4/33 ,  H01L21/02186 ,  H01L21/022 ,  H01L21/0228 ,  H01L21/02312 ,  H01L21/02337 ,  H01L21/3141 ,  H01L21/3142 ,  H01L28/40

Abstract: This disclosure provides (a) methods of making an oxide layer (e.g., a dielectric layer) based on titanium oxide, to suppress the formation of anatase-phase titanium oxide and (b) related devices and structures. A metal-insulator-metal (“MIM”) stack is formed using an ozone pretreatment process of a bottom electrode (or other substrate) followed by an ALD process to form a TiO2 dielectric, rooted in the use of an amide-containing precursor. Following the ALD process, an oxidizing anneal process is applied in a manner is hot enough to heal defects in the TiO2 dielectric and reduce interface states between TiO2 and electrode; the anneal temperature is selected so as to not be so hot as to disrupt BEL surface roughness. Further process variants may include doping the titanium oxide, pedestal heating during the ALD process to 275-300 degrees Celsius, use of platinum or ruthenium for the BEL, and plural reagent pulses of ozone for each ALD process cycle. The process provides high deposition rates, and the resulting MIM structure has substantially no x-ray diffraction peaks associated with anatase-phase titanium oxide.

Abstract translation: 本公开内容提供（a）制造基于氧化钛的氧化物层（例如电介质层）的方法，以抑制锐钛矿相氧化钛的形成和（b）相关的器件和结构。 使用底部电极（或其他基底）的臭氧预处理随后进行ALD工艺来形成金属 - 绝缘体 - 金属（“MIM”）堆叠，以形成根植于使用含酰胺的前体的TiO 2电介质。 在ALD工艺之后，氧化退火工艺的应用热度足以愈合TiO2电介质中的缺陷，并降低TiO2和电极之间的界面态; 选择退火温度以使其不那么热，以致破坏BEL表面粗糙度。 进一步的工艺变型可以包括在ALD工艺期间掺杂氧化钛，基座加热至275-300摄氏度，对于BEL使用铂或钌，对于每个ALD工艺循环使用多个试剂脉冲的臭氧。 该方法提供高沉积速率，并且所得MIM结构基本上没有与锐钛矿相氧化钛相关的x射线衍射峰。

公开(公告)号：US08581318B1

公开(公告)日：2013-11-12

申请号：US13737209

申请日：2013-01-09

Applicant: Intermolecular, Inc.

Inventor： Hanhong Chen ,  Wim Deweerd ,  Edward L. Haywood ,  Sandra G. Malhotra ,  Hiroyuki Ode

IPC: H01L27/108 ,  H01L29/94

CPC classification number: H01L28/60 ,  H01L28/75

Abstract: A metal oxide first electrode material for a MIM DRAM capacitor is formed wherein the first and/or second electrode materials or structures contain layers having one or more dopants up to a total doping concentration that will not prevent the electrode materials from crystallizing during a subsequent anneal step. Advantageously, the electrode doped with one or more of the dopants has a work function greater than about 5.0 eV. Advantageously, the electrode doped with one or more of the dopants has a resistivity less than about 1000 μΩcm. Advantageously, the electrode materials are conductive molybdenum oxide.

Abstract translation: 形成用于MIM DRAM电容器的金属氧化物第一电极材料，其中第一和/或第二电极材料或结构包含具有一个或多个掺杂剂的层，直到总掺杂浓度，其将不会阻止电极材料在随后的退火期间结晶 步。 有利地，掺杂有一种或多种掺杂剂的电极具有大于约5.0eV的功函数。 有利地，掺杂有一种或多种掺杂剂的电极具有小于约1000微米的电阻率。 有利地，电极材料是导电性氧化钼。

公开(公告)号：US20130044404A1

公开(公告)日：2013-02-21

申请号：US13657782

申请日：2012-10-22

Applicant: Intermolecular, Inc.

Inventor： Hanhong Chen ,  Nobumichi Fuchigami ,  Imran Hashim ,  Edward L. Haywood ,  Pragati KUMAR ,  Sandra G. Malhotra ,  Monica Sawkar Mathur ,  Prashant B. Phatak ,  Sunil Shanker

IPC: H01G4/30 ,  H01G4/018

CPC classification number: H01G4/1218 ,  C23C16/405 ,  C23C16/45531 ,  C23C16/56 ,  H01G4/33 ,  H01L21/02186 ,  H01L21/022 ,  H01L21/0228 ,  H01L21/02312 ,  H01L21/02337 ,  H01L21/3141 ,  H01L21/3142 ,  H01L28/40

Abstract: This disclosure provides (a) methods of making an oxide layer (e.g., a dielectric layer) based on titanium oxide, to suppress the formation of anatase-phase titanium oxide and (b) related devices and structures. A metal-insulator-metal (“MIM”) stack is formed using an ozone pretreatment process of a bottom electrode (or other substrate) followed by an ALD process to form a TiO2 dielectric, rooted in the use of an amide-containing precursor. Following the ALD process, an oxidizing anneal process is applied in a manner is hot enough to heal defects in the TiO2 dielectric and reduce interface states between TiO2 and electrode; the anneal temperature is selected so as to not be so hot as to disrupt BEL surface roughness. Further process variants may include doping the titanium oxide, pedestal heating during the ALD process to 275-300 degrees Celsius, use of platinum or ruthenium for the BEL, and plural reagent pulses of ozone for each ALD process cycle. The process provides high deposition rates, and the resulting MIM structure has substantially no x-ray diffraction peaks associated with anatase-phase titanium oxide.

Abstract translation: 本公开内容提供（a）制造基于氧化钛的氧化物层（例如电介质层）的方法，以抑制锐钛矿相氧化钛的形成和（b）相关的器件和结构。 使用底部电极（或其他基底）的臭氧预处理随后进行ALD工艺形成金属 - 绝缘体 - 金属（MIM）堆叠，以形成使用含酰胺前体的TiO 2电介质。 在ALD工艺之后，氧化退火工艺的应用热度足以愈合TiO2电介质中的缺陷，并降低TiO2和电极之间的界面态; 选择退火温度以使其不那么热，以致破坏BEL表面粗糙度。 进一步的工艺变型可以包括在ALD工艺期间掺杂氧化钛，基座加热至275-300摄氏度，对于BEL使用铂或钌，对于每个ALD工艺循环使用多个试剂脉冲的臭氧。 该方法提供高沉积速率，并且所得MIM结构基本上没有与锐钛矿相氧化钛相关的x射线衍射峰。

公开(公告)号：US20140166840A1

公开(公告)日：2014-06-19

申请号：US13716044

申请日：2012-12-14

Applicant: INTERMOLECULAR, INC.

Inventor： Wayne R. French ,  Kent Riley Child ,  Alonzo T. Collins ,  Jay B. Dedontney ,  Richard R. Endo ,  Aaron T. Francis ,  Zachary Fresco ,  Edward L. Haywood ,  Ashley David Lacey ,  Monica Sawkar Mathur ,  James Tsung ,  Danny Wang ,  Kenneth A. Williams ,  Maosheng Zhao

IPC: H01L21/687

CPC classification number: H01L21/68728 ,  H01L21/68757

Abstract: A substrate carrier is provided. The substrate carrier includes a base for supporting a substrate. A plurality of support tabs is affixed to a surface of the base. The plurality of support tabs have a cavity defined within an inner region of each support tab of the plurality of support tabs. A plurality of protrusions extends from the surface of the base, wherein one of the plurality of protrusions mates with one cavity to support one of the plurality of support tabs. A film is deposited over the surface of the base, surfaces of the plurality of support tabs and surfaces of the plurality of protrusions.

Abstract translation: 提供衬底载体。 衬底载体包括用于支撑衬底的基底。 多个支撑片固定到基座的表面上。 多个支撑突片具有限定在多个支撑突片中的每个支撑突片的内部区域内的空腔。 多个突起从基座的表面延伸，其中多个突起中的一个与一个空腔配合，以支撑多个支撑突片中的一个。 薄膜沉积在基底的表面上，多个支撑突片的表面和多个突起的表面。

公开(公告)号：US08652927B2

公开(公告)日：2014-02-18

申请号：US13738510

申请日：2013-01-10

Applicant: Intermolecular, Inc.

Inventor： Sandra Malhotra ,  Hanhong Chen ,  Wim Y. Deweerd ,  Edward L. Haywood ,  Hiroyuki Ode ,  Gerald Richardson

IPC: H01L21/20

CPC classification number: H01L29/92 ,  H01L28/75 ,  H01L28/92

Abstract: A method for forming a capacitor stack is described. In some embodiments of the present invention, a first electrode structure is comprised of multiple materials. A first material is formed above the substrate. A portion of the first material is etched. A second material is formed above the first material. A portion of the second material is etched. Optionally, the first electrode structure receives an anneal treatment. A dielectric material is formed above the first electrode structure. Optionally, the dielectric material receives an anneal treatment. A second electrode material is formed above the dielectric material. Typically, the capacitor stack receives an anneal treatment.

Abstract translation: 描述形成电容器堆叠的方法。 在本发明的一些实施例中，第一电极结构由多种材料构成。 在基板上方形成第一材料。 蚀刻第一材料的一部分。 在第一材料上方形成第二材料。 蚀刻第二材料的一部分。 可选地，第一电极结构接受退火处理。 介电材料形成在第一电极结构之上。 可选地，电介质材料接受退火处理。 在电介质材料上方形成第二电极材料。 通常，电容器堆叠接收退火处理。

公开(公告)号：US20130320495A1

公开(公告)日：2013-12-05

申请号：US13738510

申请日：2013-01-10

Applicant: INTERMOLECULAR, INC.

Inventor： Sandra G. Malhotra ,  Hanhong Chen ,  Wim Y. Deweerd ,  Edward L. Haywood ,  Hiroyuki Ode ,  Gerald Richardson

IPC: H01L29/92

CPC classification number: H01L29/92 ,  H01L28/75 ,  H01L28/92

Abstract: A method for forming a capacitor stack is described. In some embodiments of the present invention, a first electrode structure is comprised of multiple materials. A first material is formed above the substrate. A portion of the first material is etched. A second material is formed above the first material. A portion of the second material is etched. Optionally, the first electrode structure receives an anneal treatment. A dielectric material is formed above the first electrode structure. Optionally, the dielectric material receives an anneal treatment. A second electrode material is formed above the dielectric material. Typically, the capacitor stack receives an anneal treatment.

Abstract translation: 描述形成电容器堆叠的方法。 在本发明的一些实施例中，第一电极结构由多种材料构成。 在基板上方形成第一材料。 蚀刻第一材料的一部分。 在第一材料上方形成第二材料。 蚀刻第二材料的一部分。 可选地，第一电极结构接受退火处理。 介电材料形成在第一电极结构之上。 可选地，电介质材料接受退火处理。 在电介质材料上方形成第二电极材料。 通常，电容器堆叠接收退火处理。

公开(公告)号：US20130056852A1

公开(公告)日：2013-03-07

申请号：US13668488

申请日：2012-11-05

Applicant: Intermolecular, Inc.

Inventor： Imran Hashim ,  Edward L. Haywood ,  Sandra G. Malhotra ,  Xiangxin Rui ,  Sunil Shanker

IPC: H01L29/92

CPC classification number: H01L21/3141 ,  C23C16/02 ,  C23C16/405 ,  H01L21/02186 ,  H01L21/02271 ,  H01L21/02315 ,  H01L21/31604 ,  H01L28/91

Abstract: Methods for depositing high-K dielectrics are described, including depositing a first electrode on a substrate, wherein the first electrode is chosen from the group consisting of platinum and ruthenium, applying an oxygen plasma treatment to the exposed metal to reduce the contact angle of a surface of the metal, and depositing a titanium oxide layer on the exposed metal using at least one of a chemical vapor deposition process and an atomic layer deposition process, wherein the titanium oxide layer comprises at least a portion rutile titanium oxide.

Abstract translation: 描述了用于沉积高K电介质的方法，包括在衬底上沉积第一电极，其中第一电极选自铂和钌，对暴露的金属施加氧等离子体处理以减小接触角 并且使用化学气相沉积工艺和原子层沉积工艺中的至少一种在暴露的金属上沉积氧化钛层，其中所述氧化钛层包含至少一部分金红石型氧化钛。