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公开(公告)号:US20230115292A1
公开(公告)日:2023-04-13
申请号:US17496436
申请日:2021-10-07
申请人: Intel Corporation
摘要: An infrastructure for a platform immersive experience is described. An example of an apparatus includes a microcontroller to receive control parameters for platform lighting options for a computing system and information regarding current system conditions for the computing system, and generate control instructions for a lighting pattern for a set of lights based at least in part on the control parameters and the information regarding current system conditions; and host control circuitry to receive the control instructions for the lighting pattern from the microcontroller, and provide control signals to control the set of lights.
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公开(公告)号:US11520555B2
公开(公告)日:2022-12-06
申请号:US17162864
申请日:2021-01-29
申请人: Intel Corporation
发明人: Deepak S. Vembar , Atsuo Kuwahara , Chandrasekaran Sakthivel , Radhakrishnan Venkataraman , Brent E. Insko , Anupreet S. Kalra , Hugues Labbe , Altug Koker , Michael Apodaca , Kai Xiao , Jeffery S. Boles , Adam T. Lake , David M. Cimini , Balaji Vembu , Elmoustapha Ould-Ahmed-Vall , Jacek Kwiatkowski , Philip R. Laws , Ankur N. Shah , Abhishek R. Appu , Joydeep Ray , Wenyin Fu , Nikos Kaburlasos , Prasoonkumar Surti , Bhushan M. Borole
IPC分类号: G06F3/14 , G06F3/147 , G06T1/20 , G09G5/36 , H04L65/402 , G09G3/00 , H04L67/131
摘要: An embodiment of a graphics apparatus may include a processor, memory communicatively coupled to the processor, and a collaboration engine communicatively coupled to the processor to identify a shared graphics component between two or more users in an environment, and share the shared graphics components with the two or more users in the environment. Embodiments of the collaboration engine may include one or more of a centralized sharer, a depth sharer, a shared preprocessor, a multi-port graphics subsystem, and a decode sharer. Other embodiments are disclosed and claimed.
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公开(公告)号:US20220076480A1
公开(公告)日:2022-03-10
申请号:US17478161
申请日:2021-09-17
申请人: Intel Corporation
发明人: Jonathan Kennedy , Gabor Liktor , Jeffery S. Boles , Slawomir Grajewski , Balaji Vembu , Travis T. Schluessler , Abhishek R. Appu , Ankur N. Shah , Joydeep Ray , Altug Koker , Jacek Kwiatkowski
IPC分类号: G06T15/00 , A63F13/355
摘要: Systems, apparatuses, and methods may provide for technology to process graphics data in a virtual gaming environment. The technology may identify, from graphics data in a graphics application, redundant graphics calculations relating to common frame characteristics of one or more graphical scenes to be shared between client game devices of a plurality of users and calculate, in response to the identified redundant graphics calculations, frame characteristics relating to the one or more graphical scenes. Additionally, the technology may send, over a computer network, the calculation of the frame characteristics to the client game devices.
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公开(公告)号:US11106274B2
公开(公告)日:2021-08-31
申请号:US15483442
申请日:2017-04-10
申请人: Intel Corporation
发明人: Travis T. Schluessler , Joydeep Ray , John H. Feit , Nikos Kaburlasos , Jacek Kwiatkowski , Jefferson Amstutz , Carson Brownlee , Vivek Tiwari , Sayan Lahiri , Kai Xiao , Abhishek R. Appu , ElMoustapha Ould-Ahmed-Vall , Deepak S. Vembar , Ankur N. Shah , Balaji Vembu , Josh B. Mastronarde
IPC分类号: G06F3/01 , G06K9/00 , G06T1/20 , G06F3/048 , G06F3/0346
摘要: An embodiment of a graphics apparatus may include a facial expression detector to detect a facial expression of a user, and a parameter adjuster communicatively coupled to the facial expression detector to adjust a graphics parameter based on the detected facial expression of the user. The detected facial expression may include one or more of a squinting, blinking, winking, and facial muscle tension of the user. The graphics parameter may include one or more of a frame resolution, a screen contrast, a screen brightness, and a shading rate. Other embodiments are disclosed and claimed.
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公开(公告)号:US20210050070A1
公开(公告)日:2021-02-18
申请号:US17006192
申请日:2020-08-28
申请人: Intel Corporation
发明人: Altug Koker , Travis T. Schluessler , Ankur N. Shah , Abhishek R. Appu , Joydeep Ray , Jonathan Kennedy
摘要: Systems, apparatuses and methods may provide for technology that identifies a redundant portion of a packaged on-die memory and detects, during a field test of the packaged on-die memory, one or more failed cells in the packaged on-die memory. Additionally, one or more memory cells in the redundant portion may be substituted for the one or more failed memory cells.
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公开(公告)号:US20210034135A1
公开(公告)日:2021-02-04
申请号:US16992701
申请日:2020-08-13
申请人: Intel Corporation
发明人: Mohammed Tameem , Altug Koker , Kiran C. Veernapu , Abhishek R. Appu , Ankur N. Shah , Joydeep Ray , Travis T. Schluessler , Jonathan Kennedy
IPC分类号: G06F1/3234 , G06F13/16 , G06F13/40 , G06F1/3296 , G06F1/324 , G06F1/3206 , G06F1/3287
摘要: Described herein are various embodiments of reducing dynamic power consumption within a processor device. One embodiment provides a technique for dynamic link width reduction based on the instantaneous throughput demand for client of an interconnect fabric. One embodiment provides for a parallel processor comprising an interconnect fabric including a dynamic bus module to configure a bus width for a client of the interconnect fabric based on throughput demand from the client.
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公开(公告)号:US10725929B2
公开(公告)日:2020-07-28
申请号:US15483741
申请日:2017-04-10
申请人: Intel Corporation
发明人: Jianfang Zhu , Cristiano J. Ferreira , Bo Qiu , Ajit Krisshna Nandyal Lakshman , Nikhil Talpallikar , Deepak Gandiga Shivakumar , Brandt M. Guttridge , Kim Pallister , Frank J. Soqui , Anand Srivatsa , Travis T. Schluessler , Abhishek R. Appu , Ankur N. Shah , Joydeep Ray , Altug Koker , Jonathan Kennedy
IPC分类号: G06F12/00 , G06F13/00 , G06F13/28 , G06F12/10 , G06F12/0875 , G06F12/0811 , G06T1/60 , G06F3/06 , G06F12/06 , G06F12/02 , G06F12/109
摘要: An embodiment of an electronic processing system may include an application processor, system memory communicatively coupled to the application processor, a graphics processor communicatively coupled to the application processor, graphics memory communicatively coupled to the graphics processor, and persistent storage media communicatively coupled to the application processor and the graphics processor to store one or more graphics assets, wherein the graphics processor is to access the one or more graphics asset mapped from the persistent storage media. The persistent storage media may include a low latency, high capacity, and byte-addressable nonvolatile memory. The one or more graphics assets may include one or more of a mega-texture and terrain data. Other embodiments are disclosed and claimed.
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公开(公告)号:US20200082494A1
公开(公告)日:2020-03-12
申请号:US16572161
申请日:2019-09-16
申请人: Intel Corporation
发明人: Joydeep Ray , Ankur N. Shah , Abhishek R. Appu , Deepak S. Vembar , ElMoustapha Ould-Ahmed-Vall , Atsuo Kuwahara , Travis T. Schluessler , Linda L. Hurd , Josh B. Mastronarde , Vasanth Ranganathan
摘要: An embodiment of a graphics apparatus may include a context engine to determine contextual information, a recommendation engine communicatively coupled to the context engine to determine a recommendation based on the contextual information, and a configuration engine communicatively coupled to the recommendation engine to adjust a configuration of a graphics operation based on the recommendation. Other embodiments are disclosed and claimed.
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公开(公告)号:US10380039B2
公开(公告)日:2019-08-13
申请号:US15482690
申请日:2017-04-07
申请人: Intel Corporation
发明人: Niranjan L. Cooray , Satyeshwar Singh , Sameer KP , Ankur N. Shah , Kun Tian , Abhishek R. Appu , Altug Koker , Joydeep Ray , Balaji Vembu , Pattabhiraman K , David Puffer , David J. Cowperthwaite , Rajesh M. Sankaran
IPC分类号: G06F12/109 , G06F11/07 , G06F13/16 , G06F12/1009 , G06F12/1027 , G06F12/1036 , G06F12/0802 , G06F13/40
摘要: An apparatus and method are described for implementing memory management in a graphics processing system. For example, one embodiment of an apparatus comprises: a first plurality of graphics processing resources to execute graphics commands and process graphics data; a first memory management unit (MMU) to communicatively couple the first plurality of graphics processing resources to a system-level MMU to access a system memory; a second plurality of graphics processing resources to execute graphics commands and process graphics data; a second MMU to communicatively couple the second plurality of graphics processing resources to the first MMU; wherein the first MMU is configured as a master MMU having a direct connection to the system-level MMU and the second MMU comprises a slave MMU configured to send memory transactions to the first MMU, the first MMU either servicing a memory transaction or sending the memory transaction to the system-level MMU on behalf of the second MMU.
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公开(公告)号:US10347357B2
公开(公告)日:2019-07-09
申请号:US15495143
申请日:2017-04-24
申请人: Intel Corporation
发明人: Altug Koker , Travis T. Schluessler , Ankur N. Shah , Abhishek R. Appu , Joydeep Ray , Jonathan Kennedy
摘要: Systems, apparatuses and methods provide for technology that identifies a redundant portion of a packaged on-die memory and detects, during a field test of the packaged on-die memory, one or more failed cells in the packaged on-die memory. Additionally, the technology identifies whether the redundant portion includes one or more remaining memory cells, and in response to an identification that the redundant portion includes the one or more remaining memory cells, the one or more remaining memory cells in the redundant portion are substituted for the one or more failed memory cells.
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