公开(公告)号：US10521880B2

公开(公告)日：2019-12-31

申请号：US15489015

申请日：2017-04-17

申请人： Intel Corporation

发明人： Balaji Vembu ,  Josh B. Mastronarde ,  Altug Koker ,  Nikos Kaburlasos ,  Abhishek R. Appu ,  Joydeep Ray

IPC分类号： G06F12/08 ,  G06F12/00 ,  G06T1/60 ,  G06T1/20 ,  G06F1/329 ,  G06F9/48

摘要： Methods and apparatus relating to techniques for power management. In an example, an apparatus comprises logic, at least partially comprising hardware logic, to receive one or more frames for a workload, determine one or more compute resource parameters for the workload, and store the one or more compute resource parameters for the workload in a memory in association with workload context data for the workload. Other embodiments are also disclosed and claimed.

公开(公告)号：US20190139192A1

公开(公告)日：2019-05-09

申请号：US16125121

申请日：2018-09-07

申请人： Intel Corporation

发明人： Joydeep Ray ,  Travis T. Schluessler ,  John H. Feit ,  Nikos Kaburlasos ,  Jacek Kwiatkowski ,  Abhishek R. Appu ,  Balaji Vembu ,  Prasoonkumar Surti

IPC分类号： G06T3/40 ,  G06F3/01

摘要： Systems, apparatuses and methods may provide away to blend two or more of the scene surfaces based on the focus area and an offload threshold. More particularly, systems, apparatuses and methods may provide a way to blend, by a display engine, two or more of the focus area scene surfaces and blended non-focus area scene surfaces. The systems, apparatuses and methods may include a graphics engine to render the focus area surfaces at a higher sample rate than the non-focus area scene surfaces.

公开(公告)号：US10251011B2

公开(公告)日：2019-04-02

申请号：US15494742

申请日：2017-04-24

申请人： Intel Corporation

发明人： Joydeep Ray ,  Travis T. Schluessler ,  Prasoonkumar Surti ,  John H. Feit ,  Nikos Kaburlasos ,  Jacek Kwiatkowski ,  Abhishek R. Appu ,  James M. Holland ,  Jeffery S. Boles ,  Jonathan Kennedy ,  Louis Feng ,  Atsuo Kuwahara ,  Barnan Das ,  Narayan Biswal ,  Stanley J. Baran ,  Gokcen Cilingir ,  Nilesh V. Shah ,  Archie Sharma ,  Mayuresh M. Varerkar

IPC分类号： H04S7/00 ,  G06T1/20 ,  G06F3/01 ,  H04R1/40 ,  G09B21/00 ,  G06T15/06 ,  H04R3/00

摘要： Systems, apparatuses and methods may provide away to render augmented reality (AR) and/or virtual reality (VR) sensory enhancements using ray tracing. More particularly, systems, apparatuses and methods may provide a way to normalize environment information captured by multiple capture devices, and calculate, for an observer, the sound sources or sensed events vector paths. The systems, apparatuses and methods may detect and/or manage one or more capture devices and assign one or more the capture devices based on one or more conditions to provide observer an immersive VR/AR experience.

公开(公告)号：US10152822B2

公开(公告)日：2018-12-11

申请号：US15477019

申请日：2017-04-01

申请人： Intel Corporation

发明人： Prasoonkumar Surti ,  Karthik Vaidyanathan ,  Atsuo Kuwahara ,  Hugues Labbe ,  Sameer KP ,  Jonathan Kennedy ,  Joydeep Ray ,  Travis T. Schluessler ,  John H. Feit ,  Nikos Kaburlasos ,  Jacek Kwiatkowski ,  Tomer Bar-On ,  Carsten Benthin ,  Adam T. Lake ,  Vasanth Ranganathan ,  Abhishek R. Appu

IPC分类号： G06T15/08 ,  H04N5/369 ,  G02B27/01 ,  G06T15/10 ,  G06T15/60 ,  G06K9/00 ,  H04N5/232

摘要： An embodiment of an electronic processing system may include an application processor, persistent storage media communicatively coupled to the application processor, a graphics subsystem communicatively coupled to the application processor, a sense engine communicatively coupled to the graphics subsystem to provide sensed information, a focus engine communicatively coupled to the sense engine and the graphics subsystem to provide focus information, a motion engine communicatively coupled to the sense engine, the focus engine, and the graphics subsystem to provide motion information, and a motion biased foveated renderer communicatively coupled to the motion engine, the focus engine, the sense engine to adjust one or more parameters of the graphics subsystem based on one or more of the sense information, the focus information, and the motion information. Other embodiments are disclosed and claimed.

公开(公告)号：US20180300045A1

公开(公告)日：2018-10-18

申请号：US15488998

申请日：2017-04-17

申请人： Intel Corporation

发明人： Prasoonkumar Surti ,  Wenyin Fu ,  Nikos Kaburlasos ,  Bhushan M. Borole

IPC分类号： G06F3/0484 ,  G06T1/20 ,  G09G5/10

摘要： Methods and apparatus relating to techniques for provision of active window rendering optimization and display are described. In an embodiment, a processor is caused to render an active portion of a display device prior to an inactive portion of the display device based at least in part on comparison of a determined size of the active portion of the display device with a threshold value. Furthermore, the active portion of the display device may include a portion of the display device that is being viewed by a user or otherwise a portion of the display device with which a user is interacting. Other embodiments are also disclosed and claimed.

公开(公告)号：US20180293779A1

公开(公告)日：2018-10-11

申请号：US15483436

申请日：2017-04-10

申请人： Intel Corporation

发明人： Nikos Kaburlasos ,  Joydeep Ray ,  John H. Feit ,  Travis T. Schluessler ,  Jacek Kwiatkowski ,  Philip R. Laws

IPC分类号： G06T15/00 ,  H04N13/04

CPC分类号： H04N13/344 ,  H04N13/398

摘要： An embodiment of a parallel processor apparatus may include a sample pattern selector to select a sample pattern for a pixel, and a sample pattern subset selector communicatively coupled to the sample pattern selector to select a first subset of the sample pattern for the pixel corresponding to a left eye display frame and to select a second subset of the sample pattern for the pixel corresponding to a right eye display frame, wherein the second subset is different from the first subset. Other embodiments are disclosed and claimed.

公开(公告)号：US20180292895A1

公开(公告)日：2018-10-11

申请号：US15483442

申请日：2017-04-10

申请人： Intel Corporation

发明人： Travis T. Schluessler ,  Joydeep Ray ,  John H. Feit ,  Nikos Kaburlasos ,  Jacek Kwiatkowski ,  Jefferson Amstutz ,  Carson Brownlee ,  Vivek Tiwari ,  Sayan Lahiri ,  Kai Xiao ,  Abhishek R. Appu ,  ElMoustapha Ould-Ahmed-Vall ,  Deepak S. Vembar ,  Ankur N. Shah ,  Balaji Vembu ,  Josh B. Mastronarde

IPC分类号： G06F3/01 ,  G06K9/00 ,  G06T1/20

摘要： An embodiment of a graphics apparatus may include a facial expression detector to detect a facial expression of a user, and a parameter adjuster communicatively coupled to the facial expression detector to adjust a graphics parameter based on the detected facial expression of the user. The detected facial expression may include one or more of a squinting, blinking, winking, and facial muscle tension of the user. The graphics parameter may include one or more of a frame resolution, a screen contrast, a screen brightness, and a shading rate. Other embodiments are disclosed and claimed.

公开(公告)号：US20180285230A1

公开(公告)日：2018-10-04

申请号：US15477031

申请日：2017-04-01

申请人： Intel Corporation

发明人： Nikos Kaburlasos ,  Balaji Vembu ,  Josh B. Mastronarde ,  Altug Koker ,  Eric C. Samson ,  Abhishek R. Appu ,  Kiran C. Veernapu ,  Joydeep Ray ,  Vasanth Ranganathan ,  Sanjeev S. Jahagirdar

IPC分类号： G06F11/30 ,  G06F1/32 ,  G05F1/10 ,  G05F1/571 ,  G06F11/32 ,  G06F11/34

CPC分类号： G06F11/3058 ,  G05F1/10 ,  G05F1/571 ,  G06F1/3206 ,  G06F1/324 ,  G06F1/3296 ,  G06F11/322 ,  G06F11/328 ,  G06F11/3476

摘要： Methods and apparatus relating to techniques for power management. In an example, an apparatus comprises logic, at least partially comprising hardware logic, to generate a voltage/frequency curve for at least one of a core or a sub-core in a processor and manage an operating voltage level of the at least one of a core or a sub-core using the voltage/frequency curve. Other embodiments are also disclosed and claimed.

公开(公告)号：US09805438B2

公开(公告)日：2017-10-31

申请号：US14993421

申请日：2016-01-12

申请人： Intel Corporation

发明人： Nikos Kaburlasos ,  Eric C. Samson ,  Altug Koker

IPC分类号： G06T1/20

CPC分类号： G06T1/20

摘要： According to some embodiments, performance bottlenecks that arise in particular resources within a graphic processor unit may be alleviated by dynamically rebalancing workloads among the resources, with the goal of removing the current performance bottleneck, while at the same time maintaining power dissipation within a currently allocated power budget. In some embodiments this may be achieved by defining a separate clock domain for each of the plurality of graphics processor resources whose performance may then be rebalanced.

公开(公告)号：US09123088B2

公开(公告)日：2015-09-01

申请号：US13955228

申请日：2013-07-31

申请人： Intel Corporation

发明人： Nikos Kaburlasos ,  Eric C. Samson ,  Robert B. Taylor

IPC分类号： G06F15/00 ,  G06T1/00

CPC分类号： G06T1/20 ,  G06T1/00 ,  G06T1/60 ,  G09G5/001 ,  G09G5/363 ,  G09G5/395 ,  G09G2330/021 ,  G09G2360/08 ,  G09G2360/122 ,  G09G2360/18

摘要： In accordance with some embodiments, partial rendering of non-changing or slowly changing frame tiles allows the graphics processing unit to spend less time processing non-changing or slowly changing portions of each frame, saving power and creating more room for performance in some embodiments.

摘要翻译： 根据一些实施例，不改变或缓慢变化的帧瓦片的部分渲染允许图形处理单元花费更少的时间处理每个帧的不变或缓慢变化的部分，从而在一些实施例中节省功率并创造更多的性能空间。