公开(公告)号：US20180286888A1

公开(公告)日：2018-10-04

申请号：US15892513

申请日：2018-02-09

Applicant: Japan Display Inc.

Inventor： Yohei Yamaguchi ,  Isao Suzumura

IPC: H01L27/12 ,  H01L29/786 ,  H01L29/49

CPC classification number: H01L29/7869 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/13685 ,  G02F2202/10 ,  G02F2202/104 ,  H01L27/1218 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1251 ,  H01L27/14692 ,  H01L27/3262 ,  H01L27/3276 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/786 ,  H01L29/78648 ,  H01L29/78675

Abstract: The purpose of the present invention is to realize the TFT of the oxide semiconductor having a superior characteristics and high reliability during the product's life. The structure of the present invention is as follows. A display device comprising: a substrate including a display area where plural pixels are formed, the pixel includes a first TFT of a first oxide semiconductor, a first gate insulating film is formed on the first oxide semiconductor, the first gate insulating film is a laminated film of a first silicon oxide film and a first aluminum oxide film, a gate electrode is formed on the first aluminum film.

公开(公告)号：US09772536B2

公开(公告)日：2017-09-26

申请号：US15444379

申请日：2017-02-28

Applicant: Japan Display Inc.

Inventor： Yohei Yamaguchi ,  Arichika Ishida ,  Hidekazu Miyake ,  Hiroto Miyake ,  Isao Suzumura

IPC: G02F1/1362 ,  H01L29/786 ,  H01L27/12 ,  G02F1/1368 ,  G02F1/1343 ,  H01L29/423

CPC classification number: G02F1/1368 ,  G02F1/134309 ,  G02F1/13439 ,  G02F1/136209 ,  G02F1/136227 ,  G02F2001/136218 ,  G02F2001/13685 ,  G02F2202/10 ,  H01L27/1225 ,  H01L29/42384 ,  H01L29/78633 ,  H01L29/7869

Abstract: According to one embodiment, a display device includes an insulating substrate, a thin-film transistor including a semiconductor layer formed on a layer above the insulating substrate, a gate electrode which at least partly overlaps the semiconductor layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer, and a light shielding layer formed between the thin-film transistor and the insulating substrate to at least partly overlap the semiconductor layer, the light shielding layer electrically connected to the gate electrode.

公开(公告)号：US20170168334A1

公开(公告)日：2017-06-15

申请号：US15444379

申请日：2017-02-28

Applicant: Japan Display Inc.

Inventor： Yohei Yamaguchi ,  Arichika Ishida ,  Hidekazu Miyake ,  Hiroto Miyake ,  Isao Suzumura

IPC: G02F1/1368 ,  G02F1/1362 ,  G02F1/1343

CPC classification number: G02F1/1368 ,  G02F1/134309 ,  G02F1/13439 ,  G02F1/136209 ,  G02F1/136227 ,  G02F2001/136218 ,  G02F2001/13685 ,  G02F2202/10 ,  H01L27/1225 ,  H01L29/42384 ,  H01L29/78633 ,  H01L29/7869

Abstract: According to one embodiment, a display device includes an insulating substrate, a thin-film transistor including a semiconductor layer formed on a layer above the insulating substrate, a gate electrode which at least partly overlaps the semiconductor layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer, and a light shielding layer formed between the thin-film transistor and the insulating substrate to at least partly overlap the semiconductor layer, the light shielding layer electrically connected to the gate electrode.

公开(公告)号：US09530896B2

公开(公告)日：2016-12-27

申请号：US14658430

申请日：2015-03-16

Applicant: Japan Display Inc.

Inventor： Norihiro Uemura ,  Isao Suzumura ,  Hidekazu Miyake ,  Yohei Yamaguchi

IPC: H01L29/10 ,  H01L29/786 ,  H01L29/417

CPC classification number: H01L27/1225 ,  G02F1/133345 ,  G02F1/134309 ,  G02F1/136209 ,  G02F1/1368 ,  G02F2001/133302 ,  G02F2001/134372 ,  H01L27/124 ,  H01L27/3272 ,  H01L27/3276 ,  H01L29/41733 ,  H01L29/7869

Abstract: Provided are a reliable high performance thin film transistor and a reliable high performance display device. The display device has: a gate electrode which is formed on a substrate; a gate insulating film which is formed to cover the substrate and the gate electrode; an oxide semiconductor layer which is formed on the gate electrode through the gate insulating film; a channel protective layer which is in contact with the oxide semiconductor layer and formed on the oxide semiconductor layer; and source/drain electrodes which are electrically connected to the oxide semiconductor layer and formed to cover the oxide semiconductor layer. A metal oxide layer is formed on an upper part of the channel protective layer. The source/drain electrodes are formed to be divided apart on the channel protective layer and the metal oxide layer.

Abstract translation: 提供可靠的高性能薄膜晶体管和可靠的高性能显示器件。 显示装置具有形成在基板上的栅电极; 形成为覆盖基板和栅电极的栅极绝缘膜; 通过栅极绝缘膜形成在栅电极上的氧化物半导体层; 沟道保护层，其与所述氧化物半导体层接触并形成在所述氧化物半导体层上; 以及与氧化物半导体层电连接并形成为覆盖氧化物半导体层的源极/漏极。 金属氧化物层形成在沟道保护层的上部。 源极/漏极形成为在沟道保护层和金属氧化物层上分开。

公开(公告)号：US20150263048A1

公开(公告)日：2015-09-17

申请号：US14658430

申请日：2015-03-16

Applicant: Japan Display Inc.

Inventor： Norihiro UEMURA ,  Isao Suzumura ,  Hidekazu Miyake ,  Yohei Yamaguchi

IPC: H01L27/12 ,  H01L51/56 ,  H01L27/32

CPC classification number: H01L27/1225 ,  G02F1/133345 ,  G02F1/134309 ,  G02F1/136209 ,  G02F1/1368 ,  G02F2001/133302 ,  G02F2001/134372 ,  H01L27/124 ,  H01L27/3272 ,  H01L27/3276 ,  H01L29/41733 ,  H01L29/7869

Abstract: Provided are a reliable high performance thin film transistor and a reliable high performance display device. The display device has: a gate electrode which is formed on a substrate; a gate insulating film which is formed to cover the substrate and the gate electrode; an oxide semiconductor layer which is formed on the gate electrode through the gate insulating film; a channel protective layer which is in contact with the oxide semiconductor layer and formed on the oxide semiconductor layer; and source/drain electrodes which are electrically connected to the oxide semiconductor layer and formed to cover the oxide semiconductor layer. A metal oxide layer is formed on an upper part of the channel protective layer. The source/drain electrodes are formed to be divided apart on the channel protective layer and the metal oxide layer.

Abstract translation: 提供可靠的高性能薄膜晶体管和可靠的高性能显示器件。 显示装置具有形成在基板上的栅电极; 形成为覆盖基板和栅电极的栅极绝缘膜; 通过栅极绝缘膜形成在栅电极上的氧化物半导体层; 沟道保护层，与所述氧化物半导体层接触并形成在所述氧化物半导体层上; 以及与氧化物半导体层电连接并形成为覆盖氧化物半导体层的源极/漏极。 金属氧化物层形成在沟道保护层的上部。 源极/漏极形成为在沟道保护层和金属氧化物层上分开。

公开(公告)号：US12237345B2

公开(公告)日：2025-02-25

申请号：US18366859

申请日：2023-08-08

Applicant: Japan Display Inc.

Inventor： Hajime Watakabe ,  Isao Suzumura ,  Akihiro Hanada ,  Yohei Yamaguchi

IPC: H01L27/12 ,  H01L29/24 ,  H01L29/66 ,  H01L29/786

Abstract: A display device including a substrate having thin film transistors (TFT) comprising: the TFT including an oxide semiconductor film, a gate electrode and an insulating film formed between the oxide semiconductor film and the gate electrode, wherein a first aluminum oxide film and a second aluminum oxide film, which is formed on the first aluminum oxide film, are formed between the insulating film and the gate electrode, an oxygen concentration in the first aluminum oxide film is bigger than an oxygen concentration in the second aluminum oxide film.

公开(公告)号：US11921392B2

公开(公告)日：2024-03-05

申请号：US17945214

申请日：2022-09-15

Applicant: Japan Display Inc.

Inventor： Yohei Yamaguchi ,  Arichika Ishida ,  Hidekazu Miyake ,  Hiroto Miyake ,  Isao Suzumura

IPC: G02F1/1368 ,  G02F1/1343 ,  G02F1/1362 ,  H01L27/12 ,  H01L29/423 ,  H01L29/786

CPC classification number: G02F1/1368 ,  G02F1/134309 ,  G02F1/13439 ,  G02F1/136209 ,  G02F1/136227 ,  H01L27/1225 ,  H01L29/78633 ,  H01L29/7869 ,  G02F1/136218 ,  G02F1/13685 ,  G02F2202/10 ,  H01L29/42384

Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first metal layer on the insulating substrate, a first insulating layer on the insulating substrate and the first metal layer, a semiconductor layer on the first insulating layer, a second insulating layer on the semiconductor layer and the first insulating layer, a second metal layer on the second insulating layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer. The first metal layer overlaps the second metal layer. A third metal layer contacts a top surface of the second metal layer and a top surface of the first metal layer.

公开(公告)号：US11810921B2

公开(公告)日：2023-11-07

申请号：US17983481

申请日：2022-11-09

Applicant: Japan Display Inc.

Inventor： Isao Suzumura ,  Kazufumi Watabe ,  Yoshinori Ishii ,  Hidekazu Miyake ,  Yohei Yamaguchi

IPC: H01L27/12 ,  H01L27/32 ,  H01L29/786 ,  H01L29/51 ,  H01L29/24 ,  G02F1/1368 ,  G02F1/133 ,  G02F1/1362 ,  H01L29/417 ,  H01L29/423 ,  H01L29/49 ,  H10K59/121

CPC classification number: H01L27/1225 ,  G02F1/1368 ,  G02F1/13306 ,  G02F1/136209 ,  H01L27/1251 ,  H01L27/1259 ,  H01L29/24 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/517 ,  H01L29/7869 ,  H01L29/78633 ,  H01L29/78675 ,  G02F1/13685 ,  G02F2202/10 ,  G02F2202/104 ,  H10K59/1213

Abstract: The object of the present invention is to make it possible to form an LTPS TFT and an oxide semiconductor TFT on the same substrate. A display device includes a substrate having a display region in which pixels are formed. The pixel includes a first TFT using an oxide semiconductor 109. An oxide film 110 as an insulating material is formed on the oxide semiconductor 109. A gate electrode 111 is formed on the oxide film 110. A first electrode 115 is connected to a drain of the first TFT via a first through hole formed in the oxide film 110. A second electrode 116 is connected to a source of the first TFT via a second through hole formed in the oxide film 110.

公开(公告)号：US11474406B2

公开(公告)日：2022-10-18

申请号：US17126112

申请日：2020-12-18

Applicant: Japan Display Inc.

Inventor： Yohei Yamaguchi ,  Arichika Ishida ,  Hidekazu Miyake ,  Hiroto Miyake ,  Isao Suzumura

IPC: G02F1/1368 ,  G02F1/1362 ,  H01L27/12 ,  H01L29/786 ,  G02F1/1343 ,  H01L29/423

Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first metal layer on the insulating substrate, a first insulating layer on the insulating substrate and the first metal layer, a semiconductor layer on the first insulating layer, a second insulating layer on the semiconductor layer and the first insulating layer, a second metal layer on the second insulating layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer. The first metal layer overlaps the second metal layer. A third metal layer contacts a top surface of the second metal layer and a top surface of the first metal layer.

公开(公告)号：US11049882B2

公开(公告)日：2021-06-29

申请号：US16743080

申请日：2020-01-15

Applicant: Japan Display Inc.

Inventor： Isao Suzumura ,  Kazufumi Watabe ,  Yoshinori Ishii ,  Hidekazu Miyake ,  Yohei Yamaguchi

IPC: H01L27/12 ,  H01L27/32 ,  H01L29/786 ,  H01L29/51 ,  H01L29/24 ,  G02F1/1368 ,  G02F1/133 ,  G02F1/1362 ,  H01L29/417 ,  H01L29/423 ,  H01L29/49

Abstract: The object of the present invention is to make it possible to form an LTPS TFT and an oxide semiconductor TFT on the same substrate. A display device includes a substrate having a display region in which pixels are formed. The pixel includes a first TFT using an oxide semiconductor 109. An oxide film 110 as an insulating material is formed on the oxide semiconductor 109. A gate electrode 111 is formed on the oxide film 110. A first electrode 115 is connected to a drain of the first TFT via a first through hole formed in the oxide film 110. A second electrode 116 is connected to a source of the first TFT via a second through hole formed in the oxide film 110.